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authorWill Deacon <will.deacon@arm.com>2012-01-25 11:36:33 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-01-25 11:01:45 +0000
commitdffcb9c5f854b485a07a3620eba4e560c77b0032 (patch)
tree8dbbebd0c4dc437e664b194a9d350d40c4eab571 /arch/arm/mach-realview/include
parentdcd6c92267155e70a94b3927bce681ce74b80d1f (diff)
downloadblackbird-obmc-linux-dffcb9c5f854b485a07a3620eba4e560c77b0032.tar.gz
blackbird-obmc-linux-dffcb9c5f854b485a07a3620eba4e560c77b0032.zip
ARM: 7300/1: realview: fix definition of GPIO0 interrupt on PB1176 to match TRM
Currently, -1 is used as the GPIO0 interrupt on realview PB1176 and an AMBA device is registered with this parameter. With the pending NO_IRQ cleanup, this will lead to a warning at boot time, since -1 is obviously broken. This patch updates the interrupt used for GPIO0 to match that specified by the TRM. Unfortunately, it's not clear how to trigger this interrupt so we trust that the documentation is correct. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-realview/include')
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-pb1176.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
index 5c3c625e3e04..708f84156f2c 100644
--- a/arch/arm/mach-realview/include/mach/irqs-pb1176.h
+++ b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
@@ -40,6 +40,7 @@
#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */
+#define IRQ_DC1176_GPIO0 (IRQ_DC1176_GIC_START + 16)
#define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */
#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */
#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */
@@ -73,7 +74,6 @@
#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */
#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */
-#define IRQ_PB1176_GPIO0 -1
#define IRQ_PB1176_SCTL -1
#define NR_GIC_PB1176 2
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