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authorKishon Vijay Abraham I <kishon@ti.com>2018-04-27 17:39:04 +0530
committerTony Lindgren <tony@atomide.com>2018-05-03 10:32:19 -0700
commitc29fd489118a2abd2d17c49ae980e3c67fa6d004 (patch)
treef67bbbdf7653c36a4f7df2eea27179f9e9dda156 /arch/arm/mach-mv78xx0
parent940293affa7ed7c0bdb1820ecf7a8f12e901d030 (diff)
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ARM: dts: dra7: Add high speed modes capability to MMC1/MMC2 dt node
While the supported UHS mode can be obtained from CAPA2 register, SD Host Controller Standard Specification doesn't define bits for MMC's HS200 and DDR mode capability. Add properties to indicate MMC HS200 and DDR speed mode capability in dt node. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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