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authorMarc Kleine-Budde <mkl@pengutronix.de>2013-11-25 18:03:57 +0100
committerShawn Guo <shawn.guo@linaro.org>2013-12-31 09:36:27 +0800
commit630a212501653d046b61015a4d0f9e3db65382cc (patch)
treed9fbc463abfc8b2fbd783a6f0be6d004850d74ec /arch/arm/mach-imx/clk-pllv1.c
parent6fb8954b08d395a831a3e98134fe6545e6293a60 (diff)
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ARM i.MX5: fix "shift" value for lp_apm_sel on i.MX50 and i.MX53
According to the i.MX50 Rev. 1 and i.MX53 Rev. 2.1 datasheet the lp_apm_sel is bit 10 in the CCM_CCSR register not bit 9. On the i.MX51 it's bit 9. This patch fixes this issue. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx/clk-pllv1.c')
0 files changed, 0 insertions, 0 deletions
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