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authorArnd Bergmann <arnd@arndb.de>2012-02-27 14:25:51 +0000
committerArnd Bergmann <arnd@arndb.de>2012-02-27 14:25:51 +0000
commit5a8c271b26b83a09924c99aaa5c607021aed142b (patch)
tree94e234ab022ee16bb5c8252a62f5ef7833c8b6f5 /arch/arm/mach-davinci
parentd0cdd82c6e0944df733b28f5d4cbbe97298587e4 (diff)
parent0b7580ba9d4ac653cf39fa754c21fa36c080e444 (diff)
downloadblackbird-obmc-linux-5a8c271b26b83a09924c99aaa5c607021aed142b.tar.gz
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Merge branch 'v3.4/fixes' of git://gitorious.org/linux-davinci/linux-davinci into next/fixes-non-critical
* 'v3.4/fixes' of git://gitorious.org/linux-davinci/linux-davinci: ARM: davinci: map default_queue to edma channels
Diffstat (limited to 'arch/arm/mach-davinci')
-rw-r--r--arch/arm/mach-davinci/dma.c6
-rw-r--r--arch/arm/mach-davinci/include/mach/edma.h5
2 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index da90103a313d..fd33919c95d4 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -1508,12 +1508,8 @@ static int __init edma_probe(struct platform_device *pdev)
goto fail;
}
- /* Everything lives on transfer controller 1 until otherwise
- * specified. This way, long transfers on the low priority queue
- * started by the codec engine will not cause audio defects.
- */
for (i = 0; i < edma_cc[j]->num_channels; i++)
- map_dmach_queue(j, i, EVENTQ_1);
+ map_dmach_queue(j, i, info[j]->default_queue);
queue_tc_mapping = info[j]->queue_tc_mapping;
queue_priority_mapping = info[j]->queue_priority_mapping;
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
index 20c77f29bf0f..7e84c906ceff 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/arch/arm/mach-davinci/include/mach/edma.h
@@ -250,6 +250,11 @@ struct edma_soc_info {
unsigned n_slot;
unsigned n_tc;
unsigned n_cc;
+ /*
+ * Default queue is expected to be a low-priority queue.
+ * This way, long transfers on the default queue started
+ * by the codec engine will not cause audio defects.
+ */
enum dma_event_q default_queue;
/* Resource reservation for other cores */
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