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author | Pritesh Raithatha <praithatha@nvidia.com> | 2013-02-20 13:35:14 -0500 |
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committer | Stephen Warren <swarren@nvidia.com> | 2013-04-04 17:17:39 -0600 |
commit | 933d87a56e3379479ff399a11899830b341809de (patch) | |
tree | 909d7b8a7bfeb0f1aca3c2d7d3363e9d3f58f8e4 /arch/arm/boot/dts/tegra114.dtsi | |
parent | 2c314d5c2a10588cb582604e8945eb48bdf23562 (diff) | |
download | blackbird-obmc-linux-933d87a56e3379479ff399a11899830b341809de.tar.gz blackbird-obmc-linux-933d87a56e3379479ff399a11899830b341809de.zip |
ARM: tegra: add SDHCI nodes with common properties
This patch adds in the SDHCI nodes for the busses supported on Tegra114
boards.
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
[Rhyland added clk refs to & reordered sdhci nodes and removed spaces]
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
[swarren: fixed DT node sort order]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra114.dtsi')
-rw-r--r-- | arch/arm/boot/dts/tegra114.dtsi | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index c1110a9b2a91..400a2752a7e1 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -122,6 +122,38 @@ nvidia,ahb = <&ahb>; }; + sdhci@78000000 { + compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; + reg = <0x78000000 0x200>; + interrupts = <0 14 0x04>; + clocks = <&tegra_car 14>; + status = "disable"; + }; + + sdhci@78000200 { + compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; + reg = <0x78000200 0x200>; + interrupts = <0 15 0x04>; + clocks = <&tegra_car 9>; + status = "disable"; + }; + + sdhci@78000400 { + compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; + reg = <0x78000400 0x200>; + interrupts = <0 19 0x04>; + clocks = <&tegra_car 69>; + status = "disable"; + }; + + sdhci@78000600 { + compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; + reg = <0x78000600 0x200>; + interrupts = <0 31 0x04>; + clocks = <&tegra_car 15>; + status = "disable"; + }; + cpus { #address-cells = <1>; #size-cells = <0>; |