diff options
author | Chen-Yu Tsai <wens@csie.org> | 2014-02-10 18:35:48 +0800 |
---|---|---|
committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2014-02-10 20:46:11 +0100 |
commit | daed5a8163dcc9ff63e4fde8f7e8ce885ba4c34b (patch) | |
tree | 081da1c8e93541d85fb9c97699831ec39f9e7f37 /arch/arm/boot/dts/sun7i-a20.dtsi | |
parent | 06067a2f62a20130fe20b2837ebf097f0d670dd3 (diff) | |
download | blackbird-obmc-linux-daed5a8163dcc9ff63e4fde8f7e8ce885ba4c34b.tar.gz blackbird-obmc-linux-daed5a8163dcc9ff63e4fde8f7e8ce885ba4c34b.zip |
ARM: dts: sun7i: Add GMAC clock node to sun7i DTSI
The GMAC uses 1 of 2 sources for its transmit clock, depending on the
PHY interface mode. Add both sources as dummy clocks, and as parents
to the GMAC clock node.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun7i-a20.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sun7i-a20.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 4fbe530ec4c3..dd567eac3dee 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -322,6 +322,34 @@ }; /* + * The following two are dummy clocks, placeholders used in the gmac_tx + * clock. The gmac driver will choose one parent depending on the PHY + * interface mode, using clk_set_rate auto-reparenting. + * The actual TX clock rate is not controlled by the gmac_tx clock. + */ + mii_phy_tx_clk: clk@2 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <25000000>; + clock-output-names = "mii_phy_tx"; + }; + + gmac_int_tx_clk: clk@3 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "gmac_int_tx"; + }; + + gmac_tx_clk: clk@01c20164 { + #clock-cells = <0>; + compatible = "allwinner,sun7i-a20-gmac-clk"; + reg = <0x01c20164 0x4>; + clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>; + clock-output-names = "gmac_tx"; + }; + + /* * Dummy clock used by output clocks */ osc24M_32k: clk@1 { |