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| author | Fabrice Gasnier <fabrice.gasnier@st.com> | 2017-10-05 15:15:20 +0200 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@st.com> | 2017-10-16 14:00:50 +0200 |
| commit | 74f4c3228a254f4ac84d2ea2ba2cd216318b20e0 (patch) | |
| tree | 2a8e16255cc3c49a0492b116073c2703b1bec8e1 /arch/arm/boot/dts/stm32h743.dtsi | |
| parent | 846f2f1c3da7590ef02007d2a84f3791a85033ee (diff) | |
| download | blackbird-obmc-linux-74f4c3228a254f4ac84d2ea2ba2cd216318b20e0.tar.gz blackbird-obmc-linux-74f4c3228a254f4ac84d2ea2ba2cd216318b20e0.zip | |
ARM: dts: stm32: Add lptimer definitions to stm32h743
Add lptimer definitions, depending on features they provide:
- lptimer1 & 2 can act as PWM, trigger and encoder/counter
- lptimer3 can act as PWM and trigger
- lptimer4 & 5 can act as PWM
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32h743.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stm32h743.dtsi | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi index a744136e1b3a..cda67e8d2ed4 100644 --- a/arch/arm/boot/dts/stm32h743.dtsi +++ b/arch/arm/boot/dts/stm32h743.dtsi @@ -66,6 +66,32 @@ clocks = <&timer_clk>; }; + lptimer1: timer@40002400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-lptimer"; + reg = <0x40002400 0x400>; + clocks = <&timer_clk>; + clock-names = "mux"; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm-lp"; + status = "disabled"; + }; + + trigger@0 { + compatible = "st,stm32-lptimer-trigger"; + reg = <0>; + status = "disabled"; + }; + + counter { + compatible = "st,stm32-lptimer-counter"; + status = "disabled"; + }; + }; + usart2: serial@40004400 { compatible = "st,stm32f7-usart", "st,stm32f7-uart"; reg = <0x40004400 0x400>; @@ -172,6 +198,83 @@ }; }; + lptimer2: timer@58002400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-lptimer"; + reg = <0x58002400 0x400>; + clocks = <&timer_clk>; + clock-names = "mux"; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm-lp"; + status = "disabled"; + }; + + trigger@1 { + compatible = "st,stm32-lptimer-trigger"; + reg = <1>; + status = "disabled"; + }; + + counter { + compatible = "st,stm32-lptimer-counter"; + status = "disabled"; + }; + }; + + lptimer3: timer@58002800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-lptimer"; + reg = <0x58002800 0x400>; + clocks = <&timer_clk>; + clock-names = "mux"; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm-lp"; + status = "disabled"; + }; + + trigger@2 { + compatible = "st,stm32-lptimer-trigger"; + reg = <2>; + status = "disabled"; + }; + }; + + lptimer4: timer@58002c00 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-lptimer"; + reg = <0x58002c00 0x400>; + clocks = <&timer_clk>; + clock-names = "mux"; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm-lp"; + status = "disabled"; + }; + }; + + lptimer5: timer@58003000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-lptimer"; + reg = <0x58003000 0x400>; + clocks = <&timer_clk>; + clock-names = "mux"; + status = "disabled"; + + pwm { + compatible = "st,stm32-pwm-lp"; + status = "disabled"; + }; + }; + vrefbuf: regulator@58003C00 { compatible = "st,stm32-vrefbuf"; reg = <0x58003C00 0x8>; |
