summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/exynos4412-trats2.dts
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2014-01-23 18:56:08 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2014-01-23 18:56:08 -0800
commit7e21774db5cc9cf8fe93a64a2f0c6cf47db8ab24 (patch)
tree460812792bc3b23789a83968b7bad840cc3eb047 /arch/arm/boot/dts/exynos4412-trats2.dts
parent0ba3307a8ec35252f7b1e222e32889a6f3d9ceb3 (diff)
parent2e84d75116c17c2034e917b411250d2d11755435 (diff)
downloadblackbird-obmc-linux-7e21774db5cc9cf8fe93a64a2f0c6cf47db8ab24.tar.gz
blackbird-obmc-linux-7e21774db5cc9cf8fe93a64a2f0c6cf47db8ab24.zip
Merge tag 'clk-for-linus-3.14-part1' of git://git.linaro.org/people/mike.turquette/linux
Pull clk framework changes from Mike Turquette: "The first half of the clk framework pull request is made up almost entirely of new platform/driver support. There are some conversions of existing drivers to the common-clock Device Tree binding, and a few non-critical fixes to the framework. Due to an entirely unnecessary cyclical dependency with the arm-soc tree this pull request is broken into two pieces. The second piece will be sent out after arm-soc sends you the pull request that merged in core support for the HiSilicon 3620 platform. That same pull request from arm-soc depends on this pull request to merge in those HiSilicon bits without causing build failures" [ Just did the ARM SoC merges, so getting ready for the second clk tree pull request - Linus ] * tag 'clk-for-linus-3.14-part1' of git://git.linaro.org/people/mike.turquette/linux: (97 commits) devicetree: bindings: Document qcom,mmcc devicetree: bindings: Document qcom,gcc clk: qcom: Add support for MSM8660's global clock controller (GCC) clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC) clk: qcom: Add support for MSM8974's global clock controller (GCC) clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC) clk: qcom: Add support for MSM8960's global clock controller (GCC) clk: qcom: Add reset controller support clk: qcom: Add support for branches/gate clocks clk: qcom: Add support for root clock generators (RCGs) clk: qcom: Add support for phase locked loops (PLLs) clk: qcom: Add a regmap type clock struct clk: Add set_rate_and_parent() op reset: Silence warning in reset-controller.h clk: sirf: re-arch to make the codes support both prima2 and atlas6 clk: composite: pass mux_hw into determine_rate clk: shmobile: Fix MSTP clock array initialization clk: shmobile: Fix MSTP clock index ARM: dts: Add clock provider specific properties to max77686 node clk: max77686: Register OF clock provider ...
Diffstat (limited to 'arch/arm/boot/dts/exynos4412-trats2.dts')
-rw-r--r--arch/arm/boot/dts/exynos4412-trats2.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 890ad275cb85..4f851ccf40eb 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -139,6 +139,7 @@
interrupt-parent = <&gpx0>;
interrupts = <7 0>;
reg = <0x09>;
+ #clock-cells = <1>;
voltage-regulators {
ldo1_reg: ldo1 {
OpenPOWER on IntegriCloud