Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "The DT branch adds a lot of new stuff for additional SoC and board
  support.  The branch is the largest one and contains 513 out of the
  total 972 non-merge arm-soc changesets for 3.19.

  Most of the changes are about enabling additional on-chip devices for
  existing machines, but there are also an unusual number of new SoC
  types being added this time:

   - AMLogic Meson8
   - ARM Realview in DT mode
   - Allwinner A80
   - Broadcom BCM47081
   - Broadcom Cygnus
   - Freescale LS1021A
   - Freescale Vybrid 500 series
   - Mediatek MT6592, MT8127, MT8135
   - STMicroelectronics STiH410
   - Samsung Exynos4415

  The level of support for the above differs widely, some are just stubs
  with nothing more than CPU, memory and a UART, but others are fairly
  complete.  As usual, these get extended over time.

  There are also many new boards getting added, this is the list of
  model strings that are showing up in new dts files:

   - ARM RealView PB1176
   - Altera SOCFPGA Arria 10
   - Asus RT-N18U (BCM47081)
   - Buffalo WZR-1750DHP (BCM4708)
   - Buffalo WZR-600DHP2 (BCM47081)
   - Cygnus Enterprise Phone (BCM911360_ENTPHN)
   - D-Link DIR-665
   - Google Spring
   - IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)
   - IGEPv2 Rev. F (TI OMAP AM/DM37x)
   - LS1021A QDS Board
   - LS1021A TWR Board
   - LeMaker Banana Pi
   - MarsBoard RK3066
   - MediaTek MT8127 Moose Board
   - MediaTek MT8135 evaluation board
   - Mele M3
   - Merrii A80 Optimus Board
   - Netgear R6300 V2 (BCM4708)
   - Nomadik STN8815NHK
   - NovaTech OrionLXm
   - Olimex A20-OLinuXino-LIME2
   - Raspberry Pi Model B+
   - STiH410 B2120
   - Samsung Monk board
   - Samsung Rinato board
   - Synology DS213j
   - Synology DS414
   - TBS2910 Matrix ARM mini PC
   - TI AM5728 BeagleBoard-X15
   - Toradex Colibri VF50 on Colibri Evaluation Board
   - Zynq ZYBO Development Board

  Other notable changes include:

   - exynos: cleanup of existing dts files
   - mvebu: improved pinctrl support for Armada 370/XP
   - nomadik: restructuring dts files
   - omap: added CAN bus support
   - shmobile: added clock support for some SoCs
   - shmobile: added sound support for some SoCs
   - sirf: reset controller support
   - sunxi: continuing the relicensing under dual GPL/MIT
   - sunxi: lots of new on-chip device support
   - sunxi: working simplefb support (long awaited)
   - various: provide stdout-path property for earlycon"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (510 commits)
  ARM: dts: rk3288: add arm,cpu-registers-not-fw-configured
  Revert "ARM: dts: rockchip: temporarily disable smp on rk3288"
  ARM: BCM5301X: Add DT for Buffalo WZR-600DHP2
  ARM: BCM5301X: Add DT for Asus RT-N18U
  ARM: BCM5301X: Add DT for Buffalo WZR-1750DHP
  ARM: BCM5301X: Add DT for Netgear R6300 V2
  ARM: BCM5301X: Add buttons for Netgear R6250
  ARM: dts: rockchip: Add input voltage supply regulators in pmic for Marsboard
  ARM: BCM5301X: Add IRQs to Broadcom's bus-axi in DTS file
  arm: dts: zynq: Add Digilent ZYBO board
  arm: dts: zynq: Move crystal freq. to board level
  doc: dt: vendor-prefixes: Add Digilent Inc
  Documentation: devicetree: Fix Xilinx VDMA specification
  ARM: dts: rockchip: set FIFO size for SDMMC, SDIO and EMMC on rk3066 and rk3188
  ARM: dts: rockchip: add label property for leds on Radxa Rock
  ARM: BCM5301X: Add LEDs for Netgear R6250 V1
  ARM: BCM5301X: Add Broadcom's bus-axi to the DTS file
  ARM: dts: add sysreg phandle to i2c device nodes for exynos
  ARM: dts: Remove unused bootargs from exynos3250-rinato
  ARM: dts: add board dts file for Exynos3250-based Monk board
  ...

1 files changed, 140 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
new file mode 100644
index 000000000000..5126f9e77a98
--- /dev/null
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -0,0 +1,140 @@
+/*
+ *  BSD LICENSE
+ *
+ *  Copyright(c) 2014 Broadcom Corporation.  All rights reserved.
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    * Redistributions of source code must retain the above copyright
+ *      notice, this list of conditions and the following disclaimer.
+ *    * Redistributions in binary form must reproduce the above copyright
+ *      notice, this list of conditions and the following disclaimer in
+ *      the documentation and/or other materials provided with the
+ *      distribution.
+ *    * Neither the name of Broadcom Corporation nor the names of its
+ *      contributors may be used to endorse or promote products derived
+ *      from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,cygnus";
+	model = "Broadcom Cygnus SoC";
+	interrupt-parent = <&gic>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			next-level-cache = <&L2>;
+			reg = <0x0>;
+		};
+	};
+
+	/include/ "bcm-cygnus-clock.dtsi"
+
+	amba {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "arm,amba-bus", "simple-bus";
+		interrupt-parent = <&gic>;
+		ranges;
+
+		wdt@18009000 {
+			 compatible = "arm,sp805" , "arm,primecell";
+			 reg = <0x18009000 0x1000>;
+			 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+			 clocks = <&axi81_clk>;
+			 clock-names = "apb_pclk";
+		};
+	};
+
+	uart0: serial@18020000 {
+		compatible = "snps,dw-apb-uart";
+		reg = <0x18020000 0x100>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&axi81_clk>;
+		clock-frequency = <100000000>;
+		status = "disabled";
+	};
+
+	uart1: serial@18021000 {
+		compatible = "snps,dw-apb-uart";
+		reg = <0x18021000 0x100>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&axi81_clk>;
+		clock-frequency = <100000000>;
+		status = "disabled";
+	};
+
+	uart2: serial@18022000 {
+		compatible = "snps,dw-apb-uart";
+		reg = <0x18020000 0x100>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&axi81_clk>;
+		clock-frequency = <100000000>;
+		status = "disabled";
+	};
+
+	uart3: serial@18023000 {
+		compatible = "snps,dw-apb-uart";
+		reg = <0x18023000 0x100>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&axi81_clk>;
+		clock-frequency = <100000000>;
+		status = "disabled";
+	};
+
+	gic: interrupt-controller@19021000 {
+		compatible = "arm,cortex-a9-gic";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg = <0x19021000 0x1000>,
+		      <0x19020100 0x100>;
+	};
+
+	L2: l2-cache {
+		compatible = "arm,pl310-cache";
+		reg = <0x19022000 0x1000>;
+		cache-unified;
+		cache-level = <2>;
+	};
+
+	timer@19020200 {
+		compatible = "arm,cortex-a9-global-timer";
+		reg = <0x19020200 0x100>;
+		interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&periph_clk>;
+	};
+
+};