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authorAndrew Jeffery <andrew@aj.id.au>2016-06-10 16:46:35 +0930
committerLinus Walleij <linus.walleij@linaro.org>2016-06-13 09:32:46 +0200
commiteef06737e5dd9baa1ec8606f74356575ab15291d (patch)
treef7ee0c6360539056f7c2c87cf48313ef6d990384 /Documentation
parent191a79fff8ea88259d94714158cdf7a51c5bf6d3 (diff)
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pinctrl: s/have/has/ in GPIO driver interaction description
Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/pinctrl.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt
index cefcf5d88a1c..07d102c3d05a 100644
--- a/Documentation/pinctrl.txt
+++ b/Documentation/pinctrl.txt
@@ -286,7 +286,7 @@ see the section named "pin control requests from drivers" and
"drivers needing both pin control and GPIOs" below for details. But in some
situations a cross-subsystem mapping between pins and GPIOs is needed.
-Since the pin controller subsystem have its pinspace local to the pin
+Since the pin controller subsystem has its pinspace local to the pin
controller we need a mapping so that the pin control subsystem can figure out
which pin controller handles control of a certain GPIO pin. Since a single
pin controller may be muxing several GPIO ranges (typically SoCs that have
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