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authorHisashi Nakamura <hisashi.nakamura.ak@renesas.com>2014-12-10 11:30:27 +0900
committerSimon Horman <horms+renesas@verge.net.au>2014-12-21 19:07:19 +0900
commitcbf41168339adcb48de6a3537f88d4e85285db99 (patch)
tree25974b701621228641dd12c6c885c03c9e8e3bc0 /CREDITS
parentbe16cd385c08dce7efa406704b5aa420ef6d1992 (diff)
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ARM: shmobile: lager: Fix QSPI mode of SPI-Flash into mode3
In order to change into mode3, CPOL and CPHA bit of SPCMD register of QSPI is changed. Mode3 can avoid intermediate voltage. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> [horms: Updated changelog and re-ordered properties] Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
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