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authorTimur Tabi <timur@freescale.com>2010-10-13 14:19:36 -0500
committerKumar Gala <galak@kernel.crashing.org>2010-10-14 01:05:32 -0500
commite0dc09ff9a28f37441c5e92a14de6abda8db49d6 (patch)
tree9d67ead558435aa6e062aaeaa2750202b7451a3a
parentabd12fe4d1249f6c2c4b34d5ced82f179e6b5d30 (diff)
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powerpc/watchdog: Make default timeout for Book-E watchdog a Kconfig option
The PowerPC Book-E watchdog driver (booke_wdt.c) defines a default timeout value in the code based on whether it's a Freescale Book-E part of not. Instead of having hard-coded values in the driver, make it a Kconfig option. As newer chips gets faster, the current default values become less appropriate, since the timeout sometimes occurs before the kernel finishes booting. Making the value a Kconfig option allows BSPs to configure a new value without requiring the wdt_period command-line parameter to be set. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r--drivers/watchdog/Kconfig17
-rw-r--r--drivers/watchdog/booke_wdt.c8
2 files changed, 18 insertions, 7 deletions
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index a6812eb31fa1..c356146bd712 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -966,6 +966,23 @@ config BOOKE_WDT
Please see Documentation/watchdog/watchdog-api.txt for
more information.
+config BOOKE_WDT_DEFAULT_TIMEOUT
+ int "PowerPC Book-E Watchdog Timer Default Timeout"
+ depends on BOOKE_WDT
+ default 38 if FSL_BOOKE
+ range 0 63 if FSL_BOOKE
+ default 3 if !FSL_BOOKE
+ range 0 3 if !FSL_BOOKE
+ help
+ Select the default watchdog timer period to be used by the PowerPC
+ Book-E watchdog driver. A watchdog "event" occurs when the bit
+ position represented by this number transitions from zero to one.
+
+ For Freescale Book-E processors, this is a number between 0 and 63.
+ For other Book-E processors, this is a number between 0 and 3.
+
+ The value can be overidden by the wdt_period command-line parameter.
+
# PPC64 Architecture
config WATCHDOG_RTAS
diff --git a/drivers/watchdog/booke_wdt.c b/drivers/watchdog/booke_wdt.c
index a9899981fd97..d11ffb091b0d 100644
--- a/drivers/watchdog/booke_wdt.c
+++ b/drivers/watchdog/booke_wdt.c
@@ -33,14 +33,8 @@
* occur, and the final time the board will reset.
*/
-#ifdef CONFIG_FSL_BOOKE
-#define WDT_PERIOD_DEFAULT 38 /* Ex. wdt_period=28 bus=333Mhz,reset=~40sec */
-#else
-#define WDT_PERIOD_DEFAULT 3 /* Refer to the PPC40x and PPC4xx manuals */
-#endif /* for timing information */
-
u32 booke_wdt_enabled;
-u32 booke_wdt_period = WDT_PERIOD_DEFAULT;
+u32 booke_wdt_period = CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT;
#ifdef CONFIG_FSL_BOOKE
#define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15))
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