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authorShawn Guo <shawn.guo@linaro.org>2013-07-22 12:54:59 +0800
committerShawn Guo <shawn.guo@linaro.org>2013-08-22 23:20:41 +0800
commit97245139a0586ad28bf5ab3dd6cef0b019386b9f (patch)
tree3073be13ca936b291bf303ff9591a66c69e0c65e
parent6cd622357df82431358c38dfba4d70e5735e6b5e (diff)
downloadblackbird-obmc-linux-97245139a0586ad28bf5ab3dd6cef0b019386b9f.tar.gz
blackbird-obmc-linux-97245139a0586ad28bf5ab3dd6cef0b019386b9f.zip
ARM: imx6q: add vdoa gate clock
Add the missing vdoa gate clock for imx6q. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-rw-r--r--Documentation/devicetree/bindings/clock/imx6q-clock.txt1
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c3
2 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
index 3066f1811eda..5a90a724b520 100644
--- a/Documentation/devicetree/bindings/clock/imx6q-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
@@ -214,6 +214,7 @@ clocks and IDs.
cko2_podf 199
cko2 200
cko 201
+ vdoa 202
Examples:
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index ed19b332468b..bbafa3ccacb5 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -251,7 +251,7 @@ enum mx6q_clks {
ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2, ldb_di0_div_3_5, ldb_di1_div_3_5,
sata_ref, sata_ref_100m, pcie_ref, pcie_ref_125m, enet_ref, usbphy1_gate,
usbphy2_gate, pll4_post_div, pll5_post_div, pll5_video_div, eim_slow,
- spdif, cko2_sel, cko2_podf, cko2, cko, clk_max
+ spdif, cko2_sel, cko2_podf, cko2, cko, vdoa, clk_max
};
static struct clk *clk[clk_max];
@@ -501,6 +501,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
clk[i2c3] = imx_clk_gate2("i2c3", "ipg_per", base + 0x70, 10);
clk[iim] = imx_clk_gate2("iim", "ipg", base + 0x70, 12);
clk[enfc] = imx_clk_gate2("enfc", "enfc_podf", base + 0x70, 14);
+ clk[vdoa] = imx_clk_gate2("vdoa", "vdo_axi", base + 0x70, 26);
clk[ipu1] = imx_clk_gate2("ipu1", "ipu1_podf", base + 0x74, 0);
clk[ipu1_di0] = imx_clk_gate2("ipu1_di0", "ipu1_di0_sel", base + 0x74, 2);
clk[ipu1_di1] = imx_clk_gate2("ipu1_di1", "ipu1_di1_sel", base + 0x74, 4);
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