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| author | Raptor Engineering Development Team <support@raptorengineering.com> | 2019-05-01 21:06:29 +0000 |
|---|---|---|
| committer | Raptor Engineering Development Team <support@raptorengineering.com> | 2019-05-03 05:07:00 +0000 |
| commit | 7518ee68db4cdc8bcd34f488aee7a402037a2c6c (patch) | |
| tree | e45e6e9964fabaaee16196bafd4bc8868a44b3c8 | |
| parent | 58ac94e02d6206daf26c9a7a87244d42bf747661 (diff) | |
| download | blackbird-obmc-linux-7518ee68db4cdc8bcd34f488aee7a402037a2c6c.tar.gz blackbird-obmc-linux-7518ee68db4cdc8bcd34f488aee7a402037a2c6c.zip | |
aspeed/pinctrl: Fix simultaneous RS-232 / PWM and DVO outputs on AST2500 devices
There appears to be a small error in the pinmux table on pages 130 and
131 of the AST2500 datasheet v1.6. Specifically, the COND2 requirement
used to mux the surrounding pins to DVI was inadvertently replicated to
pins V1, W1, V2, and W2 in the table, which do not incorporate DVI
functionality.
As a result of this error, both serial TX lines and the PWM 0/1 outputs
were overriding the VPO pinmux settings when VPO was enabled in the
pinmux hogs.
This patch has been verified to function on Blackbird hardware. Both
serial TXD pins and PWM0/PWM1 were functionally tested with SCU94[1:0]
set to 0x1.
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
| -rw-r--r-- | drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c index 187abd7693cf..6f357a11e89a 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c @@ -696,14 +696,14 @@ FUNC_GROUP_DECL(NRTS1, P3); #define V1 94 #define V1_DESC SIG_DESC_SET(SCU84, 22) SIG_EXPR_LIST_DECL_SINGLE(DASHV1, DASHV1, VPIRSVD_DESC, V1_DESC); -SIG_EXPR_LIST_DECL_SINGLE(TXD1, TXD1, V1_DESC, COND2); +SIG_EXPR_LIST_DECL_SINGLE(TXD1, TXD1, V1_DESC); MS_PIN_DECL(V1, GPIOL6, DASHV1, TXD1); FUNC_GROUP_DECL(TXD1, V1); #define W1 95 #define W1_DESC SIG_DESC_SET(SCU84, 23) SIG_EXPR_LIST_DECL_SINGLE(DASHW1, DASHW1, VPIRSVD_DESC, W1_DESC); -SIG_EXPR_LIST_DECL_SINGLE(RXD1, RXD1, W1_DESC, COND2); +SIG_EXPR_LIST_DECL_SINGLE(RXD1, RXD1, W1_DESC); MS_PIN_DECL(W1, GPIOL7, DASHW1, RXD1); FUNC_GROUP_DECL(RXD1, W1); @@ -766,14 +766,14 @@ FUNC_GROUP_DECL(RXD2, T5); #define V2 104 #define V2_DESC SIG_DESC_SET(SCU88, 0) SIG_EXPR_LIST_DECL_SINGLE(DASHN0, DASHN0, VPIRSVD_DESC, V2_DESC); -SIG_EXPR_LIST_DECL_SINGLE(PWM0, PWM0, V2_DESC, COND2); +SIG_EXPR_LIST_DECL_SINGLE(PWM0, PWM0, V2_DESC); MS_PIN_DECL(V2, GPION0, DASHN0, PWM0); FUNC_GROUP_DECL(PWM0, V2); #define W2 105 #define W2_DESC SIG_DESC_SET(SCU88, 1) SIG_EXPR_LIST_DECL_SINGLE(DASHN1, DASHN1, VPIRSVD_DESC, W2_DESC); -SIG_EXPR_LIST_DECL_SINGLE(PWM1, PWM1, W2_DESC, COND2); +SIG_EXPR_LIST_DECL_SINGLE(PWM1, PWM1, W2_DESC); MS_PIN_DECL(W2, GPION1, DASHN1, PWM1); FUNC_GROUP_DECL(PWM1, W2); |
