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| author | Liam Girdwood <lrg@slimlogic.co.uk> | 2010-09-20 09:49:26 +0100 |
|---|---|---|
| committer | Liam Girdwood <lrg@slimlogic.co.uk> | 2010-09-20 09:49:26 +0100 |
| commit | 611ad378b302b931670c8671f9c4d64b52a7be00 (patch) | |
| tree | efc4ed061c15f4887671b82d120c978b9b8f52b5 | |
| parent | 2c4ee9b579d17006ad9a83f13e3ae15c142dc41e (diff) | |
| parent | b9fde18c0582583cf12a4b1c02f621d3addd0a97 (diff) | |
| download | blackbird-obmc-linux-611ad378b302b931670c8671f9c4d64b52a7be00.tar.gz blackbird-obmc-linux-611ad378b302b931670c8671f9c4d64b52a7be00.zip | |
Merge remote branch 'broonie-asoc/for-2.6.37' into for-2.6.37
55 files changed, 2584 insertions, 207 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c index 156ccc960015..d551ed8dea95 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c @@ -551,7 +551,7 @@ static struct resource siu_resources[] = { }; static struct platform_device siu_device = { - .name = "sh_siu", + .name = "siu-pcm-audio", .id = -1, .dev = { .platform_data = &siu_platform_data, diff --git a/drivers/staging/xgifb/TODO b/drivers/staging/xgifb/TODO index 7d71019b84c2..c85ff5e9e700 100644 --- a/drivers/staging/xgifb/TODO +++ b/drivers/staging/xgifb/TODO @@ -12,4 +12,4 @@ TODO: - get rid of non-linux related stuff Please send patches to: -Arnaud Patard <apatard@mandriva.com> +Arnaud Patard <arnaud.patard@rtp-net.org> diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 8b31fdfefc98..43e90b899fe1 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -1919,6 +1919,7 @@ config FB_SH_MOBILE_HDMI tristate "SuperH Mobile HDMI controller support" depends on FB_SH_MOBILE_LCDC select FB_MODE_HELPERS + select SND_SOC ---help--- Driver for the on-chip SH-Mobile HDMI controller. diff --git a/drivers/video/sh_mobile_hdmi.c b/drivers/video/sh_mobile_hdmi.c index 16187d66255c..ef989d94511c 100644 --- a/drivers/video/sh_mobile_hdmi.c +++ b/drivers/video/sh_mobile_hdmi.c @@ -224,13 +224,9 @@ static u8 hdmi_read(struct sh_hdmi *hdmi, u8 reg) return ioread8(hdmi->base + reg); } -/************************************************************************ - - - HDMI sound - - -************************************************************************/ +/* + * HDMI sound + */ static unsigned int sh_hdmi_snd_read(struct snd_soc_codec *codec, unsigned int reg) { @@ -253,9 +249,12 @@ static struct snd_soc_dai_driver sh_hdmi_dai = { .name = "sh_mobile_hdmi-hifi", .playback = { .stream_name = "Playback", - .channels_min = 1, - .channels_max = 2, - .rates = SNDRV_PCM_RATE_8000_48000, + .channels_min = 2, + .channels_max = 8, + .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | + SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | + SNDRV_PCM_RATE_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, }, }; @@ -273,13 +272,10 @@ static struct snd_soc_codec_driver soc_codec_dev_sh_hdmi = { .write = sh_hdmi_snd_write, }; -/************************************************************************ - - - HDMI video - +/* + * HDMI video + */ -************************************************************************/ /* External video parameter settings */ static void hdmi_external_video_param(struct sh_hdmi *hdmi) { @@ -396,20 +392,20 @@ static void sh_hdmi_audio_config(struct sh_hdmi *hdmi) * [6:5] set required down sampling rate if required * [4:3] set required audio source */ - switch (pdata->flags & HDMI_SRC_MASK) { + switch (pdata->flags & HDMI_SND_SRC_MASK) { default: - /* FALL THROUGH */ - case HDMI_SRC_I2S: - data = (0x0 << 3); + /* fall through */ + case HDMI_SND_SRC_I2S: + data = 0x0 << 3; break; - case HDMI_SRC_SPDIF: - data = (0x1 << 3); + case HDMI_SND_SRC_SPDIF: + data = 0x1 << 3; break; - case HDMI_SRC_DSD: - data = (0x2 << 3); + case HDMI_SND_SRC_DSD: + data = 0x2 << 3; break; - case HDMI_SRC_HBR: - data = (0x3 << 3); + case HDMI_SND_SRC_HBR: + data = 0x3 << 3; break; } hdmi_write(hdmi, data, HDMI_AUDIO_SETTING_1); @@ -971,7 +967,7 @@ static int __init sh_hdmi_probe(struct platform_device *pdev) ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_sh_hdmi, &sh_hdmi_dai, 1); if (ret < 0) - goto egetclk; + goto esndreg; hdmi->dev = &pdev->dev; @@ -1058,6 +1054,8 @@ eclkenable: erate: clk_put(hdmi->hdmi_clk); egetclk: + snd_soc_unregister_codec(&pdev->dev); +esndreg: kfree(hdmi); return ret; diff --git a/include/video/sh_mobile_hdmi.h b/include/video/sh_mobile_hdmi.h index 929c2d3147bc..1e1aa54ab2e4 100644 --- a/include/video/sh_mobile_hdmi.h +++ b/include/video/sh_mobile_hdmi.h @@ -23,11 +23,11 @@ struct device; */ /* Audio source select */ -#define HDMI_SRC_MASK (0xF << 0) -#define HDMI_SRC_I2S (0 << 0) /* default */ -#define HDMI_SRC_SPDIF (1 << 0) -#define HDMI_SRC_DSD (2 << 0) -#define HDMI_SRC_HBR (3 << 0) +#define HDMI_SND_SRC_MASK (0xF << 0) +#define HDMI_SND_SRC_I2S (0 << 0) /* default */ +#define HDMI_SND_SRC_SPDIF (1 << 0) +#define HDMI_SND_SRC_DSD (2 << 0) +#define HDMI_SND_SRC_HBR (3 << 0) struct sh_mobile_hdmi_info { struct sh_mobile_lcdc_chan_cfg *lcd_chan; diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 155c1276d1a1..4ccc2b72c3f6 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -67,6 +67,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_WM8971 if I2C select SND_SOC_WM8974 if I2C select SND_SOC_WM8978 if I2C + select SND_SOC_WM8985 if SND_SOC_I2C_AND_SPI select SND_SOC_WM8988 if SND_SOC_I2C_AND_SPI select SND_SOC_WM8990 if I2C select SND_SOC_WM8993 if I2C @@ -269,6 +270,9 @@ config SND_SOC_WM8974 config SND_SOC_WM8978 tristate +config SND_SOC_WM8985 + tristate + config SND_SOC_WM8988 tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 10d468e4a1ed..23e7e2c55858 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -52,6 +52,7 @@ snd-soc-wm8962-objs := wm8962.o wm8962-tables.o snd-soc-wm8971-objs := wm8971.o snd-soc-wm8974-objs := wm8974.o snd-soc-wm8978-objs := wm8978.o +snd-soc-wm8985-objs := wm8985.o snd-soc-wm8988-objs := wm8988.o snd-soc-wm8990-objs := wm8990.o snd-soc-wm8993-objs := wm8993.o @@ -124,6 +125,7 @@ obj-$(CONFIG_SND_SOC_WM8962) += snd-soc-wm8962.o obj-$(CONFIG_SND_SOC_WM8971) += snd-soc-wm8971.o obj-$(CONFIG_SND_SOC_WM8974) += snd-soc-wm8974.o obj-$(CONFIG_SND_SOC_WM8978) += snd-soc-wm8978.o +obj-$(CONFIG_SND_SOC_WM8985) += snd-soc-wm8985.o obj-$(CONFIG_SND_SOC_WM8988) += snd-soc-wm8988.o obj-$(CONFIG_SND_SOC_WM8990) += snd-soc-wm8990.o obj-$(CONFIG_SND_SOC_WM8993) += snd-soc-wm8993.o diff --git a/sound/soc/codecs/ad1980.c b/sound/soc/codecs/ad1980.c index 2b9331a59c71..d36bd1c333b8 100644 --- a/sound/soc/codecs/ad1980.c +++ b/sound/soc/codecs/ad1980.c @@ -247,6 +247,7 @@ static struct snd_soc_codec_driver soc_codec_dev_ad1980 = { .remove = ad1980_soc_remove, .reg_cache_size = ARRAY_SIZE(ad1980_reg), .reg_word_size = sizeof(u16), + .reg_cache_default = ad1980_reg, .reg_cache_step = 2, .write = ac97_write, .read = ac97_read, diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c index c84cc9c00bd9..a95ff4f9f42c 100644 --- a/sound/soc/codecs/ak4642.c +++ b/sound/soc/codecs/ak4642.c @@ -422,7 +422,7 @@ static int ak4642_probe(struct snd_soc_codec *codec) dev_info(codec->dev, "AK4642 Audio Codec %s", AK4642_VERSION); codec->hw_write = (hw_write_t)i2c_master_send; - codec->control_data = ak4642->control_data; + codec->control_data = ak4642->control_data; snd_soc_add_controls(codec, ak4642_snd_controls, ARRAY_SIZE(ak4642_snd_controls)); @@ -431,12 +431,12 @@ static int ak4642_probe(struct snd_soc_codec *codec) } static struct snd_soc_codec_driver soc_codec_dev_ak4642 = { - .probe = ak4642_probe, - .resume = ak4642_resume, - .read = ak4642_read_reg_cache, - .write = ak4642_write, - .reg_cache_size = ARRAY_SIZE(ak4642_reg), - .reg_word_size = sizeof(u8), + .probe = ak4642_probe, + .resume = ak4642_resume, + .read = ak4642_read_reg_cache, + .write = ak4642_write, + .reg_cache_size = ARRAY_SIZE(ak4642_reg), + .reg_word_size = sizeof(u8), .reg_cache_default = ak4642_reg, }; @@ -448,7 +448,7 @@ static __devinit int ak4642_i2c_probe(struct i2c_client *i2c, int ret; ak4642 = kzalloc(sizeof(struct ak4642_priv), GFP_KERNEL); - if (ak4642 == NULL) + if (!ak4642) return -ENOMEM; i2c_set_clientdata(i2c, ak4642); @@ -481,9 +481,9 @@ static struct i2c_driver ak4642_i2c_driver = { .name = "ak4642-codec", .owner = THIS_MODULE, }, - .probe = ak4642_i2c_probe, - .remove = __devexit_p(ak4642_i2c_remove), - .id_table = ak4642_i2c_id, + .probe = ak4642_i2c_probe, + .remove = __devexit_p(ak4642_i2c_remove), + .id_table = ak4642_i2c_id, }; #endif diff --git a/sound/soc/codecs/ak4671.c b/sound/soc/codecs/ak4671.c index 239f0562003c..24f5f49bb9d2 100644 --- a/sound/soc/codecs/ak4671.c +++ b/sound/soc/codecs/ak4671.c @@ -642,7 +642,6 @@ static int ak4671_probe(struct snd_soc_codec *codec) int ret; codec->hw_write = (hw_write_t)i2c_master_send; - codec->bias_level = SND_SOC_BIAS_OFF; ret = snd_soc_codec_set_cache_io(codec, 8, 8, ak4671->control_type); if (ret < 0) { diff --git a/sound/soc/codecs/cs42l51.c b/sound/soc/codecs/cs42l51.c index 39fbcff20258..cb086eaf4e07 100644 --- a/sound/soc/codecs/cs42l51.c +++ b/sound/soc/codecs/cs42l51.c @@ -649,6 +649,6 @@ static void __exit cs42l51_exit(void) } module_exit(cs42l51_exit); -MODULE_AUTHOR("Arnaud Patard <apatard@mandriva.com>"); +MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>"); MODULE_DESCRIPTION("Cirrus Logic CS42L51 ALSA SoC Codec Driver"); MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/da7210.c b/sound/soc/codecs/da7210.c index eabf3c062500..58bb9b994811 100644 --- a/sound/soc/codecs/da7210.c +++ b/sound/soc/codecs/da7210.c @@ -454,7 +454,7 @@ static int da7210_probe(struct snd_soc_codec *codec) dev_info(codec->dev, "DA7210 Audio Codec %s\n", DA7210_VERSION); - codec->control_data = da7210->control_data; + codec->control_data = da7210->control_data; codec->hw_write = (hw_write_t)i2c_master_send; /* FIXME @@ -547,11 +547,11 @@ static int da7210_probe(struct snd_soc_codec *codec) } static struct snd_soc_codec_driver soc_codec_dev_da7210 = { - .probe = da7210_probe, - .read = da7210_read, - .write = da7210_write, - .reg_cache_size = ARRAY_SIZE(da7210_reg), - .reg_word_size = sizeof(u8), + .probe = da7210_probe, + .read = da7210_read, + .write = da7210_write, + .reg_cache_size = ARRAY_SIZE(da7210_reg), + .reg_word_size = sizeof(u8), .reg_cache_default = da7210_reg, }; @@ -597,9 +597,9 @@ static struct i2c_driver da7210_i2c_driver = { .name = "da7210-codec", .owner = THIS_MODULE, }, - .probe = da7210_i2c_probe, - .remove = __devexit_p(da7210_i2c_remove), - .id_table = da7210_i2c_id, + .probe = da7210_i2c_probe, + .remove = __devexit_p(da7210_i2c_remove), + .id_table = da7210_i2c_id, }; #endif diff --git a/sound/soc/codecs/ssm2602.c b/sound/soc/codecs/ssm2602.c index 67d8c044ca04..6f38d619bf8a 100644 --- a/sound/soc/codecs/ssm2602.c +++ b/sound/soc/codecs/ssm2602.c @@ -560,7 +560,6 @@ static int ssm2602_probe(struct snd_soc_codec *codec) pr_info("ssm2602 Audio Codec %s", SSM2602_VERSION); - codec->bias_level = SND_SOC_BIAS_OFF, codec->control_data = ssm2602->control_data; ssm2602_reset(codec); diff --git a/sound/soc/codecs/tlv320dac33.c b/sound/soc/codecs/tlv320dac33.c index a3c5b521da6a..bf6d01f4a45a 100644 --- a/sound/soc/codecs/tlv320dac33.c +++ b/sound/soc/codecs/tlv320dac33.c @@ -1385,7 +1385,6 @@ static int dac33_soc_probe(struct snd_soc_codec *codec) codec->control_data = dac33->control_data; codec->hw_write = (hw_write_t) i2c_master_send; - codec->bias_level = SND_SOC_BIAS_OFF; codec->idle_bias_off = 1; dac33->codec = codec; diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c index c7ee1a4c9d99..cbebec6ba1ba 100644 --- a/sound/soc/codecs/twl4030.c +++ b/sound/soc/codecs/twl4030.c @@ -2245,7 +2245,6 @@ static int twl4030_soc_probe(struct snd_soc_codec *codec) snd_soc_codec_set_drvdata(codec, twl4030); /* Set the defaults, and power up the codec */ twl4030->sysclk = twl4030_codec_get_mclk() / 1000; - codec->bias_level = SND_SOC_BIAS_OFF; codec->idle_bias_off = 1; twl4030_init_chip(codec); diff --git a/sound/soc/codecs/wm8510.c b/sound/soc/codecs/wm8510.c index d00da2001a12..02ecf54de020 100644 --- a/sound/soc/codecs/wm8510.c +++ b/sound/soc/codecs/wm8510.c @@ -569,7 +569,6 @@ static int wm8510_probe(struct snd_soc_codec *codec) wm8510_reset(codec); /* power on device */ - codec->bias_level = SND_SOC_BIAS_OFF; wm8510_set_bias_level(codec, SND_SOC_BIAS_STANDBY); snd_soc_add_controls(codec, wm8510_snd_controls, ARRAY_SIZE(wm8510_snd_controls)); diff --git a/sound/soc/codecs/wm8580.c b/sound/soc/codecs/wm8580.c index 910c62a3f594..ad5987e6c9ca 100644 --- a/sound/soc/codecs/wm8580.c +++ b/sound/soc/codecs/wm8580.c @@ -907,7 +907,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8580 = { .probe = wm8580_probe, .remove = wm8580_remove, .set_bias_level = wm8580_set_bias_level, - .reg_cache_size = sizeof(wm8580_reg), + .reg_cache_size = ARRAY_SIZE(wm8580_reg), .reg_word_size = sizeof(u16), .reg_cache_default = &wm8580_reg, }; diff --git a/sound/soc/codecs/wm8711.c b/sound/soc/codecs/wm8711.c index f8d9c60e7fad..52a923a7861e 100644 --- a/sound/soc/codecs/wm8711.c +++ b/sound/soc/codecs/wm8711.c @@ -418,7 +418,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8711 = { .suspend = wm8711_suspend, .resume = wm8711_resume, .set_bias_level = wm8711_set_bias_level, - .reg_cache_size = sizeof(wm8711_reg), + .reg_cache_size = ARRAY_SIZE(wm8711_reg), .reg_word_size = sizeof(u16), .reg_cache_default = wm8711_reg, }; diff --git a/sound/soc/codecs/wm8728.c b/sound/soc/codecs/wm8728.c index 5e5a1625194c..32eba85b0a2c 100644 --- a/sound/soc/codecs/wm8728.c +++ b/sound/soc/codecs/wm8728.c @@ -272,7 +272,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8728 = { .suspend = wm8728_suspend, .resume = wm8728_resume, .set_bias_level = wm8728_set_bias_level, - .reg_cache_size = sizeof(wm8728_reg_defaults), + .reg_cache_size = ARRAY_SIZE(wm8728_reg_defaults), .reg_word_size = sizeof(u16), .reg_cache_default = wm8728_reg_defaults, }; diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c index 56f540838745..bdce125bbd81 100644 --- a/sound/soc/codecs/wm8731.c +++ b/sound/soc/codecs/wm8731.c @@ -488,8 +488,6 @@ static int wm8731_probe(struct snd_soc_codec *codec) struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec); int ret = 0, i; - codec->bias_level = SND_SOC_BIAS_OFF, - ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8731->control_type); if (ret < 0) { dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); @@ -567,7 +565,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8731 = { .suspend = wm8731_suspend, .resume = wm8731_resume, .set_bias_level = wm8731_set_bias_level, - .reg_cache_size = sizeof(wm8731_reg), + .reg_cache_size = ARRAY_SIZE(wm8731_reg), .reg_word_size = sizeof(u16), .reg_cache_default = wm8731_reg, }; diff --git a/sound/soc/codecs/wm8741.c b/sound/soc/codecs/wm8741.c index c8e7a264bbae..90e31e9aa6f7 100644 --- a/sound/soc/codecs/wm8741.c +++ b/sound/soc/codecs/wm8741.c @@ -453,7 +453,7 @@ static int wm8741_probe(struct snd_soc_codec *codec) static struct snd_soc_codec_driver soc_codec_dev_wm8741 = { .probe = wm8741_probe, .resume = wm8741_resume, - .reg_cache_size = sizeof(wm8741_reg_defaults), + .reg_cache_size = ARRAY_SIZE(wm8741_reg_defaults), .reg_word_size = sizeof(u16), .reg_cache_default = &wm8741_reg_defaults, }; diff --git a/sound/soc/codecs/wm8750.c b/sound/soc/codecs/wm8750.c index 92d4b2aef93b..4d1ec9dc86ff 100644 --- a/sound/soc/codecs/wm8750.c +++ b/sound/soc/codecs/wm8750.c @@ -747,7 +747,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8750 = { .suspend = wm8750_suspend, .resume = wm8750_resume, .set_bias_level = wm8750_set_bias_level, - .reg_cache_size = sizeof(wm8750_reg), + .reg_cache_size = ARRAY_SIZE(wm8750_reg), .reg_word_size = sizeof(u16), .reg_cache_default = wm8750_reg, }; diff --git a/sound/soc/codecs/wm8753.c b/sound/soc/codecs/wm8753.c index 4a945d3edf25..64ea06610038 100644 --- a/sound/soc/codecs/wm8753.c +++ b/sound/soc/codecs/wm8753.c @@ -1550,7 +1550,6 @@ static int wm8753_probe(struct snd_soc_codec *codec) struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec); int ret = 0, reg; - codec->bias_level = SND_SOC_BIAS_OFF; INIT_DELAYED_WORK(&codec->delayed_work, wm8753_work); ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8753->control_type); @@ -1617,7 +1616,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8753 = { .suspend = wm8753_suspend, .resume = wm8753_resume, .set_bias_level = wm8753_set_bias_level, - .reg_cache_size = sizeof(wm8753_reg), + .reg_cache_size = ARRAY_SIZE(wm8753_reg), .reg_word_size = sizeof(u16), .reg_cache_default = wm8753_reg, }; diff --git a/sound/soc/codecs/wm8776.c b/sound/soc/codecs/wm8776.c index 05d98dd26072..c0b69179855a 100644 --- a/sound/soc/codecs/wm8776.c +++ b/sound/soc/codecs/wm8776.c @@ -448,7 +448,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8776 = { .suspend = wm8776_suspend, .resume = wm8776_resume, .set_bias_level = wm8776_set_bias_level, - .reg_cache_size = sizeof(wm8776_reg), + .reg_cache_size = ARRAY_SIZE(wm8776_reg), .reg_word_size = sizeof(u16), .reg_cache_default = wm8776_reg, }; diff --git a/sound/soc/codecs/wm8900.c b/sound/soc/codecs/wm8900.c index 1378aab5ca75..25c8ccdb6e8d 100644 --- a/sound/soc/codecs/wm8900.c +++ b/sound/soc/codecs/wm8900.c @@ -1256,7 +1256,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8900 = { .resume = wm8900_resume, .set_bias_level = wm8900_set_bias_level, .volatile_register = wm8900_volatile_register, - .reg_cache_size = sizeof(wm8900_reg_defaults), + .reg_cache_size = ARRAY_SIZE(wm8900_reg_defaults), .reg_word_size = sizeof(u16), .reg_cache_default = wm8900_reg_defaults, }; diff --git a/sound/soc/codecs/wm8940.c b/sound/soc/codecs/wm8940.c index d28bf0dfdb1d..2cb16f895c46 100644 --- a/sound/soc/codecs/wm8940.c +++ b/sound/soc/codecs/wm8940.c @@ -750,7 +750,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8940 = { .suspend = wm8940_suspend, .resume = wm8940_resume, .set_bias_level = wm8940_set_bias_level, - .reg_cache_size = sizeof(wm8940_reg_defaults), + .reg_cache_size = ARRAY_SIZE(wm8940_reg_defaults), .reg_word_size = sizeof(u16), .reg_cache_default = wm8940_reg_defaults, }; diff --git a/sound/soc/codecs/wm8961.c b/sound/soc/codecs/wm8961.c index bfc6578ed060..4f326f604104 100644 --- a/sound/soc/codecs/wm8961.c +++ b/sound/soc/codecs/wm8961.c @@ -1075,7 +1075,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8961 = { .suspend = wm8961_suspend, .resume = wm8961_resume, .set_bias_level = wm8961_set_bias_level, - .reg_cache_size = sizeof(wm8961_reg_defaults), + .reg_cache_size = ARRAY_SIZE(wm8961_reg_defaults), .reg_word_size = sizeof(u16), .reg_cache_default = wm8961_reg_defaults, .volatile_register = wm8961_volatile_register, diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index 58ba2d3ca533..30984dd15c48 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c @@ -1780,7 +1780,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8962 = { .remove = wm8962_remove, .resume = wm8962_resume, .set_bias_level = wm8962_set_bias_level, - .reg_cache_size = WM8962_MAX_REGISTER, + .reg_cache_size = WM8962_MAX_REGISTER + 1, .reg_word_size = sizeof(u16), .reg_cache_default = wm8962_reg, .volatile_register = wm8962_volatile_register, diff --git a/sound/soc/codecs/wm8985.c b/sound/soc/codecs/wm8985.c new file mode 100644 index 000000000000..247585a19be5 --- /dev/null +++ b/sound/soc/codecs/wm8985.c @@ -0,0 +1,1195 @@ +/* + * wm8985.c -- WM8985 ALSA SoC Audio driver + * + * Copyright 2010 Wolfson Microelectronics plc + * + * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * TODO: + * o Add OUT3/OUT4 mixer controls. + */ + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pm.h> +#include <linux/i2c.h> +#include <linux/regulator/consumer.h> +#include <linux/spi/spi.h> +#include <linux/slab.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> + +#include "wm8985.h" + +#define WM8985_NUM_SUPPLIES 4 +static const char *wm8985_supply_names[WM8985_NUM_SUPPLIES] = { + "DCVDD", + "DBVDD", + "AVDD1", + "AVDD2" +}; + +static const u16 wm8985_reg_defs[] = { + 0x0000, /* R0 - Software Reset */ + 0x0000, /* R1 - Power management 1 */ + 0x0000, /* R2 - Power management 2 */ + 0x0000, /* R3 - Power management 3 */ + 0x0050, /* R4 - Audio Interface */ + 0x0000, /* R5 - Companding control */ + 0x0140, /* R6 - Clock Gen control */ + 0x0000, /* R7 - Additional control */ + 0x0000, /* R8 - GPIO Control */ + 0x0000, /* R9 - Jack Detect Control 1 */ + 0x0000, /* R10 - DAC Control */ + 0x00FF, /* R11 - Left DAC digital Vol */ + 0x00FF, /* R12 - Right DAC digital vol */ + 0x0000, /* R13 - Jack Detect Control 2 */ + 0x0100, /* R14 - ADC Control */ + 0x00FF, /* R15 - Left ADC Digital Vol */ + 0x00FF, /* R16 - Right ADC Digital Vol */ + 0x0000, /* R17 */ + 0x012C, /* R18 - EQ1 - low shelf */ + 0x002C, /* R19 - EQ2 - peak 1 */ + 0x002C, /* R20 - EQ3 - peak 2 */ + 0x002C, /* R21 - EQ4 - peak 3 */ + 0x002C, /* R22 - EQ5 - high shelf */ + 0x0000, /* R23 */ + 0x0032, /* R24 - DAC Limiter 1 */ + 0x0000, /* R25 - DAC Limiter 2 */ + 0x0000, /* R26 */ + 0x0000, /* R27 - Notch Filter 1 */ + 0x0000, /* R28 - Notch Filter 2 */ + 0x0000, /* R29 - Notch Filter 3 */ + 0x0000, /* R30 - Notch Filter 4 */ + 0x0000, /* R31 */ + 0x0038, /* R32 - ALC control 1 */ + 0x000B, /* R33 - ALC control 2 */ + 0x0032, /* R34 - ALC control 3 */ + 0x0000, /* R35 - Noise Gate */ + 0x0008, /* R36 - PLL N */ + 0x000C, /* R37 - PLL K 1 */ + 0x0093, /* R38 - PLL K 2 */ + 0x00E9, /* R39 - PLL K 3 */ + 0x0000, /* R40 */ + 0x0000, /* R41 - 3D control */ + 0x0000, /* R42 - OUT4 to ADC */ + 0x0000, /* R43 - Beep control */ + 0x0033, /* R44 - Input ctrl */ + 0x0010, /* R45 - Left INP PGA gain ctrl */ + 0x0010, /* R46 - Right INP PGA gain ctrl */ + 0x0100, /* R47 - Left ADC BOOST ctrl */ + 0x0100, /* R48 - Right ADC BOOST ctrl */ + 0x0002, /* R49 - Output ctrl */ + 0x0001, /* R50 - Left mixer ctrl */ + 0x0001, /* R51 - Right mixer ctrl */ + 0x0039, /* R52 - LOUT1 (HP) volume ctrl */ + 0x0039, /* R53 - ROUT1 (HP) volume ctrl */ + 0x0039, /* R54 - LOUT2 (SPK) volume ctrl */ + 0x0039, /* R55 - ROUT2 (SPK) volume ctrl */ + 0x0001, /* R56 - OUT3 mixer ctrl */ + 0x0001, /* R57 - OUT4 (MONO) mix ctrl */ + 0x0001, /* R58 */ + 0x0000, /* R59 */ + 0x0004, /* R60 - OUTPUT ctrl */ + 0x0000, /* R61 - BIAS CTRL */ + 0x0180, /* R62 */ + 0x0000 /* R63 */ +}; + +/* + * latch bit 8 of these registers to ensure instant + * volume updates + */ +static const int volume_update_regs[] = { + WM8985_LEFT_DAC_DIGITAL_VOL, + WM8985_RIGHT_DAC_DIGITAL_VOL, + WM8985_LEFT_ADC_DIGITAL_VOL, + WM8985_RIGHT_ADC_DIGITAL_VOL, + WM8985_LOUT2_SPK_VOLUME_CTRL, + WM8985_ROUT2_SPK_VOLUME_CTRL, + WM8985_LOUT1_HP_VOLUME_CTRL, + WM8985_ROUT1_HP_VOLUME_CTRL, + WM8985_LEFT_INP_PGA_GAIN_CTRL, + WM8985_RIGHT_INP_PGA_GAIN_CTRL +}; + +struct wm8985_priv { + enum snd_soc_control_type control_type; + struct regulator_bulk_data supplies[WM8985_NUM_SUPPLIES]; + unsigned int sysclk; + unsigned int bclk; +}; + +static const struct { + int div; + int ratio; +} fs_ratios[] = { + { 10, 128 }, + { 15, 192 }, + { 20, 256 }, + { 30, 384 }, + { 40, 512 }, + { 60, 768 }, + { 80, 1024 }, + { 120, 1536 } +}; + +static const int srates[] = { 48000, 32000, 24000, 16000, 12000, 8000 }; + +static const int bclk_divs[] = { + 1, 2, 4, 8, 16, 32 +}; + +static int eqmode_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); +static int eqmode_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + +static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1); +static const DECLARE_TLV_DB_SCALE(adc_tlv, -12700, 50, 1); +static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0); +static const DECLARE_TLV_DB_SCALE(lim_thresh_tlv, -600, 100, 0); +static const DECLARE_TLV_DB_SCALE(lim_boost_tlv, 0, 100, 0); +static const DECLARE_TLV_DB_SCALE(alc_min_tlv, -1200, 600, 0); +static const DECLARE_TLV_DB_SCALE(alc_max_tlv, -675, 600, 0); +static const DECLARE_TLV_DB_SCALE(alc_tar_tlv, -2250, 150, 0); +static const DECLARE_TLV_DB_SCALE(pga_vol_tlv, -1200, 75, 0); +static const DECLARE_TLV_DB_SCALE(boost_tlv, -1200, 300, 1); +static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); +static const DECLARE_TLV_DB_SCALE(aux_tlv, -1500, 300, 0); +static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0); +static const DECLARE_TLV_DB_SCALE(pga_boost_tlv, 0, 2000, 0); + +static const char *alc_sel_text[] = { "Off", "Right", "Left", "Stereo" }; +static const SOC_ENUM_SINGLE_DECL(alc_sel, WM8985_ALC_CONTROL_1, 7, + alc_sel_text); + +static const char *alc_mode_text[] = { "ALC", "Limiter" }; +static const SOC_ENUM_SINGLE_DECL(alc_mode, WM8985_ALC_CONTROL_3, 8, + alc_mode_text); + +static const char *filter_mode_text[] = { "Audio", "Application" }; +static const SOC_ENUM_SINGLE_DECL(filter_mode, WM8985_ADC_CONTROL, 7, + filter_mode_text); + +static const char *eq_bw_text[] = { "Narrow", "Wide" }; +static const char *eqmode_text[] = { "Capture", "Playback" }; +static const SOC_ENUM_SINGLE_DECL(eqmode, WM8985_EQ1_LOW_SHELF, 8, + eqmode_text); +static const char *eq1_cutoff_text[] = { + "80Hz", "105Hz", "135Hz", "175Hz" +}; +static const SOC_ENUM_SINGLE_DECL(eq1_cutoff, WM8985_EQ1_LOW_SHELF, 5, + eq1_cutoff_text); +static const char *eq2_cutoff_text[] = { + "230Hz", "300Hz", "385Hz", "500Hz" +}; +static const SOC_ENUM_SINGLE_DECL(eq2_bw, WM8985_EQ2_PEAK_1, 8, eq_bw_text); +static const SOC_ENUM_SINGLE_DECL(eq2_cutoff, WM8985_EQ2_PEAK_1, 5, + eq2_cutoff_text); +static const char *eq3_cutoff_text[] = { + "650Hz", "850Hz", "1.1kHz", "1.4kHz" +}; +static const SOC_ENUM_SINGLE_DECL(eq3_bw, WM8985_EQ3_PEAK_2, 8, eq_bw_text); +static const SOC_ENUM_SINGLE_DECL(eq3_cutoff, WM8985_EQ3_PEAK_2, 5, + eq3_cutoff_text); +static const char *eq4_cutoff_text[] = { + "1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz" +}; +static const SOC_ENUM_SINGLE_DECL(eq4_bw, WM8985_EQ4_PEAK_3, 8, eq_bw_text); +static const SOC_ENUM_SINGLE_DECL(eq4_cutoff, WM8985_EQ4_PEAK_3, 5, + eq4_cutoff_text); +static const char *eq5_cutoff_text[] = { + "5.3kHz", "6.9kHz", "9kHz", "11.7kHz" +}; +static const SOC_ENUM_SINGLE_DECL(eq5_cutoff, WM8985_EQ5_HIGH_SHELF, 5, + eq5_cutoff_text); + +static const char *speaker_mode_text[] = { "Class A/B", "Class D" }; +static const SOC_ENUM_SINGLE_DECL(speaker_mode, 0x17, 8, speaker_mode_text); + +static const char *depth_3d_text[] = { + "Off", + "6.67%", + "13.3%", + "20%", + "26.7%", + "33.3%", + "40%", + "46.6%", + "53.3%", + "60%", + "66.7%", + "73.3%", + "80%", + "86.7%", + "93.3%", + "100%" +}; +static const SOC_ENUM_SINGLE_DECL(depth_3d, WM8985_3D_CONTROL, 0, + depth_3d_text); + +static const struct snd_kcontrol_new wm8985_snd_controls[] = { + SOC_SINGLE("Digital Loopback Switch", WM8985_COMPANDING_CONTROL, + 0, 1, 0), + + SOC_ENUM("ALC Capture Function", alc_sel), + SOC_SINGLE_TLV("ALC Capture Max Volume", WM8985_ALC_CONTROL_1, + 3, 7, 0, alc_max_tlv), + SOC_SINGLE_TLV("ALC Capture Min Volume", WM8985_ALC_CONTROL_1, + 0, 7, 0, alc_min_tlv), + SOC_SINGLE_TLV("ALC Capture Target Volume", WM8985_ALC_CONTROL_2, + 0, 15, 0, alc_tar_tlv), + SOC_SINGLE("ALC Capture Attack", WM8985_ALC_CONTROL_3, 0, 10, 0), + SOC_SINGLE("ALC Capture Hold", WM8985_ALC_CONTROL_2, 4, 10, 0), + SOC_SINGLE("ALC Capture Decay", WM8985_ALC_CONTROL_3, 4, 10, 0), + SOC_ENUM("ALC Mode", alc_mode), + SOC_SINGLE("ALC Capture NG Switch", WM8985_NOISE_GATE, + 3, 1, 0), + SOC_SINGLE("ALC Capture NG Threshold", WM8985_NOISE_GATE, + 0, 7, 1), + + SOC_DOUBLE_R_TLV("Capture Volume", WM8985_LEFT_ADC_DIGITAL_VOL, + WM8985_RIGHT_ADC_DIGITAL_VOL, 0, 255, 0, adc_tlv), + SOC_DOUBLE_R("Capture PGA ZC Switch", WM8985_LEFT_INP_PGA_GAIN_CTRL, + WM8985_RIGHT_INP_PGA_GAIN_CTRL, 7, 1, 0), + SOC_DOUBLE_R_TLV("Capture PGA Volume", WM8985_LEFT_INP_PGA_GAIN_CTRL, + WM8985_RIGHT_INP_PGA_GAIN_CTRL, 0, 63, 0, pga_vol_tlv), + + SOC_DOUBLE_R_TLV("Capture PGA Boost Volume", + WM8985_LEFT_ADC_BOOST_CTRL, WM8985_RIGHT_ADC_BOOST_CTRL, + 8, 1, 0, pga_boost_tlv), + + SOC_DOUBLE("ADC Inversion Switch", WM8985_ADC_CONTROL, 0, 1, 1, 0), + SOC_SINGLE("ADC 128x Oversampling Switch", WM8985_ADC_CONTROL, 8, 1, 0), + + SOC_DOUBLE_R_TLV("Playback Volume", WM8985_LEFT_DAC_DIGITAL_VOL, + WM8985_RIGHT_DAC_DIGITAL_VOL, 0, 255, 0, dac_tlv), + + SOC_SINGLE("DAC Playback Limiter Switch", WM8985_DAC_LIMITER_1, 8, 1, 0), + SOC_SINGLE("DAC Playback Limiter Decay", WM8985_DAC_LIMITER_1, 4, 10, 0), + SOC_SINGLE("DAC Playback Limiter Attack", WM8985_DAC_LIMITER_1, 0, 11, 0), + SOC_SINGLE_TLV("DAC Playback Limiter Threshold", WM8985_DAC_LIMITER_2, + 4, 7, 1, lim_thresh_tlv), + SOC_SINGLE_TLV("DAC Playback Limiter Boost Volume", WM8985_DAC_LIMITER_2, + 0, 12, 0, lim_boost_tlv), + SOC_DOUBLE("DAC Inversion Switch", WM8985_DAC_CONTROL, 0, 1, 1, 0), + SOC_SINGLE("DAC Auto Mute Switch", WM8985_DAC_CONTROL, 2, 1, 0), + SOC_SINGLE("DAC 128x Oversampling Switch", WM8985_DAC_CONTROL, 3, 1, 0), + + SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8985_LOUT1_HP_VOLUME_CTRL, + WM8985_ROUT1_HP_VOLUME_CTRL, 0, 63, 0, out_tlv), + SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8985_LOUT1_HP_VOLUME_CTRL, + WM8985_ROUT1_HP_VOLUME_CTRL, 7, 1, 0), + SOC_DOUBLE_R("Headphone Switch", WM8985_LOUT1_HP_VOLUME_CTRL, + WM8985_ROUT1_HP_VOLUME_CTRL, 6, 1, 1), + + SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8985_LOUT2_SPK_VOLUME_CTRL, + WM8985_ROUT2_SPK_VOLUME_CTRL, 0, 63, 0, out_tlv), + SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8985_LOUT2_SPK_VOLUME_CTRL, + WM8985_ROUT2_SPK_VOLUME_CTRL, 7, 1, 0), + SOC_DOUBLE_R("Speaker Switch", WM8985_LOUT2_SPK_VOLUME_CTRL, + WM8985_ROUT2_SPK_VOLUME_CTRL, 6, 1, 1), + + SOC_SINGLE("High Pass Filter Switch", WM8985_ADC_CONTROL, 8, 1, 0), + SOC_ENUM("High Pass Filter Mode", filter_mode), + SOC_SINGLE("High Pass Filter Cutoff", WM8985_ADC_CONTROL, 4, 7, 0), + + SOC_DOUBLE_R_TLV("Aux Bypass Volume", + WM8985_LEFT_MIXER_CTRL, WM8985_RIGHT_MIXER_CTRL, 6, 7, 0, + aux_tlv), + + SOC_DOUBLE_R_TLV("Input PGA Bypass Volume", + WM8985_LEFT_MIXER_CTRL, WM8985_RIGHT_MIXER_CTRL, 2, 7, 0, + bypass_tlv), + + SOC_ENUM_EXT("Equalizer Function", eqmode, eqmode_get, eqmode_put), + SOC_ENUM("EQ1 Cutoff", eq1_cutoff), + SOC_SINGLE_TLV("EQ1 Volume", WM8985_EQ1_LOW_SHELF, 0, 24, 1, eq_tlv), + SOC_ENUM("EQ2 Bandwith", eq2_bw), + SOC_ENUM("EQ2 Cutoff", eq2_cutoff), + SOC_SINGLE_TLV("EQ2 Volume", WM8985_EQ2_PEAK_1, 0, 24, 1, eq_tlv), + SOC_ENUM("EQ3 Bandwith", eq3_bw), + SOC_ENUM("EQ3 Cutoff", eq3_cutoff), + SOC_SINGLE_TLV("EQ3 Volume", WM8985_EQ3_PEAK_2, 0, 24, 1, eq_tlv), + SOC_ENUM("EQ4 Bandwith", eq4_bw), + SOC_ENUM("EQ4 Cutoff", eq4_cutoff), + SOC_SINGLE_TLV("EQ4 Volume", WM8985_EQ4_PEAK_3, 0, 24, 1, eq_tlv), + SOC_ENUM("EQ5 Cutoff", eq5_cutoff), + SOC_SINGLE_TLV("EQ5 Volume", WM8985_EQ5_HIGH_SHELF, 0, 24, 1, eq_tlv), + + SOC_ENUM("3D Depth", depth_3d), + + SOC_ENUM("Speaker Mode", speaker_mode) +}; + +static const struct snd_kcontrol_new left_out_mixer[] = { + SOC_DAPM_SINGLE("Line Switch", WM8985_LEFT_MIXER_CTRL, 1, 1, 0), + SOC_DAPM_SINGLE("Aux Switch", WM8985_LEFT_MIXER_CTRL, 5, 1, 0), + SOC_DAPM_SINGLE("PCM Switch", WM8985_LEFT_MIXER_CTRL, 0, 1, 0), +}; + +static const struct snd_kcontrol_new right_out_mixer[] = { + SOC_DAPM_SINGLE("Line Switch", WM8985_RIGHT_MIXER_CTRL, 1, 1, 0), + SOC_DAPM_SINGLE("Aux Switch", WM8985_RIGHT_MIXER_CTRL, 5, 1, 0), + SOC_DAPM_SINGLE("PCM Switch", WM8985_RIGHT_MIXER_CTRL, 0, 1, 0), +}; + +static const struct snd_kcontrol_new left_input_mixer[] = { + SOC_DAPM_SINGLE("L2 Switch", WM8985_INPUT_CTRL, 2, 1, 0), + SOC_DAPM_SINGLE("MicN Switch", WM8985_INPUT_CTRL, 1, 1, 0), + SOC_DAPM_SINGLE("MicP Switch", WM8985_INPUT_CTRL, 0, 1, 0), +}; + +static const struct snd_kcontrol_new right_input_mixer[] = { + SOC_DAPM_SINGLE("R2 Switch", WM8985_INPUT_CTRL, 6, 1, 0), + SOC_DAPM_SINGLE("MicN Switch", WM8985_INPUT_CTRL, 5, 1, 0), + SOC_DAPM_SINGLE("MicP Switch", WM8985_INPUT_CTRL, 4, 1, 0), +}; + +static const struct snd_kcontrol_new left_boost_mixer[] = { + SOC_DAPM_SINGLE_TLV("L2 Volume", WM8985_LEFT_ADC_BOOST_CTRL, + 4, 7, 0, boost_tlv), + SOC_DAPM_SINGLE_TLV("AUXL Volume", WM8985_LEFT_ADC_BOOST_CTRL, + 0, 7, 0, boost_tlv) +}; + +static const struct snd_kcontrol_new right_boost_mixer[] = { + SOC_DAPM_SINGLE_TLV("R2 Volume", WM8985_RIGHT_ADC_BOOST_CTRL, + 4, 7, 0, boost_tlv), + SOC_DAPM_SINGLE_TLV("AUXR Volume", WM8985_RIGHT_ADC_BOOST_CTRL, + 0, 7, 0, boost_tlv) +}; + +static const struct snd_soc_dapm_widget wm8985_dapm_widgets[] = { + SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8985_POWER_MANAGEMENT_3, + 0, 0), + SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8985_POWER_MANAGEMENT_3, + 1, 0), + SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8985_POWER_MANAGEMENT_2, + 0, 0), + SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8985_POWER_MANAGEMENT_2, + 1, 0), + + SND_SOC_DAPM_MIXER("Left Output Mixer", WM8985_POWER_MANAGEMENT_3, + 2, 0, left_out_mixer, ARRAY_SIZE(left_out_mixer)), + SND_SOC_DAPM_MIXER("Right Output Mixer", WM8985_POWER_MANAGEMENT_3, + 3, 0, right_out_mixer, ARRAY_SIZE(right_out_mixer)), + + SND_SOC_DAPM_MIXER("Left Input Mixer", WM8985_POWER_MANAGEMENT_2, + 2, 0, left_input_mixer, ARRAY_SIZE(left_input_mixer)), + SND_SOC_DAPM_MIXER("Right Input Mixer", WM8985_POWER_MANAGEMENT_2, + 3, 0, right_input_mixer, ARRAY_SIZE(right_input_mixer)), + + SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8985_POWER_MANAGEMENT_2, + 4, 0, left_boost_mixer, ARRAY_SIZE(left_boost_mixer)), + SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8985_POWER_MANAGEMENT_2, + 5, 0, right_boost_mixer, ARRAY_SIZE(right_boost_mixer)), + + SND_SOC_DAPM_PGA("Left Capture PGA", WM8985_LEFT_INP_PGA_GAIN_CTRL, + 6, 1, NULL, 0), + SND_SOC_DAPM_PGA("Right Capture PGA", WM8985_RIGHT_INP_PGA_GAIN_CTRL, + 6, 1, NULL, 0), + + SND_SOC_DAPM_PGA("Left Headphone Out", WM8985_POWER_MANAGEMENT_2, + 7, 0, NULL, 0), + SND_SOC_DAPM_PGA("Right Headphone Out", WM8985_POWER_MANAGEMENT_2, + 8, 0, NULL, 0), + + SND_SOC_DAPM_PGA("Left Speaker Out", WM8985_POWER_MANAGEMENT_3, + 5, 0, NULL, 0), + SND_SOC_DAPM_PGA("Right Speaker Out", WM8985_POWER_MANAGEMENT_3, + 6, 0, NULL, 0), + + SND_SOC_DAPM_MICBIAS("Mic Bias", WM8985_POWER_MANAGEMENT_1, 4, 0), + + SND_SOC_DAPM_INPUT("LIN"), + SND_SOC_DAPM_INPUT("LIP"), + SND_SOC_DAPM_INPUT("RIN"), + SND_SOC_DAPM_INPUT("RIP"), + SND_SOC_DAPM_INPUT("AUXL"), + SND_SOC_DAPM_INPUT("AUXR"), + SND_SOC_DAPM_INPUT("L2"), + SND_SOC_DAPM_INPUT("R2"), + SND_SOC_DAPM_OUTPUT("HPL"), + SND_SOC_DAPM_OUTPUT("HPR"), + SND_SOC_DAPM_OUTPUT("SPKL"), + SND_SOC_DAPM_OUTPUT("SPKR") +}; + +static const struct snd_soc_dapm_route audio_map[] = { + { "Right Output Mixer", "PCM Switch", "Right DAC" }, + { "Right Output Mixer", "Aux Switch", "AUXR" }, + { "Right Output Mixer", "Line Switch", "Right Boost Mixer" }, + + { "Left Output Mixer", "PCM Switch", "Left DAC" }, + { "Left Output Mixer", "Aux Switch", "AUXL" }, + { "Left Output Mixer", "Line Switch", "Left Boost Mixer" }, + + { "Right Headphone Out", NULL, "Right Output Mixer" }, + { "HPR", NULL, "Right Headphone Out" }, + + { "Left Headphone Out", NULL, "Left Output Mixer" }, + { "HPL", NULL, "Left Headphone Out" }, + + { "Right Speaker Out", NULL, "Right Output Mixer" }, + { "SPKR", NULL, "Right Speaker Out" }, + + { "Left Speaker Out", NULL, "Left Output Mixer" }, + { "SPKL", NULL, "Left Speaker Out" }, + + { "Right ADC", NULL, "Right Boost Mixer" }, + + { "Right Boost Mixer", "AUXR Volume", "AUXR" }, + { "Right Boost Mixer", NULL, "Right Capture PGA" }, + { "Right Boost Mixer", "R2 Volume", "R2" }, + + { "Left ADC", NULL, "Left Boost Mixer" }, + + { "Left Boost Mixer", "AUXL Volume", "AUXL" }, + { "Left Boost Mixer", NULL, "Left Capture PGA" }, + { "Left Boost Mixer", "L2 Volume", "L2" }, + + { "Right Capture PGA", NULL, "Right Input Mixer" }, + { "Left Capture PGA", NULL, "Left Input Mixer" }, + + { "Right Input Mixer", "R2 Switch", "R2" }, + { "Right Input Mixer", "MicN Switch", "RIN" }, + { "Right Input Mixer", "MicP Switch", "RIP" }, + + { "Left Input Mixer", "L2 Switch", "L2" }, + { "Left Input Mixer", "MicN Switch", "LIN" }, + { "Left Input Mixer", "MicP Switch", "LIP" }, +}; + +static int eqmode_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + unsigned int reg; + + reg = snd_soc_read(codec, WM8985_EQ1_LOW_SHELF); + if (reg & WM8985_EQ3DMODE) + ucontrol->value.integer.value[0] = 1; + else + ucontrol->value.integer.value[0] = 0; + + return 0; +} + +static int eqmode_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + unsigned int regpwr2, regpwr3; + unsigned int reg_eq; + + if (ucontrol->value.integer.value[0] != 0 + && ucontrol->value.integer.value[0] != 1) + return -EINVAL; + + reg_eq = snd_soc_read(codec, WM8985_EQ1_LOW_SHELF); + switch ((reg_eq & WM8985_EQ3DMODE) >> WM8985_EQ3DMODE_SHIFT) { + case 0: + if (!ucontrol->value.integer.value[0]) + return 0; + break; + case 1: + if (ucontrol->value.integer.value[0]) + return 0; + break; + } + + regpwr2 = snd_soc_read(codec, WM8985_POWER_MANAGEMENT_2); + regpwr3 = snd_soc_read(codec, WM8985_POWER_MANAGEMENT_3); + /* disable the DACs and ADCs */ + snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_2, + WM8985_ADCENR_MASK | WM8985_ADCENL_MASK, 0); + snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_3, + WM8985_DACENR_MASK | WM8985_DACENL_MASK, 0); + snd_soc_update_bits(codec, WM8985_ADDITIONAL_CONTROL, + WM8985_M128ENB_MASK, WM8985_M128ENB); + /* set the desired eqmode */ + snd_soc_update_bits(codec, WM8985_EQ1_LOW_SHELF, + WM8985_EQ3DMODE_MASK, + ucontrol->value.integer.value[0] + << WM8985_EQ3DMODE_SHIFT); + /* restore DAC/ADC configuration */ + snd_soc_write(codec, WM8985_POWER_MANAGEMENT_2, regpwr2); + snd_soc_write(codec, WM8985_POWER_MANAGEMENT_3, regpwr3); + return 0; +} + +static int wm8985_add_widgets(struct snd_soc_codec *codec) +{ + snd_soc_dapm_new_controls(codec, wm8985_dapm_widgets, + ARRAY_SIZE(wm8985_dapm_widgets)); + + snd_soc_dapm_add_routes(codec, audio_map, + ARRAY_SIZE(audio_map)); + return 0; +} + +static int wm8985_reset(struct snd_soc_codec *codec) +{ + return snd_soc_write(codec, WM8985_SOFTWARE_RESET, 0x0); +} + +static int wm8985_dac_mute(struct snd_soc_dai *dai, int mute) +{ + struct snd_soc_codec *codec = dai->codec; + + return snd_soc_update_bits(codec, WM8985_DAC_CONTROL, + WM8985_SOFTMUTE_MASK, + !!mute << WM8985_SOFTMUTE_SHIFT); +} + +static int wm8985_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct wm8985_priv *wm8985; + struct snd_soc_codec *codec; + u16 format, master, bcp, lrp; + + codec = dai->codec; + wm8985 = snd_soc_codec_get_drvdata(codec); + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + format = 0x2; + break; + case SND_SOC_DAIFMT_RIGHT_J: + format = 0x0; + break; + case SND_SOC_DAIFMT_LEFT_J: + format = 0x1; + break; + case SND_SOC_DAIFMT_DSP_A: + case SND_SOC_DAIFMT_DSP_B: + format = 0x3; + break; + default: + dev_err(dai->dev, "Unknown dai format\n"); + return -EINVAL; + } + + snd_soc_update_bits(codec, WM8985_AUDIO_INTERFACE, + WM8985_FMT_MASK, format << WM8985_FMT_SHIFT); + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + master = 1; + break; + case SND_SOC_DAIFMT_CBS_CFS: + master = 0; + break; + default: + dev_err(dai->dev, "Unknown master/slave configuration\n"); + return -EINVAL; + } + + snd_soc_update_bits(codec, WM8985_CLOCK_GEN_CONTROL, + WM8985_MS_MASK, master << WM8985_MS_SHIFT); + + /* frame inversion is not valid for dsp modes */ + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_DSP_A: + case SND_SOC_DAIFMT_DSP_B: + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_IB_IF: + case SND_SOC_DAIFMT_NB_IF: + return -EINVAL; + default: + break; + } + break; + default: + break; + } + + bcp = lrp = 0; + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_IF: + bcp = lrp = 1; + break; + case SND_SOC_DAIFMT_IB_NF: + bcp = 1; + break; + case SND_SOC_DAIFMT_NB_IF: + lrp = 1; + break; + default: + dev_err(dai->dev, "Unknown polarity configuration\n"); + return -EINVAL; + } + + snd_soc_update_bits(codec, WM8985_AUDIO_INTERFACE, + WM8985_LRP_MASK, lrp << WM8985_LRP_SHIFT); + snd_soc_update_bits(codec, WM8985_AUDIO_INTERFACE, + WM8985_BCP_MASK, bcp << WM8985_BCP_SHIFT); + return 0; +} + +static int wm8985_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + size_t i; + struct snd_soc_codec *codec; + struct wm8985_priv *wm8985; + u16 blen, srate_idx; + unsigned int tmp; + int srate_best; + + codec = dai->codec; + wm8985 = snd_soc_codec_get_drvdata(codec); + + wm8985->bclk = snd_soc_params_to_bclk(params); + if ((int)wm8985->bclk < 0) + return wm8985->bclk; + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + blen = 0x0; + break; + case SNDRV_PCM_FORMAT_S20_3LE: + blen = 0x1; + break; + case SNDRV_PCM_FORMAT_S24_LE: + blen = 0x2; + break; + case SNDRV_PCM_FORMAT_S32_LE: + blen = 0x3; + break; + default: + dev_err(dai->dev, "Unsupported word length %u\n", + params_format(params)); + return -EINVAL; + } + + snd_soc_update_bits(codec, WM8985_AUDIO_INTERFACE, + WM8985_WL_MASK, blen << WM8985_WL_SHIFT); + + /* + * match to the nearest possible sample rate and rely + * on the array index to configure the SR register + */ + srate_idx = 0; + srate_best = abs(srates[0] - params_rate(params)); + for (i = 1; i < ARRAY_SIZE(srates); ++i) { + if (abs(srates[i] - params_rate(params)) >= srate_best) + continue; + srate_idx = i; + srate_best = abs(srates[i] - params_rate(params)); + } + + dev_dbg(dai->dev, "Selected SRATE = %d\n", srates[srate_idx]); + snd_soc_update_bits(codec, WM8985_ADDITIONAL_CONTROL, + WM8985_SR_MASK, srate_idx << WM8985_SR_SHIFT); + + dev_dbg(dai->dev, "Target BCLK = %uHz\n", wm8985->bclk); + dev_dbg(dai->dev, "SYSCLK = %uHz\n", wm8985->sysclk); + + for (i = 0; i < ARRAY_SIZE(fs_ratios); ++i) { + if (wm8985->sysclk / params_rate(params) + == fs_ratios[i].ratio) + break; + } + + if (i == ARRAY_SIZE(fs_ratios)) { + dev_err(dai->dev, "Unable to configure MCLK ratio %u/%u\n", + wm8985->sysclk, params_rate(params)); + return -EINVAL; + } + + dev_dbg(dai->dev, "MCLK ratio = %dfs\n", fs_ratios[i].ratio); + snd_soc_update_bits(codec, WM8985_CLOCK_GEN_CONTROL, + WM8985_MCLKDIV_MASK, i << WM8985_MCLKDIV_SHIFT); + + /* select the appropriate bclk divider */ + tmp = (wm8985->sysclk / fs_ratios[i].div) * 10; + for (i = 0; i < ARRAY_SIZE(bclk_divs); ++i) { + if (wm8985->bclk == tmp / bclk_divs[i]) + break; + } + + if (i == ARRAY_SIZE(bclk_divs)) { + dev_err(dai->dev, "No matching BCLK divider found\n"); + return -EINVAL; + } + + dev_dbg(dai->dev, "BCLK div = %d\n", i); + snd_soc_update_bits(codec, WM8985_CLOCK_GEN_CONTROL, + WM8985_BCLKDIV_MASK, i << WM8985_BCLKDIV_SHIFT); + return 0; +} + +struct pll_div { + u32 div2:1; + u32 n:4; + u32 k:24; +}; + +#define FIXED_PLL_SIZE ((1ULL << 24) * 10) +static int pll_factors(struct pll_div *pll_div, unsigned int target, + unsigned int source) +{ + u64 Kpart; + unsigned long int K, Ndiv, Nmod; + + pll_div->div2 = 0; + Ndiv = target / source; + if (Ndiv < 6) { + source >>= 1; + pll_div->div2 = 1; + Ndiv = target / source; + } + + if (Ndiv < 6 || Ndiv > 12) { + printk(KERN_ERR "%s: WM8985 N value is not within" + " the recommended range: %lu\n", __func__, Ndiv); + return -EINVAL; + } + pll_div->n = Ndiv; + + Nmod = target % source; + Kpart = FIXED_PLL_SIZE * (u64)Nmod; + + do_div(Kpart, source); + + K = Kpart & 0xffffffff; + if ((K % 10) >= 5) + K += 5; + K /= 10; + pll_div->k = K; + + return 0; +} + +static int wm8985_set_pll(struct snd_soc_dai *dai, int pll_id, + int source, unsigned int freq_in, + unsigned int freq_out) +{ + int ret; + struct snd_soc_codec *codec; + struct pll_div pll_div; + + codec = dai->codec; + if (freq_in && freq_out) { + ret = pll_factors(&pll_div, freq_out * 4 * 2, freq_in); + if (ret) + return ret; + } + + /* disable the PLL before reprogramming it */ + snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1, + WM8985_PLLEN_MASK, 0); + + if (!freq_in || !freq_out) + return 0; + + /* set PLLN and PRESCALE */ + snd_soc_write(codec, WM8985_PLL_N, + (pll_div.div2 << WM8985_PLL_PRESCALE_SHIFT) + | pll_div.n); + /* set PLLK */ + snd_soc_write(codec, WM8985_PLL_K_3, pll_div.k & 0x1ff); + snd_soc_write(codec, WM8985_PLL_K_2, (pll_div.k >> 9) & 0x1ff); + snd_soc_write(codec, WM8985_PLL_K_1, (pll_div.k >> 18)); + /* set the source of the clock to be the PLL */ + snd_soc_update_bits(codec, WM8985_CLOCK_GEN_CONTROL, + WM8985_CLKSEL_MASK, WM8985_CLKSEL); + /* enable the PLL */ + snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1, + WM8985_PLLEN_MASK, WM8985_PLLEN); + return 0; +} + +static int wm8985_set_sysclk(struct snd_soc_dai *dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_codec *codec; + struct wm8985_priv *wm8985; + + codec = dai->codec; + wm8985 = snd_soc_codec_get_drvdata(codec); + + switch (clk_id) { + case WM8985_CLKSRC_MCLK: + snd_soc_update_bits(codec, WM8985_CLOCK_GEN_CONTROL, + WM8985_CLKSEL_MASK, 0); + snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1, + WM8985_PLLEN_MASK, 0); + break; + case WM8985_CLKSRC_PLL: + snd_soc_update_bits(codec, WM8985_CLOCK_GEN_CONTROL, + WM8985_CLKSEL_MASK, WM8985_CLKSEL); + break; + default: + dev_err(dai->dev, "Unknown clock source %d\n", clk_id); + return -EINVAL; + } + + wm8985->sysclk = freq; + return 0; +} + +static void wm8985_sync_cache(struct snd_soc_codec *codec) +{ + short i; + u16 *cache; + + if (!codec->cache_sync) + return; + codec->cache_only = 0; + /* restore cache */ + cache = codec->reg_cache; + for (i = 0; i < codec->driver->reg_cache_size; i++) { + if (i == WM8985_SOFTWARE_RESET + || cache[i] == wm8985_reg_defs[i]) + continue; + snd_soc_write(codec, i, cache[i]); + } + codec->cache_sync = 0; +} + +static int wm8985_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + int ret; + struct wm8985_priv *wm8985; + + wm8985 = snd_soc_codec_get_drvdata(codec); + switch (level) { + case SND_SOC_BIAS_ON: + case SND_SOC_BIAS_PREPARE: + /* VMID at 75k */ + snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1, + WM8985_VMIDSEL_MASK, + 1 << WM8985_VMIDSEL_SHIFT); + break; + case SND_SOC_BIAS_STANDBY: + if (codec->bias_level == SND_SOC_BIAS_OFF) { + ret = regulator_bulk_enable(ARRAY_SIZE(wm8985->supplies), + wm8985->supplies); + if (ret) { + dev_err(codec->dev, + "Failed to enable supplies: %d\n", + ret); + return ret; + } + + wm8985_sync_cache(codec); + + /* enable anti-pop features */ + snd_soc_update_bits(codec, WM8985_OUT4_TO_ADC, + WM8985_POBCTRL_MASK, + WM8985_POBCTRL); + /* enable thermal shutdown */ + snd_soc_update_bits(codec, WM8985_OUTPUT_CTRL0, + WM8985_TSDEN_MASK, WM8985_TSDEN); + snd_soc_update_bits(codec, WM8985_OUTPUT_CTRL0, + WM8985_TSOPCTRL_MASK, + WM8985_TSOPCTRL); + /* enable BIASEN */ + snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1, + WM8985_BIASEN_MASK, WM8985_BIASEN); + /* VMID at 75k */ + snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1, + WM8985_VMIDSEL_MASK, + 1 << WM8985_VMIDSEL_SHIFT); + msleep(500); + /* disable anti-pop features */ + snd_soc_update_bits(codec, WM8985_OUT4_TO_ADC, + WM8985_POBCTRL_MASK, 0); + } + /* VMID at 300k */ + snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1, + WM8985_VMIDSEL_MASK, + 2 << WM8985_VMIDSEL_SHIFT); + break; + case SND_SOC_BIAS_OFF: + /* disable thermal shutdown */ + snd_soc_update_bits(codec, WM8985_OUTPUT_CTRL0, + WM8985_TSOPCTRL_MASK, 0); + snd_soc_update_bits(codec, WM8985_OUTPUT_CTRL0, + WM8985_TSDEN_MASK, 0); + /* disable VMIDSEL and BIASEN */ + snd_soc_update_bits(codec, WM8985_POWER_MANAGEMENT_1, + WM8985_VMIDSEL_MASK | WM8985_BIASEN_MASK, + 0); + snd_soc_write(codec, WM8985_POWER_MANAGEMENT_1, 0); + snd_soc_write(codec, WM8985_POWER_MANAGEMENT_2, 0); + snd_soc_write(codec, WM8985_POWER_MANAGEMENT_3, 0); + + codec->cache_sync = 1; + + regulator_bulk_disable(ARRAY_SIZE(wm8985->supplies), + wm8985->supplies); + break; + } + + codec->bias_level = level; + return 0; +} + +#ifdef CONFIG_PM +static int wm8985_suspend(struct snd_soc_codec *codec, pm_message_t state) +{ + wm8985_set_bias_level(codec, SND_SOC_BIAS_OFF); + return 0; +} + +static int wm8985_resume(struct snd_soc_codec *codec) +{ + wm8985_set_bias_level(codec, SND_SOC_BIAS_STANDBY); + return 0; +} +#else +#define wm8985_suspend NULL +#define wm8985_resume NULL +#endif + +static int wm8985_remove(struct snd_soc_codec *codec) +{ + struct wm8985_priv *wm8985; + + wm8985 = snd_soc_codec_get_drvdata(codec); + wm8985_set_bias_level(codec, SND_SOC_BIAS_OFF); + regulator_bulk_free(ARRAY_SIZE(wm8985->supplies), wm8985->supplies); + return 0; +} + +static int wm8985_probe(struct snd_soc_codec *codec) +{ + size_t i; + struct wm8985_priv *wm8985; + int ret; + u16 *cache; + + wm8985 = snd_soc_codec_get_drvdata(codec); + + ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8985->control_type); + if (ret < 0) { + dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(wm8985->supplies); i++) + wm8985->supplies[i].supply = wm8985_supply_names[i]; + + ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8985->supplies), + wm8985->supplies); + if (ret) { + dev_err(codec->dev, "Failed to request supplies: %d\n", ret); + return ret; + } + + ret = regulator_bulk_enable(ARRAY_SIZE(wm8985->supplies), + wm8985->supplies); + if (ret) { + dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); + goto err_reg_get; + } + + ret = wm8985_reset(codec); + if (ret < 0) { + dev_err(codec->dev, "Failed to issue reset: %d\n", ret); + goto err_reg_enable; + } + + cache = codec->reg_cache; + /* latch volume update bits */ + for (i = 0; i < ARRAY_SIZE(volume_update_regs); ++i) + cache[volume_update_regs[i]] |= 0x100; + /* enable BIASCUT */ + cache[WM8985_BIAS_CTRL] |= WM8985_BIASCUT; + codec->cache_sync = 1; + + snd_soc_add_controls(codec, wm8985_snd_controls, + ARRAY_SIZE(wm8985_snd_controls)); + wm8985_add_widgets(codec); + + wm8985_set_bias_level(codec, SND_SOC_BIAS_STANDBY); + return 0; + +err_reg_enable: + regulator_bulk_disable(ARRAY_SIZE(wm8985->supplies), wm8985->supplies); +err_reg_get: + regulator_bulk_free(ARRAY_SIZE(wm8985->supplies), wm8985->supplies); + return ret; +} + +static struct snd_soc_dai_ops wm8985_dai_ops = { + .digital_mute = wm8985_dac_mute, + .hw_params = wm8985_hw_params, + .set_fmt = wm8985_set_fmt, + .set_sysclk = wm8985_set_sysclk, + .set_pll = wm8985_set_pll +}; + +#define WM8985_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver wm8985_dai = { + .name = "wm8985-hifi", + .playback = { + .stream_name = "Playback", + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_48000, + .formats = WM8985_FORMATS, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_48000, + .formats = WM8985_FORMATS, + }, + .ops = &wm8985_dai_ops, + .symmetric_rates = 1 +}; + +static struct snd_soc_codec_driver soc_codec_dev_wm8985 = { + .probe = wm8985_probe, + .remove = wm8985_remove, + .suspend = wm8985_suspend, + .resume = wm8985_resume, + .set_bias_level = wm8985_set_bias_level, + .reg_cache_size = ARRAY_SIZE(wm8985_reg_defs), + .reg_word_size = sizeof(u16), + .reg_cache_default = wm8985_reg_defs +}; + +#if defined(CONFIG_SPI_MASTER) +static int __devinit wm8985_spi_probe(struct spi_device *spi) +{ + struct wm8985_priv *wm8985; + int ret; + + wm8985 = kzalloc(sizeof *wm8985, GFP_KERNEL); + if (IS_ERR(wm8985)) + return PTR_ERR(wm8985); + + wm8985->control_type = SND_SOC_SPI; + spi_set_drvdata(spi, wm8985); + + ret = snd_soc_register_codec(&spi->dev, + &soc_codec_dev_wm8985, &wm8985_dai, 1); + if (ret < 0) + kfree(wm8985); + return ret; +} + +static int __devexit wm8985_spi_remove(struct spi_device *spi) +{ + snd_soc_unregister_codec(&spi->dev); + kfree(spi_get_drvdata(spi)); + return 0; +} + +static struct spi_driver wm8985_spi_driver = { + .driver = { + .name = "wm8985", + .bus = &spi_bus_type, + .owner = THIS_MODULE, + }, + .probe = wm8985_spi_probe, + .remove = __devexit_p(wm8985_spi_remove) +}; +#endif + +#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) +static __devinit int wm8985_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct wm8985_priv *wm8985; + int ret; + + wm8985 = kzalloc(sizeof *wm8985, GFP_KERNEL); + if (IS_ERR(wm8985)) + return PTR_ERR(wm8985); + + wm8985->control_type = SND_SOC_I2C; + i2c_set_clientdata(i2c, wm8985); + + ret = snd_soc_register_codec(&i2c->dev, + &soc_codec_dev_wm8985, &wm8985_dai, 1); + if (ret < 0) + kfree(wm8985); + return ret; +} + +static __devexit int wm8985_i2c_remove(struct i2c_client *client) +{ + snd_soc_unregister_codec(&client->dev); + kfree(i2c_get_clientdata(client)); + return 0; +} + +static const struct i2c_device_id wm8985_i2c_id[] = { + { "wm8985", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, wm8985_i2c_id); + +static struct i2c_driver wm8985_i2c_driver = { + .driver = { + .name = "wm8985", + .owner = THIS_MODULE, + }, + .probe = wm8985_i2c_probe, + .remove = __devexit_p(wm8985_i2c_remove), + .id_table = wm8985_i2c_id +}; +#endif + +static int __init wm8985_modinit(void) +{ + int ret = 0; + +#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) + ret = i2c_add_driver(&wm8985_i2c_driver); + if (ret) { + printk(KERN_ERR "Failed to register wm8985 I2C driver: %d\n", + ret); + } +#endif +#if defined(CONFIG_SPI_MASTER) + ret = spi_register_driver(&wm8985_spi_driver); + if (ret != 0) { + printk(KERN_ERR "Failed to register wm8985 SPI driver: %d\n", + ret); + } +#endif + return ret; +} +module_init(wm8985_modinit); + +static void __exit wm8985_exit(void) +{ +#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) + i2c_del_driver(&wm8985_i2c_driver); +#endif +#if defined(CONFIG_SPI_MASTER) + spi_unregister_driver(&wm8985_spi_driver); +#endif +} +module_exit(wm8985_exit); + +MODULE_DESCRIPTION("ASoC WM8985 driver"); +MODULE_AUTHOR("Dimitris Papastamos <dp@opensource.wolfsonmicro.com>"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/wm8985.h b/sound/soc/codecs/wm8985.h new file mode 100644 index 000000000000..2e71ff507638 --- /dev/null +++ b/sound/soc/codecs/wm8985.h @@ -0,0 +1,1045 @@ +/* + * wm8985.h -- WM8985 ASoC driver + * + * Copyright 2010 Wolfson Microelectronics plc + * + * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _WM8985_H +#define _WM8985_H + +#define WM8985_SOFTWARE_RESET 0x00 +#define WM8985_POWER_MANAGEMENT_1 0x01 +#define WM8985_POWER_MANAGEMENT_2 0x02 +#define WM8985_POWER_MANAGEMENT_3 0x03 +#define WM8985_AUDIO_INTERFACE 0x04 +#define WM8985_COMPANDING_CONTROL 0x05 +#define WM8985_CLOCK_GEN_CONTROL 0x06 +#define WM8985_ADDITIONAL_CONTROL 0x07 +#define WM8985_GPIO_CONTROL 0x08 +#define WM8985_JACK_DETECT_CONTROL_1 0x09 +#define WM8985_DAC_CONTROL 0x0A +#define WM8985_LEFT_DAC_DIGITAL_VOL 0x0B +#define WM8985_RIGHT_DAC_DIGITAL_VOL 0x0C +#define WM8985_JACK_DETECT_CONTROL_2 0x0D +#define WM8985_ADC_CONTROL 0x0E +#define WM8985_LEFT_ADC_DIGITAL_VOL 0x0F +#define WM8985_RIGHT_ADC_DIGITAL_VOL 0x10 +#define WM8985_EQ1_LOW_SHELF 0x12 +#define WM8985_EQ2_PEAK_1 0x13 +#define WM8985_EQ3_PEAK_2 0x14 +#define WM8985_EQ4_PEAK_3 0x15 +#define WM8985_EQ5_HIGH_SHELF 0x16 +#define WM8985_DAC_LIMITER_1 0x18 +#define WM8985_DAC_LIMITER_2 0x19 +#define WM8985_NOTCH_FILTER_1 0x1B +#define WM8985_NOTCH_FILTER_2 0x1C +#define WM8985_NOTCH_FILTER_3 0x1D +#define WM8985_NOTCH_FILTER_4 0x1E +#define WM8985_ALC_CONTROL_1 0x20 +#define WM8985_ALC_CONTROL_2 0x21 +#define WM8985_ALC_CONTROL_3 0x22 +#define WM8985_NOISE_GATE 0x23 +#define WM8985_PLL_N 0x24 +#define WM8985_PLL_K_1 0x25 +#define WM8985_PLL_K_2 0x26 +#define WM8985_PLL_K_3 0x27 +#define WM8985_3D_CONTROL 0x29 +#define WM8985_OUT4_TO_ADC 0x2A +#define WM8985_BEEP_CONTROL 0x2B +#define WM8985_INPUT_CTRL 0x2C +#define WM8985_LEFT_INP_PGA_GAIN_CTRL 0x2D +#define WM8985_RIGHT_INP_PGA_GAIN_CTRL 0x2E +#define WM8985_LEFT_ADC_BOOST_CTRL 0x2F +#define WM8985_RIGHT_ADC_BOOST_CTRL 0x30 +#define WM8985_OUTPUT_CTRL0 0x31 +#define WM8985_LEFT_MIXER_CTRL 0x32 +#define WM8985_RIGHT_MIXER_CTRL 0x33 +#define WM8985_LOUT1_HP_VOLUME_CTRL 0x34 +#define WM8985_ROUT1_HP_VOLUME_CTRL 0x35 +#define WM8985_LOUT2_SPK_VOLUME_CTRL 0x36 +#define WM8985_ROUT2_SPK_VOLUME_CTRL 0x37 +#define WM8985_OUT3_MIXER_CTRL 0x38 +#define WM8985_OUT4_MONO_MIX_CTRL 0x39 +#define WM8985_OUTPUT_CTRL1 0x3C +#define WM8985_BIAS_CTRL 0x3D + +#define WM8985_REGISTER_COUNT 59 +#define WM8985_MAX_REGISTER 0x3F + +/* + * Field Definitions. + */ + +/* + * R0 (0x00) - Software Reset + */ +#define WM8985_SOFTWARE_RESET_MASK 0x01FF /* SOFTWARE_RESET - [8:0] */ +#define WM8985_SOFTWARE_RESET_SHIFT 0 /* SOFTWARE_RESET - [8:0] */ +#define WM8985_SOFTWARE_RESET_WIDTH 9 /* SOFTWARE_RESET - [8:0] */ + +/* + * R1 (0x01) - Power management 1 + */ +#define WM8985_OUT4MIXEN 0x0080 /* OUT4MIXEN */ +#define WM8985_OUT4MIXEN_MASK 0x0080 /* OUT4MIXEN */ +#define WM8985_OUT4MIXEN_SHIFT 7 /* OUT4MIXEN */ +#define WM8985_OUT4MIXEN_WIDTH 1 /* OUT4MIXEN */ +#define WM8985_OUT3MIXEN 0x0040 /* OUT3MIXEN */ +#define WM8985_OUT3MIXEN_MASK 0x0040 /* OUT3MIXEN */ +#define WM8985_OUT3MIXEN_SHIFT 6 /* OUT3MIXEN */ +#define WM8985_OUT3MIXEN_WIDTH 1 /* OUT3MIXEN */ +#define WM8985_PLLEN 0x0020 /* PLLEN */ +#define WM8985_PLLEN_MASK 0x0020 /* PLLEN */ +#define WM8985_PLLEN_SHIFT 5 /* PLLEN */ +#define WM8985_PLLEN_WIDTH 1 /* PLLEN */ +#define WM8985_MICBEN 0x0010 /* MICBEN */ +#define WM8985_MICBEN_MASK 0x0010 /* MICBEN */ +#define WM8985_MICBEN_SHIFT 4 /* MICBEN */ +#define WM8985_MICBEN_WIDTH 1 /* MICBEN */ +#define WM8985_BIASEN 0x0008 /* BIASEN */ +#define WM8985_BIASEN_MASK 0x0008 /* BIASEN */ +#define WM8985_BIASEN_SHIFT 3 /* BIASEN */ +#define WM8985_BIASEN_WIDTH 1 /* BIASEN */ +#define WM8985_BUFIOEN 0x0004 /* BUFIOEN */ +#define WM8985_BUFIOEN_MASK 0x0004 /* BUFIOEN */ +#define WM8985_BUFIOEN_SHIFT 2 /* BUFIOEN */ +#define WM8985_BUFIOEN_WIDTH 1 /* BUFIOEN */ +#define WM8985_VMIDSEL 0x0003 /* VMIDSEL */ +#define WM8985_VMIDSEL_MASK 0x0003 /* VMIDSEL - [1:0] */ +#define WM8985_VMIDSEL_SHIFT 0 /* VMIDSEL - [1:0] */ +#define WM8985_VMIDSEL_WIDTH 2 /* VMIDSEL - [1:0] */ + +/* + * R2 (0x02) - Power management 2 + */ +#define WM8985_ROUT1EN 0x0100 /* ROUT1EN */ +#define WM8985_ROUT1EN_MASK 0x0100 /* ROUT1EN */ +#define WM8985_ROUT1EN_SHIFT 8 /* ROUT1EN */ +#define WM8985_ROUT1EN_WIDTH 1 /* ROUT1EN */ +#define WM8985_LOUT1EN 0x0080 /* LOUT1EN */ +#define WM8985_LOUT1EN_MASK 0x0080 /* LOUT1EN */ +#define WM8985_LOUT1EN_SHIFT 7 /* LOUT1EN */ +#define WM8985_LOUT1EN_WIDTH 1 /* LOUT1EN */ +#define WM8985_SLEEP 0x0040 /* SLEEP */ +#define WM8985_SLEEP_MASK 0x0040 /* SLEEP */ +#define WM8985_SLEEP_SHIFT 6 /* SLEEP */ +#define WM8985_SLEEP_WIDTH 1 /* SLEEP */ +#define WM8985_BOOSTENR 0x0020 /* BOOSTENR */ +#define WM8985_BOOSTENR_MASK 0x0020 /* BOOSTENR */ +#define WM8985_BOOSTENR_SHIFT 5 /* BOOSTENR */ +#define WM8985_BOOSTENR_WIDTH 1 /* BOOSTENR */ +#define WM8985_BOOSTENL 0x0010 /* BOOSTENL */ +#define WM8985_BOOSTENL_MASK 0x0010 /* BOOSTENL */ +#define WM8985_BOOSTENL_SHIFT 4 /* BOOSTENL */ +#define WM8985_BOOSTENL_WIDTH 1 /* BOOSTENL */ +#define WM8985_INPGAENR 0x0008 /* INPGAENR */ +#define WM8985_INPGAENR_MASK 0x0008 /* INPGAENR */ +#define WM8985_INPGAENR_SHIFT 3 /* INPGAENR */ +#define WM8985_INPGAENR_WIDTH 1 /* INPGAENR */ +#define WM8985_INPPGAENL 0x0004 /* INPPGAENL */ +#define WM8985_INPPGAENL_MASK 0x0004 /* INPPGAENL */ +#define WM8985_INPPGAENL_SHIFT 2 /* INPPGAENL */ +#define WM8985_INPPGAENL_WIDTH 1 /* INPPGAENL */ +#define WM8985_ADCENR 0x0002 /* ADCENR */ +#define WM8985_ADCENR_MASK 0x0002 /* ADCENR */ +#define WM8985_ADCENR_SHIFT 1 /* ADCENR */ +#define WM8985_ADCENR_WIDTH 1 /* ADCENR */ +#define WM8985_ADCENL 0x0001 /* ADCENL */ +#define WM8985_ADCENL_MASK 0x0001 /* ADCENL */ +#define WM8985_ADCENL_SHIFT 0 /* ADCENL */ +#define WM8985_ADCENL_WIDTH 1 /* ADCENL */ + +/* + * R3 (0x03) - Power management 3 + */ +#define WM8985_OUT4EN 0x0100 /* OUT4EN */ +#define WM8985_OUT4EN_MASK 0x0100 /* OUT4EN */ +#define WM8985_OUT4EN_SHIFT 8 /* OUT4EN */ +#define WM8985_OUT4EN_WIDTH 1 /* OUT4EN */ +#define WM8985_OUT3EN 0x0080 /* OUT3EN */ +#define WM8985_OUT3EN_MASK 0x0080 /* OUT3EN */ +#define WM8985_OUT3EN_SHIFT 7 /* OUT3EN */ +#define WM8985_OUT3EN_WIDTH 1 /* OUT3EN */ +#define WM8985_ROUT2EN 0x0040 /* ROUT2EN */ +#define WM8985_ROUT2EN_MASK 0x0040 /* ROUT2EN */ +#define WM8985_ROUT2EN_SHIFT 6 /* ROUT2EN */ +#define WM8985_ROUT2EN_WIDTH 1 /* ROUT2EN */ +#define WM8985_LOUT2EN 0x0020 /* LOUT2EN */ +#define WM8985_LOUT2EN_MASK 0x0020 /* LOUT2EN */ +#define WM8985_LOUT2EN_SHIFT 5 /* LOUT2EN */ +#define WM8985_LOUT2EN_WIDTH 1 /* LOUT2EN */ +#define WM8985_RMIXEN 0x0008 /* RMIXEN */ +#define WM8985_RMIXEN_MASK 0x0008 /* RMIXEN */ +#define WM8985_RMIXEN_SHIFT 3 /* RMIXEN */ +#define WM8985_RMIXEN_WIDTH 1 /* RMIXEN */ +#define WM8985_LMIXEN 0x0004 /* LMIXEN */ +#define WM8985_LMIXEN_MASK 0x0004 /* LMIXEN */ +#define WM8985_LMIXEN_SHIFT 2 /* LMIXEN */ +#define WM8985_LMIXEN_WIDTH 1 /* LMIXEN */ +#define WM8985_DACENR 0x0002 /* DACENR */ +#define WM8985_DACENR_MASK 0x0002 /* DACENR */ +#define WM8985_DACENR_SHIFT 1 /* DACENR */ +#define WM8985_DACENR_WIDTH 1 /* DACENR */ +#define WM8985_DACENL 0x0001 /* DACENL */ +#define WM8985_DACENL_MASK 0x0001 /* DACENL */ +#define WM8985_DACENL_SHIFT 0 /* DACENL */ +#define WM8985_DACENL_WIDTH 1 /* DACENL */ + +/* + * R4 (0x04) - Audio Interface + */ +#define WM8985_BCP 0x0100 /* BCP */ +#define WM8985_BCP_MASK 0x0100 /* BCP */ +#define WM8985_BCP_SHIFT 8 /* BCP */ +#define WM8985_BCP_WIDTH 1 /* BCP */ +#define WM8985_LRP 0x0080 /* LRP */ +#define WM8985_LRP_MASK 0x0080 /* LRP */ +#define WM8985_LRP_SHIFT 7 /* LRP */ +#define WM8985_LRP_WIDTH 1 /* LRP */ +#define WM8985_WL_MASK 0x0060 /* WL - [6:5] */ +#define WM8985_WL_SHIFT 5 /* WL - [6:5] */ +#define WM8985_WL_WIDTH 2 /* WL - [6:5] */ +#define WM8985_FMT_MASK 0x0018 /* FMT - [4:3] */ +#define WM8985_FMT_SHIFT 3 /* FMT - [4:3] */ +#define WM8985_FMT_WIDTH 2 /* FMT - [4:3] */ +#define WM8985_DLRSWAP 0x0004 /* DLRSWAP */ +#define WM8985_DLRSWAP_MASK 0x0004 /* DLRSWAP */ +#define WM8985_DLRSWAP_SHIFT 2 /* DLRSWAP */ +#define WM8985_DLRSWAP_WIDTH 1 /* DLRSWAP */ +#define WM8985_ALRSWAP 0x0002 /* ALRSWAP */ +#define WM8985_ALRSWAP_MASK 0x0002 /* ALRSWAP */ +#define WM8985_ALRSWAP_SHIFT 1 /* ALRSWAP */ +#define WM8985_ALRSWAP_WIDTH 1 /* ALRSWAP */ +#define WM8985_MONO 0x0001 /* MONO */ +#define WM8985_MONO_MASK 0x0001 /* MONO */ +#define WM8985_MONO_SHIFT 0 /* MONO */ +#define WM8985_MONO_WIDTH 1 /* MONO */ + +/* + * R5 (0x05) - Companding control + */ +#define WM8985_WL8 0x0020 /* WL8 */ +#define WM8985_WL8_MASK 0x0020 /* WL8 */ +#define WM8985_WL8_SHIFT 5 /* WL8 */ +#define WM8985_WL8_WIDTH 1 /* WL8 */ +#define WM8985_DAC_COMP_MASK 0x0018 /* DAC_COMP - [4:3] */ +#define WM8985_DAC_COMP_SHIFT 3 /* DAC_COMP - [4:3] */ +#define WM8985_DAC_COMP_WIDTH 2 /* DAC_COMP - [4:3] */ +#define WM8985_ADC_COMP_MASK 0x0006 /* ADC_COMP - [2:1] */ +#define WM8985_ADC_COMP_SHIFT 1 /* ADC_COMP - [2:1] */ +#define WM8985_ADC_COMP_WIDTH 2 /* ADC_COMP - [2:1] */ +#define WM8985_LOOPBACK 0x0001 /* LOOPBACK */ +#define WM8985_LOOPBACK_MASK 0x0001 /* LOOPBACK */ +#define WM8985_LOOPBACK_SHIFT 0 /* LOOPBACK */ +#define WM8985_LOOPBACK_WIDTH 1 /* LOOPBACK */ + +/* + * R6 (0x06) - Clock Gen control + */ +#define WM8985_CLKSEL 0x0100 /* CLKSEL */ +#define WM8985_CLKSEL_MASK 0x0100 /* CLKSEL */ +#define WM8985_CLKSEL_SHIFT 8 /* CLKSEL */ +#define WM8985_CLKSEL_WIDTH 1 /* CLKSEL */ +#define WM8985_MCLKDIV_MASK 0x00E0 /* MCLKDIV - [7:5] */ +#define WM8985_MCLKDIV_SHIFT 5 /* MCLKDIV - [7:5] */ +#define WM8985_MCLKDIV_WIDTH 3 /* MCLKDIV - [7:5] */ +#define WM8985_BCLKDIV_MASK 0x001C /* BCLKDIV - [4:2] */ +#define WM8985_BCLKDIV_SHIFT 2 /* BCLKDIV - [4:2] */ +#define WM8985_BCLKDIV_WIDTH 3 /* BCLKDIV - [4:2] */ +#define WM8985_MS 0x0001 /* MS */ +#define WM8985_MS_MASK 0x0001 /* MS */ +#define WM8985_MS_SHIFT 0 /* MS */ +#define WM8985_MS_WIDTH 1 /* MS */ + +/* + * R7 (0x07) - Additional control + */ +#define WM8985_M128ENB 0x0100 /* M128ENB */ +#define WM8985_M128ENB_MASK 0x0100 /* M128ENB */ +#define WM8985_M128ENB_SHIFT 8 /* M128ENB */ +#define WM8985_M128ENB_WIDTH 1 /* M128ENB */ +#define WM8985_DCLKDIV_MASK 0x00F0 /* DCLKDIV - [7:4] */ +#define WM8985_DCLKDIV_SHIFT 4 /* DCLKDIV - [7:4] */ +#define WM8985_DCLKDIV_WIDTH 4 /* DCLKDIV - [7:4] */ +#define WM8985_SR_MASK 0x000E /* SR - [3:1] */ +#define WM8985_SR_SHIFT 1 /* SR - [3:1] */ +#define WM8985_SR_WIDTH 3 /* SR - [3:1] */ +#define WM8985_SLOWCLKEN 0x0001 /* SLOWCLKEN */ +#define WM8985_SLOWCLKEN_MASK 0x0001 /* SLOWCLKEN */ +#define WM8985_SLOWCLKEN_SHIFT 0 /* SLOWCLKEN */ +#define WM8985_SLOWCLKEN_WIDTH 1 /* SLOWCLKEN */ + +/* + * R8 (0x08) - GPIO Control + */ +#define WM8985_GPIO1GP 0x0100 /* GPIO1GP */ +#define WM8985_GPIO1GP_MASK 0x0100 /* GPIO1GP */ +#define WM8985_GPIO1GP_SHIFT 8 /* GPIO1GP */ +#define WM8985_GPIO1GP_WIDTH 1 /* GPIO1GP */ +#define WM8985_GPIO1GPU 0x0080 /* GPIO1GPU */ +#define WM8985_GPIO1GPU_MASK 0x0080 /* GPIO1GPU */ +#define WM8985_GPIO1GPU_SHIFT 7 /* GPIO1GPU */ +#define WM8985_GPIO1GPU_WIDTH 1 /* GPIO1GPU */ +#define WM8985_GPIO1GPD 0x0040 /* GPIO1GPD */ +#define WM8985_GPIO1GPD_MASK 0x0040 /* GPIO1GPD */ +#define WM8985_GPIO1GPD_SHIFT 6 /* GPIO1GPD */ +#define WM8985_GPIO1GPD_WIDTH 1 /* GPIO1GPD */ +#define WM8985_GPIO1POL 0x0008 /* GPIO1POL */ +#define WM8985_GPIO1POL_MASK 0x0008 /* GPIO1POL */ +#define WM8985_GPIO1POL_SHIFT 3 /* GPIO1POL */ +#define WM8985_GPIO1POL_WIDTH 1 /* GPIO1POL */ +#define WM8985_GPIO1SEL_MASK 0x0007 /* GPIO1SEL - [2:0] */ +#define WM8985_GPIO1SEL_SHIFT 0 /* GPIO1SEL - [2:0] */ +#define WM8985_GPIO1SEL_WIDTH 3 /* GPIO1SEL - [2:0] */ + +/* + * R9 (0x09) - Jack Detect Control 1 + */ +#define WM8985_JD_EN 0x0040 /* JD_EN */ +#define WM8985_JD_EN_MASK 0x0040 /* JD_EN */ +#define WM8985_JD_EN_SHIFT 6 /* JD_EN */ +#define WM8985_JD_EN_WIDTH 1 /* JD_EN */ +#define WM8985_JD_SEL_MASK 0x0030 /* JD_SEL - [5:4] */ +#define WM8985_JD_SEL_SHIFT 4 /* JD_SEL - [5:4] */ +#define WM8985_JD_SEL_WIDTH 2 /* JD_SEL - [5:4] */ + +/* + * R10 (0x0A) - DAC Control + */ +#define WM8985_SOFTMUTE 0x0040 /* SOFTMUTE */ +#define WM8985_SOFTMUTE_MASK 0x0040 /* SOFTMUTE */ +#define WM8985_SOFTMUTE_SHIFT 6 /* SOFTMUTE */ +#define WM8985_SOFTMUTE_WIDTH 1 /* SOFTMUTE */ +#define WM8985_DACOSR128 0x0008 /* DACOSR128 */ +#define WM8985_DACOSR128_MASK 0x0008 /* DACOSR128 */ +#define WM8985_DACOSR128_SHIFT 3 /* DACOSR128 */ +#define WM8985_DACOSR128_WIDTH 1 /* DACOSR128 */ +#define WM8985_AMUTE 0x0004 /* AMUTE */ +#define WM8985_AMUTE_MASK 0x0004 /* AMUTE */ +#define WM8985_AMUTE_SHIFT 2 /* AMUTE */ +#define WM8985_AMUTE_WIDTH 1 /* AMUTE */ +#define WM8985_DACPOLR 0x0002 /* DACPOLR */ +#define WM8985_DACPOLR_MASK 0x0002 /* DACPOLR */ +#define WM8985_DACPOLR_SHIFT 1 /* DACPOLR */ +#define WM8985_DACPOLR_WIDTH 1 /* DACPOLR */ +#define WM8985_DACPOLL 0x0001 /* DACPOLL */ +#define WM8985_DACPOLL_MASK 0x0001 /* DACPOLL */ +#define WM8985_DACPOLL_SHIFT 0 /* DACPOLL */ +#define WM8985_DACPOLL_WIDTH 1 /* DACPOLL */ + +/* + * R11 (0x0B) - Left DAC digital Vol + */ +#define WM8985_DACVU 0x0100 /* DACVU */ +#define WM8985_DACVU_MASK 0x0100 /* DACVU */ +#define WM8985_DACVU_SHIFT 8 /* DACVU */ +#define WM8985_DACVU_WIDTH 1 /* DACVU */ +#define WM8985_DACVOLL_MASK 0x00FF /* DACVOLL - [7:0] */ +#define WM8985_DACVOLL_SHIFT 0 /* DACVOLL - [7:0] */ +#define WM8985_DACVOLL_WIDTH 8 /* DACVOLL - [7:0] */ + +/* + * R12 (0x0C) - Right DAC digital vol + */ +#define WM8985_DACVU 0x0100 /* DACVU */ +#define WM8985_DACVU_MASK 0x0100 /* DACVU */ +#define WM8985_DACVU_SHIFT 8 /* DACVU */ +#define WM8985_DACVU_WIDTH 1 /* DACVU */ +#define WM8985_DACVOLR_MASK 0x00FF /* DACVOLR - [7:0] */ +#define WM8985_DACVOLR_SHIFT 0 /* DACVOLR - [7:0] */ +#define WM8985_DACVOLR_WIDTH 8 /* DACVOLR - [7:0] */ + +/* + * R13 (0x0D) - Jack Detect Control 2 + */ +#define WM8985_JD_EN1_MASK 0x00F0 /* JD_EN1 - [7:4] */ +#define WM8985_JD_EN1_SHIFT 4 /* JD_EN1 - [7:4] */ +#define WM8985_JD_EN1_WIDTH 4 /* JD_EN1 - [7:4] */ +#define WM8985_JD_EN0_MASK 0x000F /* JD_EN0 - [3:0] */ +#define WM8985_JD_EN0_SHIFT 0 /* JD_EN0 - [3:0] */ +#define WM8985_JD_EN0_WIDTH 4 /* JD_EN0 - [3:0] */ + +/* + * R14 (0x0E) - ADC Control + */ +#define WM8985_HPFEN 0x0100 /* HPFEN */ +#define WM8985_HPFEN_MASK 0x0100 /* HPFEN */ +#define WM8985_HPFEN_SHIFT 8 /* HPFEN */ +#define WM8985_HPFEN_WIDTH 1 /* HPFEN */ +#define WM8985_HPFAPP 0x0080 /* HPFAPP */ +#define WM8985_HPFAPP_MASK 0x0080 /* HPFAPP */ +#define WM8985_HPFAPP_SHIFT 7 /* HPFAPP */ +#define WM8985_HPFAPP_WIDTH 1 /* HPFAPP */ +#define WM8985_HPFCUT_MASK 0x0070 /* HPFCUT - [6:4] */ +#define WM8985_HPFCUT_SHIFT 4 /* HPFCUT - [6:4] */ +#define WM8985_HPFCUT_WIDTH 3 /* HPFCUT - [6:4] */ +#define WM8985_ADCOSR128 0x0008 /* ADCOSR128 */ +#define WM8985_ADCOSR128_MASK 0x0008 /* ADCOSR128 */ +#define WM8985_ADCOSR128_SHIFT 3 /* ADCOSR128 */ +#define WM8985_ADCOSR128_WIDTH 1 /* ADCOSR128 */ +#define WM8985_ADCRPOL 0x0002 /* ADCRPOL */ +#define WM8985_ADCRPOL_MASK 0x0002 /* ADCRPOL */ +#define WM8985_ADCRPOL_SHIFT 1 /* ADCRPOL */ +#define WM8985_ADCRPOL_WIDTH 1 /* ADCRPOL */ +#define WM8985_ADCLPOL 0x0001 /* ADCLPOL */ +#define WM8985_ADCLPOL_MASK 0x0001 /* ADCLPOL */ +#define WM8985_ADCLPOL_SHIFT 0 /* ADCLPOL */ +#define WM8985_ADCLPOL_WIDTH 1 /* ADCLPOL */ + +/* + * R15 (0x0F) - Left ADC Digital Vol + */ +#define WM8985_ADCVU 0x0100 /* ADCVU */ +#define WM8985_ADCVU_MASK 0x0100 /* ADCVU */ +#define WM8985_ADCVU_SHIFT 8 /* ADCVU */ +#define WM8985_ADCVU_WIDTH 1 /* ADCVU */ +#define WM8985_ADCVOLL_MASK 0x00FF /* ADCVOLL - [7:0] */ +#define WM8985_ADCVOLL_SHIFT 0 /* ADCVOLL - [7:0] */ +#define WM8985_ADCVOLL_WIDTH 8 /* ADCVOLL - [7:0] */ + +/* + * R16 (0x10) - Right ADC Digital Vol + */ +#define WM8985_ADCVU 0x0100 /* ADCVU */ +#define WM8985_ADCVU_MASK 0x0100 /* ADCVU */ +#define WM8985_ADCVU_SHIFT 8 /* ADCVU */ +#define WM8985_ADCVU_WIDTH 1 /* ADCVU */ +#define WM8985_ADCVOLR_MASK 0x00FF /* ADCVOLR - [7:0] */ +#define WM8985_ADCVOLR_SHIFT 0 /* ADCVOLR - [7:0] */ +#define WM8985_ADCVOLR_WIDTH 8 /* ADCVOLR - [7:0] */ + +/* + * R18 (0x12) - EQ1 - low shelf + */ +#define WM8985_EQ3DMODE 0x0100 /* EQ3DMODE */ +#define WM8985_EQ3DMODE_MASK 0x0100 /* EQ3DMODE */ +#define WM8985_EQ3DMODE_SHIFT 8 /* EQ3DMODE */ +#define WM8985_EQ3DMODE_WIDTH 1 /* EQ3DMODE */ +#define WM8985_EQ1C_MASK 0x0060 /* EQ1C - [6:5] */ +#define WM8985_EQ1C_SHIFT 5 /* EQ1C - [6:5] */ +#define WM8985_EQ1C_WIDTH 2 /* EQ1C - [6:5] */ +#define WM8985_EQ1G_MASK 0x001F /* EQ1G - [4:0] */ +#define WM8985_EQ1G_SHIFT 0 /* EQ1G - [4:0] */ +#define WM8985_EQ1G_WIDTH 5 /* EQ1G - [4:0] */ + +/* + * R19 (0x13) - EQ2 - peak 1 + */ +#define WM8985_EQ2BW 0x0100 /* EQ2BW */ +#define WM8985_EQ2BW_MASK 0x0100 /* EQ2BW */ +#define WM8985_EQ2BW_SHIFT 8 /* EQ2BW */ +#define WM8985_EQ2BW_WIDTH 1 /* EQ2BW */ +#define WM8985_EQ2C_MASK 0x0060 /* EQ2C - [6:5] */ +#define WM8985_EQ2C_SHIFT 5 /* EQ2C - [6:5] */ +#define WM8985_EQ2C_WIDTH 2 /* EQ2C - [6:5] */ +#define WM8985_EQ2G_MASK 0x001F /* EQ2G - [4:0] */ +#define WM8985_EQ2G_SHIFT 0 /* EQ2G - [4:0] */ +#define WM8985_EQ2G_WIDTH 5 /* EQ2G - [4:0] */ + +/* + * R20 (0x14) - EQ3 - peak 2 + */ +#define WM8985_EQ3BW 0x0100 /* EQ3BW */ +#define WM8985_EQ3BW_MASK 0x0100 /* EQ3BW */ +#define WM8985_EQ3BW_SHIFT 8 /* EQ3BW */ +#define WM8985_EQ3BW_WIDTH 1 /* EQ3BW */ +#define WM8985_EQ3C_MASK 0x0060 /* EQ3C - [6:5] */ +#define WM8985_EQ3C_SHIFT 5 /* EQ3C - [6:5] */ +#define WM8985_EQ3C_WIDTH 2 /* EQ3C - [6:5] */ +#define WM8985_EQ3G_MASK 0x001F /* EQ3G - [4:0] */ +#define WM8985_EQ3G_SHIFT 0 /* EQ3G - [4:0] */ +#define WM8985_EQ3G_WIDTH 5 /* EQ3G - [4:0] */ + +/* + * R21 (0x15) - EQ4 - peak 3 + */ +#define WM8985_EQ4BW 0x0100 /* EQ4BW */ +#define WM8985_EQ4BW_MASK 0x0100 /* EQ4BW */ +#define WM8985_EQ4BW_SHIFT 8 /* EQ4BW */ +#define WM8985_EQ4BW_WIDTH 1 /* EQ4BW */ +#define WM8985_EQ4C_MASK 0x0060 /* EQ4C - [6:5] */ +#define WM8985_EQ4C_SHIFT 5 /* EQ4C - [6:5] */ +#define WM8985_EQ4C_WIDTH 2 /* EQ4C - [6:5] */ +#define WM8985_EQ4G_MASK 0x001F /* EQ4G - [4:0] */ +#define WM8985_EQ4G_SHIFT 0 /* EQ4G - [4:0] */ +#define WM8985_EQ4G_WIDTH 5 /* EQ4G - [4:0] */ + +/* + * R22 (0x16) - EQ5 - high shelf + */ +#define WM8985_EQ5C_MASK 0x0060 /* EQ5C - [6:5] */ +#define WM8985_EQ5C_SHIFT 5 /* EQ5C - [6:5] */ +#define WM8985_EQ5C_WIDTH 2 /* EQ5C - [6:5] */ +#define WM8985_EQ5G_MASK 0x001F /* EQ5G - [4:0] */ +#define WM8985_EQ5G_SHIFT 0 /* EQ5G - [4:0] */ +#define WM8985_EQ5G_WIDTH 5 /* EQ5G - [4:0] */ + +/* + * R24 (0x18) - DAC Limiter 1 + */ +#define WM8985_LIMEN 0x0100 /* LIMEN */ +#define WM8985_LIMEN_MASK 0x0100 /* LIMEN */ +#define WM8985_LIMEN_SHIFT 8 /* LIMEN */ +#define WM8985_LIMEN_WIDTH 1 /* LIMEN */ +#define WM8985_LIMDCY_MASK 0x00F0 /* LIMDCY - [7:4] */ +#define WM8985_LIMDCY_SHIFT 4 /* LIMDCY - [7:4] */ +#define WM8985_LIMDCY_WIDTH 4 /* LIMDCY - [7:4] */ +#define WM8985_LIMATK_MASK 0x000F /* LIMATK - [3:0] */ +#define WM8985_LIMATK_SHIFT 0 /* LIMATK - [3:0] */ +#define WM8985_LIMATK_WIDTH 4 /* LIMATK - [3:0] */ + +/* + * R25 (0x19) - DAC Limiter 2 + */ +#define WM8985_LIMLVL_MASK 0x0070 /* LIMLVL - [6:4] */ +#define WM8985_LIMLVL_SHIFT 4 /* LIMLVL - [6:4] */ +#define WM8985_LIMLVL_WIDTH 3 /* LIMLVL - [6:4] */ +#define WM8985_LIMBOOST_MASK 0x000F /* LIMBOOST - [3:0] */ +#define WM8985_LIMBOOST_SHIFT 0 /* LIMBOOST - [3:0] */ +#define WM8985_LIMBOOST_WIDTH 4 /* LIMBOOST - [3:0] */ + +/* + * R27 (0x1B) - Notch Filter 1 + */ +#define WM8985_NFU 0x0100 /* NFU */ +#define WM8985_NFU_MASK 0x0100 /* NFU */ +#define WM8985_NFU_SHIFT 8 /* NFU */ +#define WM8985_NFU_WIDTH 1 /* NFU */ +#define WM8985_NFEN 0x0080 /* NFEN */ +#define WM8985_NFEN_MASK 0x0080 /* NFEN */ +#define WM8985_NFEN_SHIFT 7 /* NFEN */ +#define WM8985_NFEN_WIDTH 1 /* NFEN */ +#define WM8985_NFA0_13_7_MASK 0x007F /* NFA0(13:7) - [6:0] */ +#define WM8985_NFA0_13_7_SHIFT 0 /* NFA0(13:7) - [6:0] */ +#define WM8985_NFA0_13_7_WIDTH 7 /* NFA0(13:7) - [6:0] */ + +/* + * R28 (0x1C) - Notch Filter 2 + */ +#define WM8985_NFU 0x0100 /* NFU */ +#define WM8985_NFU_MASK 0x0100 /* NFU */ +#define WM8985_NFU_SHIFT 8 /* NFU */ +#define WM8985_NFU_WIDTH 1 /* NFU */ +#define WM8985_NFA0_6_0_MASK 0x007F /* NFA0(6:0) - [6:0] */ +#define WM8985_NFA0_6_0_SHIFT 0 /* NFA0(6:0) - [6:0] */ +#define WM8985_NFA0_6_0_WIDTH 7 /* NFA0(6:0) - [6:0] */ + +/* + * R29 (0x1D) - Notch Filter 3 + */ +#define WM8985_NFU 0x0100 /* NFU */ +#define WM8985_NFU_MASK 0x0100 /* NFU */ +#define WM8985_NFU_SHIFT 8 /* NFU */ +#define WM8985_NFU_WIDTH 1 /* NFU */ +#define WM8985_NFA1_13_7_MASK 0x007F /* NFA1(13:7) - [6:0] */ +#define WM8985_NFA1_13_7_SHIFT 0 /* NFA1(13:7) - [6:0] */ +#define WM8985_NFA1_13_7_WIDTH 7 /* NFA1(13:7) - [6:0] */ + +/* + * R30 (0x1E) - Notch Filter 4 + */ +#define WM8985_NFU 0x0100 /* NFU */ +#define WM8985_NFU_MASK 0x0100 /* NFU */ +#define WM8985_NFU_SHIFT 8 /* NFU */ +#define WM8985_NFU_WIDTH 1 /* NFU */ +#define WM8985_NFA1_6_0_MASK 0x007F /* NFA1(6:0) - [6:0] */ +#define WM8985_NFA1_6_0_SHIFT 0 /* NFA1(6:0) - [6:0] */ +#define WM8985_NFA1_6_0_WIDTH 7 /* NFA1(6:0) - [6:0] */ + +/* + * R32 (0x20) - ALC control 1 + */ +#define WM8985_ALCSEL_MASK 0x0180 /* ALCSEL - [8:7] */ +#define WM8985_ALCSEL_SHIFT 7 /* ALCSEL - [8:7] */ +#define WM8985_ALCSEL_WIDTH 2 /* ALCSEL - [8:7] */ +#define WM8985_ALCMAX_MASK 0x0038 /* ALCMAX - [5:3] */ +#define WM8985_ALCMAX_SHIFT 3 /* ALCMAX - [5:3] */ +#define WM8985_ALCMAX_WIDTH 3 /* ALCMAX - [5:3] */ +#define WM8985_ALCMIN_MASK 0x0007 /* ALCMIN - [2:0] */ +#define WM8985_ALCMIN_SHIFT 0 /* ALCMIN - [2:0] */ +#define WM8985_ALCMIN_WIDTH 3 /* ALCMIN - [2:0] */ + +/* + * R33 (0x21) - ALC control 2 + */ +#define WM8985_ALCHLD_MASK 0x00F0 /* ALCHLD - [7:4] */ +#define WM8985_ALCHLD_SHIFT 4 /* ALCHLD - [7:4] */ +#define WM8985_ALCHLD_WIDTH 4 /* ALCHLD - [7:4] */ +#define WM8985_ALCLVL_MASK 0x000F /* ALCLVL - [3:0] */ +#define WM8985_ALCLVL_SHIFT 0 /* ALCLVL - [3:0] */ +#define WM8985_ALCLVL_WIDTH 4 /* ALCLVL - [3:0] */ + +/* + * R34 (0x22) - ALC control 3 + */ +#define WM8985_ALCMODE 0x0100 /* ALCMODE */ +#define WM8985_ALCMODE_MASK 0x0100 /* ALCMODE */ +#define WM8985_ALCMODE_SHIFT 8 /* ALCMODE */ +#define WM8985_ALCMODE_WIDTH 1 /* ALCMODE */ +#define WM8985_ALCDCY_MASK 0x00F0 /* ALCDCY - [7:4] */ +#define WM8985_ALCDCY_SHIFT 4 /* ALCDCY - [7:4] */ +#define WM8985_ALCDCY_WIDTH 4 /* ALCDCY - [7:4] */ +#define WM8985_ALCATK_MASK 0x000F /* ALCATK - [3:0] */ +#define WM8985_ALCATK_SHIFT 0 /* ALCATK - [3:0] */ +#define WM8985_ALCATK_WIDTH 4 /* ALCATK - [3:0] */ + +/* + * R35 (0x23) - Noise Gate + */ +#define WM8985_NGEN 0x0008 /* NGEN */ +#define WM8985_NGEN_MASK 0x0008 /* NGEN */ +#define WM8985_NGEN_SHIFT 3 /* NGEN */ +#define WM8985_NGEN_WIDTH 1 /* NGEN */ +#define WM8985_NGTH_MASK 0x0007 /* NGTH - [2:0] */ +#define WM8985_NGTH_SHIFT 0 /* NGTH - [2:0] */ +#define WM8985_NGTH_WIDTH 3 /* NGTH - [2:0] */ + +/* + * R36 (0x24) - PLL N + */ +#define WM8985_PLL_PRESCALE 0x0010 /* PLL_PRESCALE */ +#define WM8985_PLL_PRESCALE_MASK 0x0010 /* PLL_PRESCALE */ +#define WM8985_PLL_PRESCALE_SHIFT 4 /* PLL_PRESCALE */ +#define WM8985_PLL_PRESCALE_WIDTH 1 /* PLL_PRESCALE */ +#define WM8985_PLLN_MASK 0x000F /* PLLN - [3:0] */ +#define WM8985_PLLN_SHIFT 0 /* PLLN - [3:0] */ +#define WM8985_PLLN_WIDTH 4 /* PLLN - [3:0] */ + +/* + * R37 (0x25) - PLL K 1 + */ +#define WM8985_PLLK_23_18_MASK 0x003F /* PLLK(23:18) - [5:0] */ +#define WM8985_PLLK_23_18_SHIFT 0 /* PLLK(23:18) - [5:0] */ +#define WM8985_PLLK_23_18_WIDTH 6 /* PLLK(23:18) - [5:0] */ + +/* + * R38 (0x26) - PLL K 2 + */ +#define WM8985_PLLK_17_9_MASK 0x01FF /* PLLK(17:9) - [8:0] */ +#define WM8985_PLLK_17_9_SHIFT 0 /* PLLK(17:9) - [8:0] */ +#define WM8985_PLLK_17_9_WIDTH 9 /* PLLK(17:9) - [8:0] */ + +/* + * R39 (0x27) - PLL K 3 + */ +#define WM8985_PLLK_8_0_MASK 0x01FF /* PLLK(8:0) - [8:0] */ +#define WM8985_PLLK_8_0_SHIFT 0 /* PLLK(8:0) - [8:0] */ +#define WM8985_PLLK_8_0_WIDTH 9 /* PLLK(8:0) - [8:0] */ + +/* + * R41 (0x29) - 3D control + */ +#define WM8985_DEPTH3D_MASK 0x000F /* DEPTH3D - [3:0] */ +#define WM8985_DEPTH3D_SHIFT 0 /* DEPTH3D - [3:0] */ +#define WM8985_DEPTH3D_WIDTH 4 /* DEPTH3D - [3:0] */ + +/* + * R42 (0x2A) - OUT4 to ADC + */ +#define WM8985_OUT4_2ADCVOL_MASK 0x01C0 /* OUT4_2ADCVOL - [8:6] */ +#define WM8985_OUT4_2ADCVOL_SHIFT 6 /* OUT4_2ADCVOL - [8:6] */ +#define WM8985_OUT4_2ADCVOL_WIDTH 3 /* OUT4_2ADCVOL - [8:6] */ +#define WM8985_OUT4_2LNR 0x0020 /* OUT4_2LNR */ +#define WM8985_OUT4_2LNR_MASK 0x0020 /* OUT4_2LNR */ +#define WM8985_OUT4_2LNR_SHIFT 5 /* OUT4_2LNR */ +#define WM8985_OUT4_2LNR_WIDTH 1 /* OUT4_2LNR */ +#define WM8985_POBCTRL 0x0004 /* POBCTRL */ +#define WM8985_POBCTRL_MASK 0x0004 /* POBCTRL */ +#define WM8985_POBCTRL_SHIFT 2 /* POBCTRL */ +#define WM8985_POBCTRL_WIDTH 1 /* POBCTRL */ +#define WM8985_DELEN 0x0002 /* DELEN */ +#define WM8985_DELEN_MASK 0x0002 /* DELEN */ +#define WM8985_DELEN_SHIFT 1 /* DELEN */ +#define WM8985_DELEN_WIDTH 1 /* DELEN */ +#define WM8985_OUT1DEL 0x0001 /* OUT1DEL */ +#define WM8985_OUT1DEL_MASK 0x0001 /* OUT1DEL */ +#define WM8985_OUT1DEL_SHIFT 0 /* OUT1DEL */ +#define WM8985_OUT1DEL_WIDTH 1 /* OUT1DEL */ + +/* + * R43 (0x2B) - Beep control + */ +#define WM8985_BYPL2RMIX 0x0100 /* BYPL2RMIX */ +#define WM8985_BYPL2RMIX_MASK 0x0100 /* BYPL2RMIX */ +#define WM8985_BYPL2RMIX_SHIFT 8 /* BYPL2RMIX */ +#define WM8985_BYPL2RMIX_WIDTH 1 /* BYPL2RMIX */ +#define WM8985_BYPR2LMIX 0x0080 /* BYPR2LMIX */ +#define WM8985_BYPR2LMIX_MASK 0x0080 /* BYPR2LMIX */ +#define WM8985_BYPR2LMIX_SHIFT 7 /* BYPR2LMIX */ +#define WM8985_BYPR2LMIX_WIDTH 1 /* BYPR2LMIX */ +#define WM8985_MUTERPGA2INV 0x0020 /* MUTERPGA2INV */ +#define WM8985_MUTERPGA2INV_MASK 0x0020 /* MUTERPGA2INV */ +#define WM8985_MUTERPGA2INV_SHIFT 5 /* MUTERPGA2INV */ +#define WM8985_MUTERPGA2INV_WIDTH 1 /* MUTERPGA2INV */ +#define WM8985_INVROUT2 0x0010 /* INVROUT2 */ +#define WM8985_INVROUT2_MASK 0x0010 /* INVROUT2 */ +#define WM8985_INVROUT2_SHIFT 4 /* INVROUT2 */ +#define WM8985_INVROUT2_WIDTH 1 /* INVROUT2 */ +#define WM8985_BEEPVOL_MASK 0x000E /* BEEPVOL - [3:1] */ +#define WM8985_BEEPVOL_SHIFT 1 /* BEEPVOL - [3:1] */ +#define WM8985_BEEPVOL_WIDTH 3 /* BEEPVOL - [3:1] */ +#define WM8985_BEEPEN 0x0001 /* BEEPEN */ +#define WM8985_BEEPEN_MASK 0x0001 /* BEEPEN */ +#define WM8985_BEEPEN_SHIFT 0 /* BEEPEN */ +#define WM8985_BEEPEN_WIDTH 1 /* BEEPEN */ + +/* + * R44 (0x2C) - Input ctrl + */ +#define WM8985_MBVSEL 0x0100 /* MBVSEL */ +#define WM8985_MBVSEL_MASK 0x0100 /* MBVSEL */ +#define WM8985_MBVSEL_SHIFT 8 /* MBVSEL */ +#define WM8985_MBVSEL_WIDTH 1 /* MBVSEL */ +#define WM8985_R2_2INPPGA 0x0040 /* R2_2INPPGA */ +#define WM8985_R2_2INPPGA_MASK 0x0040 /* R2_2INPPGA */ +#define WM8985_R2_2INPPGA_SHIFT 6 /* R2_2INPPGA */ +#define WM8985_R2_2INPPGA_WIDTH 1 /* R2_2INPPGA */ +#define WM8985_RIN2INPPGA 0x0020 /* RIN2INPPGA */ +#define WM8985_RIN2INPPGA_MASK 0x0020 /* RIN2INPPGA */ +#define WM8985_RIN2INPPGA_SHIFT 5 /* RIN2INPPGA */ +#define WM8985_RIN2INPPGA_WIDTH 1 /* RIN2INPPGA */ +#define WM8985_RIP2INPPGA 0x0010 /* RIP2INPPGA */ +#define WM8985_RIP2INPPGA_MASK 0x0010 /* RIP2INPPGA */ +#define WM8985_RIP2INPPGA_SHIFT 4 /* RIP2INPPGA */ +#define WM8985_RIP2INPPGA_WIDTH 1 /* RIP2INPPGA */ +#define WM8985_L2_2INPPGA 0x0004 /* L2_2INPPGA */ +#define WM8985_L2_2INPPGA_MASK 0x0004 /* L2_2INPPGA */ +#define WM8985_L2_2INPPGA_SHIFT 2 /* L2_2INPPGA */ +#define WM8985_L2_2INPPGA_WIDTH 1 /* L2_2INPPGA */ +#define WM8985_LIN2INPPGA 0x0002 /* LIN2INPPGA */ +#define WM8985_LIN2INPPGA_MASK 0x0002 /* LIN2INPPGA */ +#define WM8985_LIN2INPPGA_SHIFT 1 /* LIN2INPPGA */ +#define WM8985_LIN2INPPGA_WIDTH 1 /* LIN2INPPGA */ +#define WM8985_LIP2INPPGA 0x0001 /* LIP2INPPGA */ +#define WM8985_LIP2INPPGA_MASK 0x0001 /* LIP2INPPGA */ +#define WM8985_LIP2INPPGA_SHIFT 0 /* LIP2INPPGA */ +#define WM8985_LIP2INPPGA_WIDTH 1 /* LIP2INPPGA */ + +/* + * R45 (0x2D) - Left INP PGA gain ctrl + */ +#define WM8985_INPGAVU 0x0100 /* INPGAVU */ +#define WM8985_INPGAVU_MASK 0x0100 /* INPGAVU */ +#define WM8985_INPGAVU_SHIFT 8 /* INPGAVU */ +#define WM8985_INPGAVU_WIDTH 1 /* INPGAVU */ +#define WM8985_INPPGAZCL 0x0080 /* INPPGAZCL */ +#define WM8985_INPPGAZCL_MASK 0x0080 /* INPPGAZCL */ +#define WM8985_INPPGAZCL_SHIFT 7 /* INPPGAZCL */ +#define WM8985_INPPGAZCL_WIDTH 1 /* INPPGAZCL */ +#define WM8985_INPPGAMUTEL 0x0040 /* INPPGAMUTEL */ +#define WM8985_INPPGAMUTEL_MASK 0x0040 /* INPPGAMUTEL */ +#define WM8985_INPPGAMUTEL_SHIFT 6 /* INPPGAMUTEL */ +#define WM8985_INPPGAMUTEL_WIDTH 1 /* INPPGAMUTEL */ +#define WM8985_INPPGAVOLL_MASK 0x003F /* INPPGAVOLL - [5:0] */ +#define WM8985_INPPGAVOLL_SHIFT 0 /* INPPGAVOLL - [5:0] */ +#define WM8985_INPPGAVOLL_WIDTH 6 /* INPPGAVOLL - [5:0] */ + +/* + * R46 (0x2E) - Right INP PGA gain ctrl + */ +#define WM8985_INPGAVU 0x0100 /* INPGAVU */ +#define WM8985_INPGAVU_MASK 0x0100 /* INPGAVU */ +#define WM8985_INPGAVU_SHIFT 8 /* INPGAVU */ +#define WM8985_INPGAVU_WIDTH 1 /* INPGAVU */ +#define WM8985_INPPGAZCR 0x0080 /* INPPGAZCR */ +#define WM8985_INPPGAZCR_MASK 0x0080 /* INPPGAZCR */ +#define WM8985_INPPGAZCR_SHIFT 7 /* INPPGAZCR */ +#define WM8985_INPPGAZCR_WIDTH 1 /* INPPGAZCR */ +#define WM8985_INPPGAMUTER 0x0040 /* INPPGAMUTER */ +#define WM8985_INPPGAMUTER_MASK 0x0040 /* INPPGAMUTER */ +#define WM8985_INPPGAMUTER_SHIFT 6 /* INPPGAMUTER */ +#define WM8985_INPPGAMUTER_WIDTH 1 /* INPPGAMUTER */ +#define WM8985_INPPGAVOLR_MASK 0x003F /* INPPGAVOLR - [5:0] */ +#define WM8985_INPPGAVOLR_SHIFT 0 /* INPPGAVOLR - [5:0] */ +#define WM8985_INPPGAVOLR_WIDTH 6 /* INPPGAVOLR - [5:0] */ + +/* + * R47 (0x2F) - Left ADC BOOST ctrl + */ +#define WM8985_PGABOOSTL 0x0100 /* PGABOOSTL */ +#define WM8985_PGABOOSTL_MASK 0x0100 /* PGABOOSTL */ +#define WM8985_PGABOOSTL_SHIFT 8 /* PGABOOSTL */ +#define WM8985_PGABOOSTL_WIDTH 1 /* PGABOOSTL */ +#define WM8985_L2_2BOOSTVOL_MASK 0x0070 /* L2_2BOOSTVOL - [6:4] */ +#define WM8985_L2_2BOOSTVOL_SHIFT 4 /* L2_2BOOSTVOL - [6:4] */ +#define WM8985_L2_2BOOSTVOL_WIDTH 3 /* L2_2BOOSTVOL - [6:4] */ +#define WM8985_AUXL2BOOSTVOL_MASK 0x0007 /* AUXL2BOOSTVOL - [2:0] */ +#define WM8985_AUXL2BOOSTVOL_SHIFT 0 /* AUXL2BOOSTVOL - [2:0] */ +#define WM8985_AUXL2BOOSTVOL_WIDTH 3 /* AUXL2BOOSTVOL - [2:0] */ + +/* + * R48 (0x30) - Right ADC BOOST ctrl + */ +#define WM8985_PGABOOSTR 0x0100 /* PGABOOSTR */ +#define WM8985_PGABOOSTR_MASK 0x0100 /* PGABOOSTR */ +#define WM8985_PGABOOSTR_SHIFT 8 /* PGABOOSTR */ +#define WM8985_PGABOOSTR_WIDTH 1 /* PGABOOSTR */ +#define WM8985_R2_2BOOSTVOL_MASK 0x0070 /* R2_2BOOSTVOL - [6:4] */ +#define WM8985_R2_2BOOSTVOL_SHIFT 4 /* R2_2BOOSTVOL - [6:4] */ +#define WM8985_R2_2BOOSTVOL_WIDTH 3 /* R2_2BOOSTVOL - [6:4] */ +#define WM8985_AUXR2BOOSTVOL_MASK 0x0007 /* AUXR2BOOSTVOL - [2:0] */ +#define WM8985_AUXR2BOOSTVOL_SHIFT 0 /* AUXR2BOOSTVOL - [2:0] */ +#define WM8985_AUXR2BOOSTVOL_WIDTH 3 /* AUXR2BOOSTVOL - [2:0] */ + +/* + * R49 (0x31) - Output ctrl + */ +#define WM8985_DACL2RMIX 0x0040 /* DACL2RMIX */ +#define WM8985_DACL2RMIX_MASK 0x0040 /* DACL2RMIX */ +#define WM8985_DACL2RMIX_SHIFT 6 /* DACL2RMIX */ +#define WM8985_DACL2RMIX_WIDTH 1 /* DACL2RMIX */ +#define WM8985_DACR2LMIX 0x0020 /* DACR2LMIX */ +#define WM8985_DACR2LMIX_MASK 0x0020 /* DACR2LMIX */ +#define WM8985_DACR2LMIX_SHIFT 5 /* DACR2LMIX */ +#define WM8985_DACR2LMIX_WIDTH 1 /* DACR2LMIX */ +#define WM8985_OUT4BOOST 0x0010 /* OUT4BOOST */ +#define WM8985_OUT4BOOST_MASK 0x0010 /* OUT4BOOST */ +#define WM8985_OUT4BOOST_SHIFT 4 /* OUT4BOOST */ +#define WM8985_OUT4BOOST_WIDTH 1 /* OUT4BOOST */ +#define WM8985_OUT3BOOST 0x0008 /* OUT3BOOST */ +#define WM8985_OUT3BOOST_MASK 0x0008 /* OUT3BOOST */ +#define WM8985_OUT3BOOST_SHIFT 3 /* OUT3BOOST */ +#define WM8985_OUT3BOOST_WIDTH 1 /* OUT3BOOST */ +#define WM8985_TSOPCTRL 0x0004 /* TSOPCTRL */ +#define WM8985_TSOPCTRL_MASK 0x0004 /* TSOPCTRL */ +#define WM8985_TSOPCTRL_SHIFT 2 /* TSOPCTRL */ +#define WM8985_TSOPCTRL_WIDTH 1 /* TSOPCTRL */ +#define WM8985_TSDEN 0x0002 /* TSDEN */ +#define WM8985_TSDEN_MASK 0x0002 /* TSDEN */ +#define WM8985_TSDEN_SHIFT 1 /* TSDEN */ +#define WM8985_TSDEN_WIDTH 1 /* TSDEN */ +#define WM8985_VROI 0x0001 /* VROI */ +#define WM8985_VROI_MASK 0x0001 /* VROI */ +#define WM8985_VROI_SHIFT 0 /* VROI */ +#define WM8985_VROI_WIDTH 1 /* VROI */ + +/* + * R50 (0x32) - Left mixer ctrl + */ +#define WM8985_AUXLMIXVOL_MASK 0x01C0 /* AUXLMIXVOL - [8:6] */ +#define WM8985_AUXLMIXVOL_SHIFT 6 /* AUXLMIXVOL - [8:6] */ +#define WM8985_AUXLMIXVOL_WIDTH 3 /* AUXLMIXVOL - [8:6] */ +#define WM8985_AUXL2LMIX 0x0020 /* AUXL2LMIX */ +#define WM8985_AUXL2LMIX_MASK 0x0020 /* AUXL2LMIX */ +#define WM8985_AUXL2LMIX_SHIFT 5 /* AUXL2LMIX */ +#define WM8985_AUXL2LMIX_WIDTH 1 /* AUXL2LMIX */ +#define WM8985_BYPLMIXVOL_MASK 0x001C /* BYPLMIXVOL - [4:2] */ +#define WM8985_BYPLMIXVOL_SHIFT 2 /* BYPLMIXVOL - [4:2] */ +#define WM8985_BYPLMIXVOL_WIDTH 3 /* BYPLMIXVOL - [4:2] */ +#define WM8985_BYPL2LMIX 0x0002 /* BYPL2LMIX */ +#define WM8985_BYPL2LMIX_MASK 0x0002 /* BYPL2LMIX */ +#define WM8985_BYPL2LMIX_SHIFT 1 /* BYPL2LMIX */ +#define WM8985_BYPL2LMIX_WIDTH 1 /* BYPL2LMIX */ +#define WM8985_DACL2LMIX 0x0001 /* DACL2LMIX */ +#define WM8985_DACL2LMIX_MASK 0x0001 /* DACL2LMIX */ +#define WM8985_DACL2LMIX_SHIFT 0 /* DACL2LMIX */ +#define WM8985_DACL2LMIX_WIDTH 1 /* DACL2LMIX */ + +/* + * R51 (0x33) - Right mixer ctrl + */ +#define WM8985_AUXRMIXVOL_MASK 0x01C0 /* AUXRMIXVOL - [8:6] */ +#define WM8985_AUXRMIXVOL_SHIFT 6 /* AUXRMIXVOL - [8:6] */ +#define WM8985_AUXRMIXVOL_WIDTH 3 /* AUXRMIXVOL - [8:6] */ +#define WM8985_AUXR2RMIX 0x0020 /* AUXR2RMIX */ +#define WM8985_AUXR2RMIX_MASK 0x0020 /* AUXR2RMIX */ +#define WM8985_AUXR2RMIX_SHIFT 5 /* AUXR2RMIX */ +#define WM8985_AUXR2RMIX_WIDTH 1 /* AUXR2RMIX */ +#define WM8985_BYPRMIXVOL_MASK 0x001C /* BYPRMIXVOL - [4:2] */ +#define WM8985_BYPRMIXVOL_SHIFT 2 /* BYPRMIXVOL - [4:2] */ +#define WM8985_BYPRMIXVOL_WIDTH 3 /* BYPRMIXVOL - [4:2] */ +#define WM8985_BYPR2RMIX 0x0002 /* BYPR2RMIX */ +#define WM8985_BYPR2RMIX_MASK 0x0002 /* BYPR2RMIX */ +#define WM8985_BYPR2RMIX_SHIFT 1 /* BYPR2RMIX */ +#define WM8985_BYPR2RMIX_WIDTH 1 /* BYPR2RMIX */ +#define WM8985_DACR2RMIX 0x0001 /* DACR2RMIX */ +#define WM8985_DACR2RMIX_MASK 0x0001 /* DACR2RMIX */ +#define WM8985_DACR2RMIX_SHIFT 0 /* DACR2RMIX */ +#define WM8985_DACR2RMIX_WIDTH 1 /* DACR2RMIX */ + +/* + * R52 (0x34) - LOUT1 (HP) volume ctrl + */ +#define WM8985_OUT1VU 0x0100 /* OUT1VU */ +#define WM8985_OUT1VU_MASK 0x0100 /* OUT1VU */ +#define WM8985_OUT1VU_SHIFT 8 /* OUT1VU */ +#define WM8985_OUT1VU_WIDTH 1 /* OUT1VU */ +#define WM8985_LOUT1ZC 0x0080 /* LOUT1ZC */ +#define WM8985_LOUT1ZC_MASK 0x0080 /* LOUT1ZC */ +#define WM8985_LOUT1ZC_SHIFT 7 /* LOUT1ZC */ +#define WM8985_LOUT1ZC_WIDTH 1 /* LOUT1ZC */ +#define WM8985_LOUT1MUTE 0x0040 /* LOUT1MUTE */ +#define WM8985_LOUT1MUTE_MASK 0x0040 /* LOUT1MUTE */ +#define WM8985_LOUT1MUTE_SHIFT 6 /* LOUT1MUTE */ +#define WM8985_LOUT1MUTE_WIDTH 1 /* LOUT1MUTE */ +#define WM8985_LOUT1VOL_MASK 0x003F /* LOUT1VOL - [5:0] */ +#define WM8985_LOUT1VOL_SHIFT 0 /* LOUT1VOL - [5:0] */ +#define WM8985_LOUT1VOL_WIDTH 6 /* LOUT1VOL - [5:0] */ + +/* + * R53 (0x35) - ROUT1 (HP) volume ctrl + */ +#define WM8985_OUT1VU 0x0100 /* OUT1VU */ +#define WM8985_OUT1VU_MASK 0x0100 /* OUT1VU */ +#define WM8985_OUT1VU_SHIFT 8 /* OUT1VU */ +#define WM8985_OUT1VU_WIDTH 1 /* OUT1VU */ +#define WM8985_ROUT1ZC 0x0080 /* ROUT1ZC */ +#define WM8985_ROUT1ZC_MASK 0x0080 /* ROUT1ZC */ +#define WM8985_ROUT1ZC_SHIFT 7 /* ROUT1ZC */ +#define WM8985_ROUT1ZC_WIDTH 1 /* ROUT1ZC */ +#define WM8985_ROUT1MUTE 0x0040 /* ROUT1MUTE */ +#define WM8985_ROUT1MUTE_MASK 0x0040 /* ROUT1MUTE */ +#define WM8985_ROUT1MUTE_SHIFT 6 /* ROUT1MUTE */ +#define WM8985_ROUT1MUTE_WIDTH 1 /* ROUT1MUTE */ +#define WM8985_ROUT1VOL_MASK 0x003F /* ROUT1VOL - [5:0] */ +#define WM8985_ROUT1VOL_SHIFT 0 /* ROUT1VOL - [5:0] */ +#define WM8985_ROUT1VOL_WIDTH 6 /* ROUT1VOL - [5:0] */ + +/* + * R54 (0x36) - LOUT2 (SPK) volume ctrl + */ +#define WM8985_OUT2VU 0x0100 /* OUT2VU */ +#define WM8985_OUT2VU_MASK 0x0100 /* OUT2VU */ +#define WM8985_OUT2VU_SHIFT 8 /* OUT2VU */ +#define WM8985_OUT2VU_WIDTH 1 /* OUT2VU */ +#define WM8985_LOUT2ZC 0x0080 /* LOUT2ZC */ +#define WM8985_LOUT2ZC_MASK 0x0080 /* LOUT2ZC */ +#define WM8985_LOUT2ZC_SHIFT 7 /* LOUT2ZC */ +#define WM8985_LOUT2ZC_WIDTH 1 /* LOUT2ZC */ +#define WM8985_LOUT2MUTE 0x0040 /* LOUT2MUTE */ +#define WM8985_LOUT2MUTE_MASK 0x0040 /* LOUT2MUTE */ +#define WM8985_LOUT2MUTE_SHIFT 6 /* LOUT2MUTE */ +#define WM8985_LOUT2MUTE_WIDTH 1 /* LOUT2MUTE */ +#define WM8985_LOUT2VOL_MASK 0x003F /* LOUT2VOL - [5:0] */ +#define WM8985_LOUT2VOL_SHIFT 0 /* LOUT2VOL - [5:0] */ +#define WM8985_LOUT2VOL_WIDTH 6 /* LOUT2VOL - [5:0] */ + +/* + * R55 (0x37) - ROUT2 (SPK) volume ctrl + */ +#define WM8985_OUT2VU 0x0100 /* OUT2VU */ +#define WM8985_OUT2VU_MASK 0x0100 /* OUT2VU */ +#define WM8985_OUT2VU_SHIFT 8 /* OUT2VU */ +#define WM8985_OUT2VU_WIDTH 1 /* OUT2VU */ +#define WM8985_ROUT2ZC 0x0080 /* ROUT2ZC */ +#define WM8985_ROUT2ZC_MASK 0x0080 /* ROUT2ZC */ +#define WM8985_ROUT2ZC_SHIFT 7 /* ROUT2ZC */ +#define WM8985_ROUT2ZC_WIDTH 1 /* ROUT2ZC */ +#define WM8985_ROUT2MUTE 0x0040 /* ROUT2MUTE */ +#define WM8985_ROUT2MUTE_MASK 0x0040 /* ROUT2MUTE */ +#define WM8985_ROUT2MUTE_SHIFT 6 /* ROUT2MUTE */ +#define WM8985_ROUT2MUTE_WIDTH 1 /* ROUT2MUTE */ +#define WM8985_ROUT2VOL_MASK 0x003F /* ROUT2VOL - [5:0] */ +#define WM8985_ROUT2VOL_SHIFT 0 /* ROUT2VOL - [5:0] */ +#define WM8985_ROUT2VOL_WIDTH 6 /* ROUT2VOL - [5:0] */ + +/* + * R56 (0x38) - OUT3 mixer ctrl + */ +#define WM8985_OUT3MUTE 0x0040 /* OUT3MUTE */ +#define WM8985_OUT3MUTE_MASK 0x0040 /* OUT3MUTE */ +#define WM8985_OUT3MUTE_SHIFT 6 /* OUT3MUTE */ +#define WM8985_OUT3MUTE_WIDTH 1 /* OUT3MUTE */ +#define WM8985_OUT4_2OUT3 0x0008 /* OUT4_2OUT3 */ +#define WM8985_OUT4_2OUT3_MASK 0x0008 /* OUT4_2OUT3 */ +#define WM8985_OUT4_2OUT3_SHIFT 3 /* OUT4_2OUT3 */ +#define WM8985_OUT4_2OUT3_WIDTH 1 /* OUT4_2OUT3 */ +#define WM8985_BYPL2OUT3 0x0004 /* BYPL2OUT3 */ +#define WM8985_BYPL2OUT3_MASK 0x0004 /* BYPL2OUT3 */ +#define WM8985_BYPL2OUT3_SHIFT 2 /* BYPL2OUT3 */ +#define WM8985_BYPL2OUT3_WIDTH 1 /* BYPL2OUT3 */ +#define WM8985_LMIX2OUT3 0x0002 /* LMIX2OUT3 */ +#define WM8985_LMIX2OUT3_MASK 0x0002 /* LMIX2OUT3 */ +#define WM8985_LMIX2OUT3_SHIFT 1 /* LMIX2OUT3 */ +#define WM8985_LMIX2OUT3_WIDTH 1 /* LMIX2OUT3 */ +#define WM8985_LDAC2OUT3 0x0001 /* LDAC2OUT3 */ +#define WM8985_LDAC2OUT3_MASK 0x0001 /* LDAC2OUT3 */ +#define WM8985_LDAC2OUT3_SHIFT 0 /* LDAC2OUT3 */ +#define WM8985_LDAC2OUT3_WIDTH 1 /* LDAC2OUT3 */ + +/* + * R57 (0x39) - OUT4 (MONO) mix ctrl + */ +#define WM8985_OUT3_2OUT4 0x0080 /* OUT3_2OUT4 */ +#define WM8985_OUT3_2OUT4_MASK 0x0080 /* OUT3_2OUT4 */ +#define WM8985_OUT3_2OUT4_SHIFT 7 /* OUT3_2OUT4 */ +#define WM8985_OUT3_2OUT4_WIDTH 1 /* OUT3_2OUT4 */ +#define WM8985_OUT4MUTE 0x0040 /* OUT4MUTE */ +#define WM8985_OUT4MUTE_MASK 0x0040 /* OUT4MUTE */ +#define WM8985_OUT4MUTE_SHIFT 6 /* OUT4MUTE */ +#define WM8985_OUT4MUTE_WIDTH 1 /* OUT4MUTE */ +#define WM8985_OUT4ATTN 0x0020 /* OUT4ATTN */ +#define WM8985_OUT4ATTN_MASK 0x0020 /* OUT4ATTN */ +#define WM8985_OUT4ATTN_SHIFT 5 /* OUT4ATTN */ +#define WM8985_OUT4ATTN_WIDTH 1 /* OUT4ATTN */ +#define WM8985_LMIX2OUT4 0x0010 /* LMIX2OUT4 */ +#define WM8985_LMIX2OUT4_MASK 0x0010 /* LMIX2OUT4 */ +#define WM8985_LMIX2OUT4_SHIFT 4 /* LMIX2OUT4 */ +#define WM8985_LMIX2OUT4_WIDTH 1 /* LMIX2OUT4 */ +#define WM8985_LDAC2OUT4 0x0008 /* LDAC2OUT4 */ +#define WM8985_LDAC2OUT4_MASK 0x0008 /* LDAC2OUT4 */ +#define WM8985_LDAC2OUT4_SHIFT 3 /* LDAC2OUT4 */ +#define WM8985_LDAC2OUT4_WIDTH 1 /* LDAC2OUT4 */ +#define WM8985_BYPR2OUT4 0x0004 /* BYPR2OUT4 */ +#define WM8985_BYPR2OUT4_MASK 0x0004 /* BYPR2OUT4 */ +#define WM8985_BYPR2OUT4_SHIFT 2 /* BYPR2OUT4 */ +#define WM8985_BYPR2OUT4_WIDTH 1 /* BYPR2OUT4 */ +#define WM8985_RMIX2OUT4 0x0002 /* RMIX2OUT4 */ +#define WM8985_RMIX2OUT4_MASK 0x0002 /* RMIX2OUT4 */ +#define WM8985_RMIX2OUT4_SHIFT 1 /* RMIX2OUT4 */ +#define WM8985_RMIX2OUT4_WIDTH 1 /* RMIX2OUT4 */ +#define WM8985_RDAC2OUT4 0x0001 /* RDAC2OUT4 */ +#define WM8985_RDAC2OUT4_MASK 0x0001 /* RDAC2OUT4 */ +#define WM8985_RDAC2OUT4_SHIFT 0 /* RDAC2OUT4 */ +#define WM8985_RDAC2OUT4_WIDTH 1 /* RDAC2OUT4 */ + +/* + * R60 (0x3C) - OUTPUT ctrl + */ +#define WM8985_VIDBUFFTST_MASK 0x01E0 /* VIDBUFFTST - [8:5] */ +#define WM8985_VIDBUFFTST_SHIFT 5 /* VIDBUFFTST - [8:5] */ +#define WM8985_VIDBUFFTST_WIDTH 4 /* VIDBUFFTST - [8:5] */ +#define WM8985_HPTOG 0x0008 /* HPTOG */ +#define WM8985_HPTOG_MASK 0x0008 /* HPTOG */ +#define WM8985_HPTOG_SHIFT 3 /* HPTOG */ +#define WM8985_HPTOG_WIDTH 1 /* HPTOG */ + +/* + * R61 (0x3D) - BIAS CTRL + */ +#define WM8985_BIASCUT 0x0100 /* BIASCUT */ +#define WM8985_BIASCUT_MASK 0x0100 /* BIASCUT */ +#define WM8985_BIASCUT_SHIFT 8 /* BIASCUT */ +#define WM8985_BIASCUT_WIDTH 1 /* BIASCUT */ +#define WM8985_HALFIPBIAS 0x0080 /* HALFIPBIAS */ +#define WM8985_HALFIPBIAS_MASK 0x0080 /* HALFIPBIAS */ +#define WM8985_HALFIPBIAS_SHIFT 7 /* HALFIPBIAS */ +#define WM8985_HALFIPBIAS_WIDTH 1 /* HALFIPBIAS */ +#define WM8985_VBBIASTST_MASK 0x0060 /* VBBIASTST - [6:5] */ +#define WM8985_VBBIASTST_SHIFT 5 /* VBBIASTST - [6:5] */ +#define WM8985_VBBIASTST_WIDTH 2 /* VBBIASTST - [6:5] */ +#define WM8985_BUFBIAS_MASK 0x0018 /* BUFBIAS - [4:3] */ +#define WM8985_BUFBIAS_SHIFT 3 /* BUFBIAS - [4:3] */ +#define WM8985_BUFBIAS_WIDTH 2 /* BUFBIAS - [4:3] */ +#define WM8985_ADCBIAS_MASK 0x0006 /* ADCBIAS - [2:1] */ +#define WM8985_ADCBIAS_SHIFT 1 /* ADCBIAS - [2:1] */ +#define WM8985_ADCBIAS_WIDTH 2 /* ADCBIAS - [2:1] */ +#define WM8985_HALFOPBIAS 0x0001 /* HALFOPBIAS */ +#define WM8985_HALFOPBIAS_MASK 0x0001 /* HALFOPBIAS */ +#define WM8985_HALFOPBIAS_SHIFT 0 /* HALFOPBIAS */ +#define WM8985_HALFOPBIAS_WIDTH 1 /* HALFOPBIAS */ + +enum clk_src { + WM8985_CLKSRC_MCLK, + WM8985_CLKSRC_PLL +}; + +#define WM8985_PLL 0 + +#endif diff --git a/sound/soc/codecs/wm8988.c b/sound/soc/codecs/wm8988.c index d070a58e4f8e..d08b1fe6c42c 100644 --- a/sound/soc/codecs/wm8988.c +++ b/sound/soc/codecs/wm8988.c @@ -809,7 +809,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8988 = { .suspend = wm8988_suspend, .resume = wm8988_resume, .set_bias_level = wm8988_set_bias_level, - .reg_cache_size = sizeof(wm8988_reg), + .reg_cache_size = ARRAY_SIZE(wm8988_reg), .reg_word_size = sizeof(u16), .reg_cache_default = wm8988_reg, }; diff --git a/sound/soc/codecs/wm8990.c b/sound/soc/codecs/wm8990.c index 0ffecbd1e33b..264828e4e67c 100644 --- a/sound/soc/codecs/wm8990.c +++ b/sound/soc/codecs/wm8990.c @@ -1354,7 +1354,6 @@ static int wm8990_probe(struct snd_soc_codec *codec) wm8990_reset(codec); /* charge output caps */ - codec->bias_level = SND_SOC_BIAS_OFF; wm8990_set_bias_level(codec, SND_SOC_BIAS_STANDBY); reg = snd_soc_read(codec, WM8990_AUDIO_INTERFACE_4); diff --git a/sound/soc/codecs/wm8993.c b/sound/soc/codecs/wm8993.c index a3fd6b935804..589e3fa24734 100644 --- a/sound/soc/codecs/wm8993.c +++ b/sound/soc/codecs/wm8993.c @@ -1586,7 +1586,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8993 = { .suspend = wm8993_suspend, .resume = wm8993_resume, .set_bias_level = wm8993_set_bias_level, - .reg_cache_size = sizeof(wm8993_reg_defaults), + .reg_cache_size = ARRAY_SIZE(wm8993_reg_defaults), .reg_word_size = sizeof(u16), .reg_cache_default = wm8993_reg_defaults, .volatile_register = wm8993_volatile, diff --git a/sound/soc/codecs/wm9081.c b/sound/soc/codecs/wm9081.c index 00249d5b6793..ecc7c37180c7 100644 --- a/sound/soc/codecs/wm9081.c +++ b/sound/soc/codecs/wm9081.c @@ -1317,7 +1317,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm9081 = { .suspend = wm9081_suspend, .resume = wm9081_resume, .set_bias_level = wm9081_set_bias_level, - .reg_cache_size = sizeof(wm9081_reg_defaults), + .reg_cache_size = ARRAY_SIZE(wm9081_reg_defaults), .reg_word_size = sizeof(u16), .reg_cache_default = wm9081_reg_defaults, .volatile_register = wm9081_volatile_register, diff --git a/sound/soc/codecs/wm9705.c b/sound/soc/codecs/wm9705.c index e4d8f5339c51..a144acda751c 100644 --- a/sound/soc/codecs/wm9705.c +++ b/sound/soc/codecs/wm9705.c @@ -385,7 +385,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm9705 = { .resume = wm9705_soc_resume, .read = ac97_read, .write = ac97_write, - .reg_cache_size = sizeof(wm9705_reg), + .reg_cache_size = ARRAY_SIZE(wm9705_reg), .reg_word_size = sizeof(u16), .reg_cache_step = 2, .reg_cache_default = wm9705_reg, diff --git a/sound/soc/codecs/wm9712.c b/sound/soc/codecs/wm9712.c index cebeb93c10c7..d2f224d62744 100644 --- a/sound/soc/codecs/wm9712.c +++ b/sound/soc/codecs/wm9712.c @@ -674,7 +674,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm9712 = { .read = ac97_read, .write = ac97_write, .set_bias_level = wm9712_set_bias_level, - .reg_cache_size = sizeof(wm9712_reg), + .reg_cache_size = ARRAY_SIZE(wm9712_reg), .reg_word_size = sizeof(u16), .reg_cache_step = 2, .reg_cache_default = wm9712_reg, diff --git a/sound/soc/codecs/wm9713.c b/sound/soc/codecs/wm9713.c index 463917e762b5..7da13b07a53d 100644 --- a/sound/soc/codecs/wm9713.c +++ b/sound/soc/codecs/wm9713.c @@ -1257,7 +1257,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm9713 = { .read = ac97_read, .write = ac97_write, .set_bias_level = wm9713_set_bias_level, - .reg_cache_size = sizeof(wm9713_reg), + .reg_cache_size = ARRAY_SIZE(wm9713_reg), .reg_word_size = sizeof(u16), .reg_cache_step = 2, .reg_cache_default = wm9713_reg, diff --git a/sound/soc/kirkwood/kirkwood-dma.c b/sound/soc/kirkwood/kirkwood-dma.c index 0a7a5fcb6d8c..0fd6a630db01 100644 --- a/sound/soc/kirkwood/kirkwood-dma.c +++ b/sound/soc/kirkwood/kirkwood-dma.c @@ -2,6 +2,7 @@ * kirkwood-dma.c * * (c) 2010 Arnaud Patard <apatard@mandriva.com> + * (c) 2010 Arnaud Patard <arnaud.patard@rtp-net.org> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -397,7 +398,7 @@ static void __exit kirkwood_pcm_exit(void) } module_exit(kirkwood_pcm_exit); -MODULE_AUTHOR("Arnaud Patard <apatard@mandriva.com>"); +MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>"); MODULE_DESCRIPTION("Marvell Kirkwood Audio DMA module"); MODULE_LICENSE("GPL"); MODULE_ALIAS("platform:kirkwood-pcm-audio"); diff --git a/sound/soc/kirkwood/kirkwood-i2s.c b/sound/soc/kirkwood/kirkwood-i2s.c index 9b62cba4f590..a33fc51f363b 100644 --- a/sound/soc/kirkwood/kirkwood-i2s.c +++ b/sound/soc/kirkwood/kirkwood-i2s.c @@ -2,6 +2,7 @@ * kirkwood-i2s.c * * (c) 2010 Arnaud Patard <apatard@mandriva.com> + * (c) 2010 Arnaud Patard <arnaud.patard@rtp-net.org> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -495,7 +496,7 @@ static void __exit kirkwood_i2s_exit(void) module_exit(kirkwood_i2s_exit); /* Module information */ -MODULE_AUTHOR("Arnaud Patard, <apatard@mandriva.com>"); +MODULE_AUTHOR("Arnaud Patard, <arnaud.patard@rtp-net.org>"); MODULE_DESCRIPTION("Kirkwood I2S SoC Interface"); MODULE_LICENSE("GPL"); MODULE_ALIAS("platform:kirkwood-i2s"); diff --git a/sound/soc/kirkwood/kirkwood-openrd.c b/sound/soc/kirkwood/kirkwood-openrd.c index 2cf76dfd0355..9d7c81e921f1 100644 --- a/sound/soc/kirkwood/kirkwood-openrd.c +++ b/sound/soc/kirkwood/kirkwood-openrd.c @@ -2,6 +2,7 @@ * kirkwood-openrd.c * * (c) 2010 Arnaud Patard <apatard@mandriva.com> + * (c) 2010 Arnaud Patard <arnaud.patard@rtp-net.org> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -113,7 +114,7 @@ module_init(openrd_client_init); module_exit(openrd_client_exit); /* Module information */ -MODULE_AUTHOR("Arnaud Patard <apatard@mandriva.com>"); +MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>"); MODULE_DESCRIPTION("ALSA SoC OpenRD Client"); MODULE_LICENSE("GPL"); MODULE_ALIAS("platform:soc-audio"); diff --git a/sound/soc/s3c24xx/s3c-pcm.c b/sound/soc/s3c24xx/s3c-pcm.c index 6174e26e433e..2e020e1b4eab 100644 --- a/sound/soc/s3c24xx/s3c-pcm.c +++ b/sound/soc/s3c24xx/s3c-pcm.c @@ -78,7 +78,7 @@ static void s3c_pcm_snd_txctrl(struct s3c_pcm_info *pcm, int on) ctl |= S3C_PCM_CTL_TXDMA_EN; ctl |= S3C_PCM_CTL_TXFIFO_EN; ctl |= S3C_PCM_CTL_ENABLE; - ctl |= (0x20<<S3C_PCM_CTL_TXDIPSTICK_SHIFT); + ctl |= (0x4<<S3C_PCM_CTL_TXDIPSTICK_SHIFT); clkctl |= S3C_PCM_CLKCTL_SERCLK_EN; } else { ctl &= ~S3C_PCM_CTL_TXDMA_EN; @@ -102,11 +102,14 @@ static void s3c_pcm_snd_rxctrl(struct s3c_pcm_info *pcm, int on) ctl = readl(regs + S3C_PCM_CTL); clkctl = readl(regs + S3C_PCM_CLKCTL); + ctl &= ~(S3C_PCM_CTL_RXDIPSTICK_MASK + << S3C_PCM_CTL_RXDIPSTICK_SHIFT); if (on) { ctl |= S3C_PCM_CTL_RXDMA_EN; ctl |= S3C_PCM_CTL_RXFIFO_EN; ctl |= S3C_PCM_CTL_ENABLE; + ctl |= (0x20<<S3C_PCM_CTL_RXDIPSTICK_SHIFT); clkctl |= S3C_PCM_CLKCTL_SERCLK_EN; } else { ctl &= ~S3C_PCM_CTL_RXDMA_EN; @@ -361,8 +364,6 @@ static struct snd_soc_dai_ops s3c_pcm_dai_ops = { #define S3C_PCM_RATES SNDRV_PCM_RATE_8000_96000 #define S3C_PCM_DAI_DECLARE \ -{ \ - .name = "samsung-dai", \ .symmetric_rates = 1, \ .ops = &s3c_pcm_dai_ops, \ .playback = { \ @@ -376,12 +377,17 @@ static struct snd_soc_dai_ops s3c_pcm_dai_ops = { .channels_max = 2, \ .rates = S3C_PCM_RATES, \ .formats = SNDRV_PCM_FMTBIT_S16_LE, \ - }, \ -} + } struct snd_soc_dai_driver s3c_pcm_dai[] = { - S3C_PCM_DAI_DECLARE, - S3C_PCM_DAI_DECLARE, + [0] = { + .name = "samsung-pcm.0", + S3C_PCM_DAI_DECLARE, + }, + [1] = { + .name = "samsung-pcm.1", + S3C_PCM_DAI_DECLARE, + }, }; EXPORT_SYMBOL_GPL(s3c_pcm_dai); @@ -465,7 +471,7 @@ static __devinit int s3c_pcm_dev_probe(struct platform_device *pdev) } clk_enable(pcm->pclk); - ret = snd_soc_register_dai(&pdev->dev, s3c_pcm_dai); + ret = snd_soc_register_dai(&pdev->dev, &s3c_pcm_dai[pdev->id]); if (ret != 0) { dev_err(&pdev->dev, "failed to get pcm_clock\n"); goto err5; @@ -522,7 +528,7 @@ static struct platform_driver s3c_pcm_driver = { .probe = s3c_pcm_dev_probe, .remove = s3c_pcm_dev_remove, .driver = { - .name = "samsung-pcm-audio", + .name = "samsung-pcm", .owner = THIS_MODULE, }, }; @@ -543,4 +549,4 @@ module_exit(s3c_pcm_exit); MODULE_AUTHOR("Jaswinder Singh, <jassi.brar@samsung.com>"); MODULE_DESCRIPTION("S3C PCM Controller Driver"); MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:samsung-pcm-audio"); +MODULE_ALIAS("platform:samsung-pcm"); diff --git a/sound/soc/s3c24xx/s3c-pcm.h b/sound/soc/s3c24xx/s3c-pcm.h index 69ff9971692f..f60baa19387d 100644 --- a/sound/soc/s3c24xx/s3c-pcm.h +++ b/sound/soc/s3c24xx/s3c-pcm.h @@ -22,7 +22,8 @@ /* PCM_CTL Bit-Fields */ #define S3C_PCM_CTL_TXDIPSTICK_MASK (0x3f) #define S3C_PCM_CTL_TXDIPSTICK_SHIFT (13) -#define S3C_PCM_CTL_RXDIPSTICK_MSK (0x3f<<7) +#define S3C_PCM_CTL_RXDIPSTICK_MASK (0x3f) +#define S3C_PCM_CTL_RXDIPSTICK_SHIFT (7) #define S3C_PCM_CTL_TXDMA_EN (0x1<<6) #define S3C_PCM_CTL_RXDMA_EN (0x1<<5) #define S3C_PCM_CTL_TXMSB_AFTER_FSYNC (0x1<<4) diff --git a/sound/soc/s3c24xx/smdk2443_wm9710.c b/sound/soc/s3c24xx/smdk2443_wm9710.c index 66f9e222220b..4613288c2772 100644 --- a/sound/soc/s3c24xx/smdk2443_wm9710.c +++ b/sound/soc/s3c24xx/smdk2443_wm9710.c @@ -28,7 +28,7 @@ static struct snd_soc_dai_link smdk2443_dai[] = { { .name = "AC97", .stream_name = "AC97 HiFi", - .cpu_dai_name = "s3c-ac97-dai", + .cpu_dai_name = "s3c-ac97", .codec_dai_name = "ac97-hifi", .codec_name = "ac97-codec", .platform_name = "s3c24xx-pcm-audio", diff --git a/sound/soc/s3c24xx/smdk64xx_wm8580.c b/sound/soc/s3c24xx/smdk64xx_wm8580.c index 91367f7bfec3..052e499b68d1 100644 --- a/sound/soc/s3c24xx/smdk64xx_wm8580.c +++ b/sound/soc/s3c24xx/smdk64xx_wm8580.c @@ -242,7 +242,7 @@ static struct snd_soc_dai_link smdk64xx_dai[] = { }; static struct snd_soc_card smdk64xx = { - .name = "smdk64xx", + .name = "SMDK64xx 5.1", .dai_link = smdk64xx_dai, .num_links = ARRAY_SIZE(smdk64xx_dai), }; diff --git a/sound/soc/s3c24xx/smdk_wm9713.c b/sound/soc/s3c24xx/smdk_wm9713.c index 90108a7a0a8e..11086f8c046d 100644 --- a/sound/soc/s3c24xx/smdk_wm9713.c +++ b/sound/soc/s3c24xx/smdk_wm9713.c @@ -47,7 +47,7 @@ static struct snd_soc_dai_link smdk_dai = { .name = "AC97", .stream_name = "AC97 PCM", .platform_name = "s3c24xx-pcm-audio", - .cpu_dai_name = "s3c-ac97-dai", + .cpu_dai_name = "s3c-ac97", .codec_dai_name = "wm9713-hifi", .codec_name = "wm9713-codec", }; diff --git a/sound/soc/sh/Kconfig b/sound/soc/sh/Kconfig index 6b224d21e51b..7f0a496e07ce 100644 --- a/sound/soc/sh/Kconfig +++ b/sound/soc/sh/Kconfig @@ -47,7 +47,7 @@ config SND_SH7760_AC97 AC97 unit of the SH7760. config SND_FSI_AK4642 - bool "FSI-AK4642 sound support" + tristate "FSI-AK4642 sound support" depends on SND_SOC_SH4_FSI && I2C_SH_MOBILE select SND_SOC_AK4642 help @@ -55,7 +55,7 @@ config SND_FSI_AK4642 FSI - AK4642 unit config SND_FSI_DA7210 - bool "FSI-DA7210 sound support" + tristate "FSI-DA7210 sound support" depends on SND_SOC_SH4_FSI && I2C_SH_MOBILE select SND_SOC_DA7210 help @@ -63,7 +63,7 @@ config SND_FSI_DA7210 FSI - DA7210 unit config SND_FSI_HDMI - bool "FSI-HDMI sound support" + tristate "FSI-HDMI sound support" depends on SND_SOC_SH4_FSI && FB_SH_MOBILE_HDMI help This option enables generic sound support for the diff --git a/sound/soc/sh/fsi-ak4642.c b/sound/soc/sh/fsi-ak4642.c index 53836ca11d3b..d96602de71de 100644 --- a/sound/soc/sh/fsi-ak4642.c +++ b/sound/soc/sh/fsi-ak4642.c @@ -32,7 +32,7 @@ static struct snd_soc_dai_link fsi_dai_link = { .cpu_dai_name = "fsia-dai", /* fsi A */ .codec_dai_name = "ak4642-hifi", #ifdef CONFIG_MACH_AP4EVB - .platform_name = "sh_fsi2.0", + .platform_name = "sh_fsi2", .codec_name = "ak4642-codec.0-0013", #else .platform_name = "sh_fsi.0", @@ -43,7 +43,7 @@ static struct snd_soc_dai_link fsi_dai_link = { }; static struct snd_soc_card fsi_soc_card = { - .name = "FSI", + .name = "FSI (AK4642)", .dai_link = &fsi_dai_link, .num_links = 1, }; diff --git a/sound/soc/sh/fsi-da7210.c b/sound/soc/sh/fsi-da7210.c index b5270156c817..a6adb6e43250 100644 --- a/sound/soc/sh/fsi-da7210.c +++ b/sound/soc/sh/fsi-da7210.c @@ -33,7 +33,7 @@ static struct snd_soc_dai_link fsi_da7210_dai = { }; static struct snd_soc_card fsi_soc_card = { - .name = "FSI", + .name = "FSI (DA7210)", .dai_link = &fsi_da7210_dai, .num_links = 1, }; diff --git a/sound/soc/sh/fsi-hdmi.c b/sound/soc/sh/fsi-hdmi.c index 950e3e0c971d..a52dd8ec71d3 100644 --- a/sound/soc/sh/fsi-hdmi.c +++ b/sound/soc/sh/fsi-hdmi.c @@ -11,7 +11,6 @@ #include <linux/platform_device.h> #include <sound/sh_fsi.h> -#include <video/sh_mobile_hdmi.h> static struct snd_soc_dai_link fsi_dai_link = { .name = "HDMI", @@ -23,7 +22,7 @@ static struct snd_soc_dai_link fsi_dai_link = { }; static struct snd_soc_card fsi_soc_card = { - .name = "FSI", + .name = "FSI (SH MOBILE HDMI)", .dai_link = &fsi_dai_link, .num_links = 1, }; diff --git a/sound/soc/sh/fsi.c b/sound/soc/sh/fsi.c index abc6d8309609..363b37a603cb 100644 --- a/sound/soc/sh/fsi.c +++ b/sound/soc/sh/fsi.c @@ -101,13 +101,10 @@ #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE) -/************************************************************************ - - - struct - +/* + * struct + */ -************************************************************************/ struct fsi_priv { void __iomem *base; struct snd_pcm_substream *substream; @@ -142,13 +139,10 @@ struct fsi_master { spinlock_t lock; }; -/************************************************************************ - - - basic read write function - +/* + * basic read write function + */ -************************************************************************/ static void __fsi_reg_write(u32 reg, u32 data) { /* valid data area is 24bit */ @@ -251,13 +245,10 @@ static void fsi_master_mask_set(struct fsi_master *master, spin_unlock_irqrestore(&master->lock, flags); } -/************************************************************************ - - - basic function - +/* + * basic function + */ -************************************************************************/ static struct fsi_master *fsi_get_master(struct fsi_priv *fsi) { return fsi->master; @@ -357,13 +348,63 @@ static int fsi_get_fifo_residue(struct fsi_priv *fsi, int is_play) return residue; } -/************************************************************************ +/* + * dma function + */ + +static u8 *fsi_dma_get_area(struct fsi_priv *fsi) +{ + return fsi->substream->runtime->dma_area + fsi->byte_offset; +} + +static void fsi_dma_soft_push16(struct fsi_priv *fsi, int size) +{ + u16 *start; + int i; + + start = (u16 *)fsi_dma_get_area(fsi); + + for (i = 0; i < size; i++) + fsi_reg_write(fsi, DODT, ((u32)*(start + i) << 8)); +} + +static void fsi_dma_soft_pop16(struct fsi_priv *fsi, int size) +{ + u16 *start; + int i; + + start = (u16 *)fsi_dma_get_area(fsi); + + for (i = 0; i < size; i++) + *(start + i) = (u16)(fsi_reg_read(fsi, DIDT) >> 8); +} + +static void fsi_dma_soft_push32(struct fsi_priv *fsi, int size) +{ + u32 *start; + int i; + + start = (u32 *)fsi_dma_get_area(fsi); + + for (i = 0; i < size; i++) + fsi_reg_write(fsi, DODT, *(start + i)); +} + +static void fsi_dma_soft_pop32(struct fsi_priv *fsi, int size) +{ + u32 *start; + int i; + start = (u32 *)fsi_dma_get_area(fsi); - irq function + for (i = 0; i < size; i++) + *(start + i) = fsi_reg_read(fsi, DIDT); +} +/* + * irq function + */ -************************************************************************/ static void fsi_irq_enable(struct fsi_priv *fsi, int is_play) { u32 data = fsi_port_ab_io_bit(fsi, is_play); @@ -404,13 +445,11 @@ static void fsi_irq_clear_status(struct fsi_priv *fsi) fsi_master_mask_set(master, master->core->int_st, data, 0); } -/************************************************************************ - - - SPDIF master clock function - -These functions are used later FSI2 -************************************************************************/ +/* + * SPDIF master clock function + * + * These functions are used later FSI2 + */ static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable) { struct fsi_master *master = fsi_get_master(fsi); @@ -427,13 +466,10 @@ static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable) fsi_master_mask_set(master, fsi->mst_ctrl, val, 0); } -/************************************************************************ - - - ctrl function - +/* + * ctrl function + */ -************************************************************************/ static void fsi_clk_ctrl(struct fsi_priv *fsi, int enable) { u32 val = fsi_is_port_a(fsi) ? (1 << 0) : (1 << 4); @@ -512,8 +548,7 @@ static int fsi_data_push(struct fsi_priv *fsi, int startup) int send; int fifo_free; int width; - u8 *start; - int i, over_period; + int over_period; if (!fsi || !fsi->substream || @@ -550,18 +585,12 @@ static int fsi_data_push(struct fsi_priv *fsi, int startup) if (fifo_free < send) send = fifo_free; - start = runtime->dma_area; - start += fsi->byte_offset; - switch (width) { case 2: - for (i = 0; i < send; i++) - fsi_reg_write(fsi, DODT, - ((u32)*((u16 *)start + i) << 8)); + fsi_dma_soft_push16(fsi, send); break; case 4: - for (i = 0; i < send; i++) - fsi_reg_write(fsi, DODT, *((u32 *)start + i)); + fsi_dma_soft_push32(fsi, send); break; default: return -EINVAL; @@ -596,8 +625,7 @@ static int fsi_data_pop(struct fsi_priv *fsi, int startup) int free; int fifo_fill; int width; - u8 *start; - int i, over_period; + int over_period; if (!fsi || !fsi->substream || @@ -633,18 +661,12 @@ static int fsi_data_pop(struct fsi_priv *fsi, int startup) if (free < fifo_fill) fifo_fill = free; - start = runtime->dma_area; - start += fsi->byte_offset; - switch (width) { case 2: - for (i = 0; i < fifo_fill; i++) - *((u16 *)start + i) = - (u16)(fsi_reg_read(fsi, DIDT) >> 8); + fsi_dma_soft_pop16(fsi, fifo_fill); break; case 4: - for (i = 0; i < fifo_fill; i++) - *((u32 *)start + i) = fsi_reg_read(fsi, DIDT); + fsi_dma_soft_pop32(fsi, fifo_fill); break; default: return -EINVAL; @@ -694,13 +716,10 @@ static irqreturn_t fsi_interrupt(int irq, void *data) return IRQ_HANDLED; } -/************************************************************************ - - - dai ops - +/* + * dai ops + */ -************************************************************************/ static int fsi_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { @@ -919,13 +938,10 @@ static struct snd_soc_dai_ops fsi_dai_ops = { .hw_params = fsi_dai_hw_params, }; -/************************************************************************ - - - pcm ops - +/* + * pcm ops + */ -************************************************************************/ static struct snd_pcm_hardware fsi_pcm_hardware = { .info = SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_MMAP | @@ -991,13 +1007,10 @@ static struct snd_pcm_ops fsi_pcm_ops = { .pointer = fsi_pointer, }; -/************************************************************************ - - - snd_soc_platform - +/* + * snd_soc_platform + */ -************************************************************************/ #define PREALLOC_BUFFER (32 * 1024) #define PREALLOC_BUFFER_MAX (32 * 1024) @@ -1021,13 +1034,10 @@ static int fsi_pcm_new(struct snd_card *card, PREALLOC_BUFFER, PREALLOC_BUFFER_MAX); } -/************************************************************************ - - - alsa struct - +/* + * alsa struct + */ -************************************************************************/ static struct snd_soc_dai_driver fsi_soc_dai[] = { { .name = "fsia-dai", @@ -1069,13 +1079,10 @@ static struct snd_soc_platform_driver fsi_soc_platform = { .pcm_free = fsi_pcm_free, }; -/************************************************************************ - - - platform function - +/* + * platform function + */ -************************************************************************/ static int fsi_probe(struct platform_device *pdev) { struct fsi_master *master; @@ -1219,6 +1226,7 @@ static struct platform_device_id fsi_id_table[] = { { "sh_fsi", (kernel_ulong_t)&fsi1_core }, { "sh_fsi2", (kernel_ulong_t)&fsi2_core }, }; +MODULE_DEVICE_TABLE(platform, fsi_id_table); static struct platform_driver fsi_driver = { .driver = { @@ -1239,6 +1247,7 @@ static void __exit fsi_mobile_exit(void) { platform_driver_unregister(&fsi_driver); } + module_init(fsi_mobile_init); module_exit(fsi_mobile_exit); diff --git a/sound/soc/sh/migor.c b/sound/soc/sh/migor.c index 866d78fb8398..f4620176a3ff 100644 --- a/sound/soc/sh/migor.c +++ b/sound/soc/sh/migor.c @@ -12,6 +12,7 @@ #include <linux/firmware.h> #include <linux/module.h> +#include <asm/clkdev.h> #include <asm/clock.h> #include <cpu/sh7722.h> @@ -40,12 +41,12 @@ static struct clk_ops siumckb_clk_ops = { }; static struct clk siumckb_clk = { - .name = "siumckb_clk", - .id = -1, .ops = &siumckb_clk_ops, .rate = 0, /* initialised at run-time */ }; +static struct clk_lookup *siumckb_lookup; + static int migor_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { @@ -177,6 +178,13 @@ static int __init migor_init(void) if (ret < 0) return ret; + siumckb_lookup = clkdev_alloc(&siumckb_clk, "siumckb_clk", NULL); + if (!siumckb_lookup) { + ret = -ENOMEM; + goto eclkdevalloc; + } + clkdev_add(siumckb_lookup); + /* Port number used on this machine: port B */ migor_snd_device = platform_device_alloc("soc-audio", 1); if (!migor_snd_device) { @@ -195,12 +203,15 @@ static int __init migor_init(void) epdevadd: platform_device_put(migor_snd_device); epdevalloc: + clkdev_drop(siumckb_lookup); +eclkdevalloc: clk_unregister(&siumckb_clk); return ret; } static void __exit migor_exit(void) { + clkdev_drop(siumckb_lookup); clk_unregister(&siumckb_clk); platform_device_unregister(migor_snd_device); } diff --git a/sound/soc/sh/siu.h b/sound/soc/sh/siu.h index aa239ff7310d..9f4dcb921ff0 100644 --- a/sound/soc/sh/siu.h +++ b/sound/soc/sh/siu.h @@ -98,7 +98,9 @@ enum { SIU_CLKB_EXT }; +struct device; struct siu_info { + struct device *dev; int port_id; u32 __iomem *pram; u32 __iomem *xram; @@ -182,7 +184,6 @@ static inline u32 siu_read32(u32 __iomem *addr) #define SIU_BRRB (0x10c / sizeof(u32)) extern struct snd_soc_platform_driver siu_platform; -extern struct snd_soc_dai_driver siu_i2s_dai; extern struct siu_info *siu_i2s_data; int siu_init_port(int port, struct siu_port **port_info, struct snd_card *card); diff --git a/sound/soc/sh/siu_dai.c b/sound/soc/sh/siu_dai.c index 827940a8e248..af53b64d8af2 100644 --- a/sound/soc/sh/siu_dai.c +++ b/sound/soc/sh/siu_dai.c @@ -71,8 +71,7 @@ struct port_flag { struct format_flag capture; }; -struct siu_info *siu_i2s_data = NULL; -EXPORT_SYMBOL_GPL(siu_i2s_data); +struct siu_info *siu_i2s_data; static struct port_flag siu_flags[SIU_PORT_NUM] = { [SIU_PORT_A] = { @@ -113,7 +112,7 @@ static void siu_dai_start(struct siu_port *port_info) dev_dbg(port_info->pcm->card->dev, "%s\n", __func__); /* Turn on SIU clock */ - pm_runtime_get_sync(port_info->pcm->card->dev); + pm_runtime_get_sync(info->dev); /* Issue software reset to siu */ siu_write32(base + SIU_SRCTL, 0); @@ -160,7 +159,7 @@ static void siu_dai_stop(struct siu_port *port_info) siu_write32(base + SIU_SRCTL, 0); /* Turn off SIU clock */ - pm_runtime_put_sync(port_info->pcm->card->dev); + pm_runtime_put_sync(info->dev); } static void siu_dai_spbAselect(struct siu_port *port_info) @@ -675,20 +674,36 @@ static int siu_dai_set_sysclk(struct snd_soc_dai *dai, int clk_id, } siu_clk = clk_get(dai->dev, siu_name); - if (IS_ERR(siu_clk)) + if (IS_ERR(siu_clk)) { + dev_err(dai->dev, "%s: cannot get a SIU clock: %ld\n", __func__, + PTR_ERR(siu_clk)); return PTR_ERR(siu_clk); + } parent_clk = clk_get(dai->dev, parent_name); - if (!IS_ERR(parent_clk)) { - ret = clk_set_parent(siu_clk, parent_clk); - if (!ret) - clk_set_rate(siu_clk, freq); - clk_put(parent_clk); + if (IS_ERR(parent_clk)) { + ret = PTR_ERR(parent_clk); + dev_err(dai->dev, "cannot get a SIU clock parent: %d\n", ret); + goto epclkget; + } + + ret = clk_set_parent(siu_clk, parent_clk); + if (ret < 0) { + dev_err(dai->dev, "cannot reparent the SIU clock: %d\n", ret); + goto eclksetp; } + ret = clk_set_rate(siu_clk, freq); + if (ret < 0) + dev_err(dai->dev, "cannot set SIU clock rate: %d\n", ret); + + /* TODO: when clkdev gets reference counting we'll move these to siu_dai_shutdown() */ +eclksetp: + clk_put(parent_clk); +epclkget: clk_put(siu_clk); - return 0; + return ret; } static struct snd_soc_dai_ops siu_dai_ops = { @@ -700,7 +715,7 @@ static struct snd_soc_dai_ops siu_dai_ops = { }; static struct snd_soc_dai_driver siu_i2s_dai = { - .name = "sui-i2s-dai", + .name = "siu-i2s-dai", .playback = { .channels_min = 2, .channels_max = 2, @@ -727,6 +742,7 @@ static int __devinit siu_probe(struct platform_device *pdev) if (!info) return -ENOMEM; siu_i2s_data = info; + info->dev = &pdev->dev; ret = request_firmware(&fw_entry, "siu_spb.bin", &pdev->dev); if (ret) @@ -828,6 +844,7 @@ static int __devexit siu_remove(struct platform_device *pdev) static struct platform_driver siu_driver = { .driver = { + .owner = THIS_MODULE, .name = "siu-pcm-audio", }, .probe = siu_probe, diff --git a/sound/soc/sh/siu_pcm.c b/sound/soc/sh/siu_pcm.c index 440476993325..d6c79fa56d12 100644 --- a/sound/soc/sh/siu_pcm.c +++ b/sound/soc/sh/siu_pcm.c @@ -341,7 +341,7 @@ static int siu_pcm_open(struct snd_pcm_substream *ss) { /* Playback / Capture */ struct snd_soc_pcm_runtime *rtd = ss->private_data; - struct siu_platform *pdata = snd_soc_platform_get_drvdata(rtd->platform); + struct siu_platform *pdata = rtd->platform->dev->platform_data; struct siu_info *info = siu_i2s_data; struct siu_port *port_info = siu_port_info(ss); struct siu_stream *siu_stream; diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index 42542e0da2a3..6001b7f0a138 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -270,6 +270,87 @@ static void soc_cleanup_codec_debugfs(struct snd_soc_codec *codec) debugfs_remove_recursive(codec->debugfs_codec_root); } +static ssize_t codec_list_read_file(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos) +{ + char *buf = kmalloc(PAGE_SIZE, GFP_KERNEL); + ssize_t ret = 0; + struct snd_soc_codec *codec; + + if (!buf) + return -ENOMEM; + + list_for_each_entry(codec, &codec_list, list) + ret += snprintf(buf + ret, PAGE_SIZE - ret, "%s\n", + codec->name); + + if (ret >= 0) + ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret); + + kfree(buf); + + return ret; +} + +static const struct file_operations codec_list_fops = { + .read = codec_list_read_file, + .llseek = default_llseek,/* read accesses f_pos */ +}; + +static ssize_t dai_list_read_file(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos) +{ + char *buf = kmalloc(PAGE_SIZE, GFP_KERNEL); + ssize_t ret = 0; + struct snd_soc_dai *dai; + + if (!buf) + return -ENOMEM; + + list_for_each_entry(dai, &dai_list, list) + ret += snprintf(buf + ret, PAGE_SIZE - ret, "%s\n", dai->name); + + if (ret >= 0) + ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret); + + kfree(buf); + + return ret; +} + +static const struct file_operations dai_list_fops = { + .read = dai_list_read_file, + .llseek = default_llseek,/* read accesses f_pos */ +}; + +static ssize_t platform_list_read_file(struct file *file, + char __user *user_buf, + size_t count, loff_t *ppos) +{ + char *buf = kmalloc(PAGE_SIZE, GFP_KERNEL); + ssize_t ret = 0; + struct snd_soc_platform *platform; + + if (!buf) + return -ENOMEM; + + list_for_each_entry(platform, &platform_list, list) + ret += snprintf(buf + ret, PAGE_SIZE - ret, "%s\n", + platform->name); + + if (ret >= 0) + ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret); + + kfree(buf); + + return ret; +} + +static const struct file_operations platform_list_fops = { + .read = platform_list_read_file, + .llseek = default_llseek,/* read accesses f_pos */ +}; + #else static inline void soc_init_codec_debugfs(struct snd_soc_codec *codec) @@ -3191,6 +3272,18 @@ static int __init snd_soc_init(void) "ASoC: Failed to create debugfs directory\n"); debugfs_root = NULL; } + + if (!debugfs_create_file("codecs", 0444, debugfs_root, NULL, + &codec_list_fops)) + pr_warn("ASoC: Failed to create CODEC list debugfs file\n"); + + if (!debugfs_create_file("dais", 0444, debugfs_root, NULL, + &dai_list_fops)) + pr_warn("ASoC: Failed to create DAI list debugfs file\n"); + + if (!debugfs_create_file("platforms", 0444, debugfs_root, NULL, + &platform_list_fops)) + pr_warn("ASoC: Failed to create platform list debugfs file\n"); #endif return platform_driver_register(&soc_driver); |
