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authorVineet Gupta <Vineet.Gupta1@synopsys.com>2015-09-11 16:32:22 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2015-09-11 19:34:01 -0700
commit3ebb0540c20d6670396ccee9ff6794c095fa9311 (patch)
tree3d33498c7c1412dd2570fc770a45943cdef126ba
parentded0e250b58a27af6034a8ab9226cbcdf7c0d847 (diff)
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ARCv2: [axs103_smp] Reduce clk for SMP FPGA configs
Newer bitfiles needs the reduced clk even for SMP builds Cc: <stable@vger.kernel.org> #4.2 Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--arch/arc/plat-axs10x/axs10x.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c
index ad9825d4026a..0a77b19e1df8 100644
--- a/arch/arc/plat-axs10x/axs10x.c
+++ b/arch/arc/plat-axs10x/axs10x.c
@@ -402,6 +402,8 @@ static void __init axs103_early_init(void)
unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F;
if (num_cores > 2)
arc_set_core_freq(50 * 1000000);
+ else if (num_cores == 2)
+ arc_set_core_freq(75 * 1000000);
#endif
switch (arc_get_core_freq()/1000000) {
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