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author | Cédric Le Goater <clg@kaod.org> | 2019-04-17 15:39:39 +0200 |
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committer | Andrew Jeffery <andrew@aj.id.au> | 2019-04-18 11:11:15 +0930 |
commit | 0006809fb4170784c680d95226d8c8f9ae0379fc (patch) | |
tree | 6c85c2f910ceeaddbb918634808eebeeedc1e28e | |
parent | 85b9912a9d34e0d6809b6f97e1869ffea9c80d92 (diff) | |
download | blackbird-obmc-linux-0006809fb4170784c680d95226d8c8f9ae0379fc.tar.gz blackbird-obmc-linux-0006809fb4170784c680d95226d8c8f9ae0379fc.zip |
mtd: spi-nor: aspeed: clarify 4BYTE address mode mask
OpenBMC-Staging-Count: 1
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
-rw-r--r-- | drivers/mtd/spi-nor/aspeed-smc.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c index ee3059b27c07..1437732fdea1 100644 --- a/drivers/mtd/spi-nor/aspeed-smc.c +++ b/drivers/mtd/spi-nor/aspeed-smc.c @@ -884,7 +884,15 @@ static const uint32_t aspeed_smc_hclk_divs[] = { static u32 aspeed_smc_default_read(struct aspeed_smc_chip *chip) { - return (chip->ctl_val[smc_read] & 0x2000) | + /* + * Keep the 4Byte address mode on the AST2400 SPI controller. + * Other controllers set the 4Byte mode in the CE Control + * Register + */ + u32 ctl_mask = chip->controller->info == &spi_2400_info ? + CONTROL_IO_ADDRESS_4B : 0; + + return (chip->ctl_val[smc_read] & ctl_mask) | (0x00 << 28) | /* Single bit */ (0x00 << 24) | /* CE# max */ (0x03 << 16) | /* use normal reads */ |