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* Add NVDIMM key attributes and generate keysCorey Swenson2019-05-112-0/+75
* Revisit attributes with array types.Luis Fernandez2019-05-091-29/+61
* Targeting updates for EEPROM content typeMatthew Raybuck2019-05-093-21/+442
* Update simbuild for axone simics bringupGlenn Miles2019-05-071-9/+9
* Set i2c slave's port correctly in Axone XML for OCMB targetsChristian Geddes2019-05-071-34/+50
* Add call to p9a_omi_io_dccal in istep 12.6Christian Geddes2019-05-011-0/+64
* Support writable ATTR_FREQ_MCA_MHZ for AxoneDan Crowell2019-04-302-1/+28
* Add FAPI_POS and account for 4 possible PMIC targetsMatt Derksen2019-04-241-81/+133
* Revert "Add OCMB_CHIP_TYPE Attribute"Michael Baiocchi2019-04-192-36/+0
* Move MSS MRW attributes to generic XMLLouis Stermole2019-04-191-5/+0
* Add new PMIC target for AxoneMatt Derksen2019-04-183-3/+779
* Update OCMB 9-15 to have valid i2c and eeprom infoMatthew Raybuck2019-04-181-36/+148
* Validate OMI INBAND BAR offset attributes against calculated valuesChristian Geddes2019-04-181-1/+11
* Add OCMB_CHIP_TYPE AttributeMike Baiocchi2019-04-182-0/+36
* Test Cases for deconfig updates for AXONEMatthew Raybuck2019-04-122-0/+18
* SMF: Logic For Creating Non-Secure HOMER Memory SpaceIlya Smirnov2019-04-121-0/+6
* Update MAX_ALLOWED_DIMM_FREQ to support 3200 MHzChristian Geddes2019-04-101-0/+4
* Re-order i2c properties in Axone simics XML to align closer with simChristian Geddes2019-04-101-49/+49
* Force UCD Updates on each IPLMike Baiocchi2019-04-081-2/+4
* HB Improvements: Fix compiler warnings on modern compilersLuis Fernandez2019-04-051-2/+10
* Set ATTR_MSS_INTERLEAVE_ENABLE to be 0xAF to allow all grouping sizesChristian Geddes2019-04-031-1/+1
* Set REL_POS to 0 on all DIMM target in simics AxoneChristian Geddes2019-04-021-0/+64
* Create Attribute to force UCD UpdatesMike Baiocchi2019-03-302-0/+20
* Make pci cache injection attributes writeableDan Crowell2019-03-251-1/+12
* Set MUX i2c slave port to be 1Christian Geddes2019-03-221-1/+1
* OPAL/MPIPL: Processor Dump Area Table interfacesRaja Das2019-03-212-0/+74
* Set MAX_COMPUTE_NODES attribute so TOD code gets setup correctlyChristian Geddes2019-03-171-0/+4
* Allow single dimm configurations in AxoneChristian Geddes2019-03-171-1/+1
* Support UCD discoveryNick Bofferding2019-03-152-0/+32
* UCD attribute and targeting updatesMatt Raybuck2019-03-112-1/+113
* Always use original defaults for attribute fields with no valueDan Crowell2019-03-115-29/+34
* Updates to testcases for AxoneDan Crowell2019-03-071-2/+2
* Base HWP mirroring control on HB policyDean Sanner2019-03-061-0/+5
* Secure Boot: Log error when attribute override attempted in secure modeLuis Fernandez2019-03-062-0/+25
* Set early test case IPL step to be 14.7 in Axone simicsChristian Geddes2019-03-061-1/+1
* Delete complextype fields in attributes if they have no valueDan Crowell2019-03-061-0/+10
* Secureboot: Enhanced Multinode Comm: TPM_POISONEDIlya Smirnov2019-03-012-0/+26
* Method to execute testcases early in the bootDan Crowell2019-02-283-0/+24
* OpenPOWER support for native and compatibility mode for DD2.3Matt Derksen2019-02-282-1/+74
* fix VINI RT HW LX keyword for PhypSampa Misra2019-02-211-0/+1
* Add new path in EEPROM device op to allow reading from new EECACHEChristian Geddes2019-02-161-1/+3
* Set simics xml to match simics model for OCMB port numberingChristian Geddes2019-02-151-7/+7
* Add EEPROM caching device opChristian Geddes2019-02-131-34/+174
* Add call to p9a_ocmb_enable to istep 10.4Christian Geddes2019-02-111-0/+64
* Fix deconfigure parent rollup policyMatt Derksen2019-01-313-46/+798
* Set the I2C MUX bus selector in the i2cPresence functionRoland Veloz2019-01-301-8/+8
* Do not gard cores on the initial core wakeup failureDan Crowell2019-01-292-0/+22
* Set TPM model to be the x75 nuvoton for axone simicsChristian Geddes2019-01-241-0/+4
* Inform PHYP of NVDIMM protection by OCCMatt Derksen2019-01-242-0/+38
* Add Support for Nuvoton 75x Model of TPMsMike Baiocchi2019-01-172-0/+20
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