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path: root/src/usr/scom/plugins
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* Secure Boot: Implement Centaur SCOM cacheNick Bofferding2018-05-082-2/+141
| | | | | | | | | | | | | | | | | | | This change implements a Centaur SCOM cache for sensitive SCOM registers. The cache is initialized and enabled before the first Centaur SCOM, and disabled just prior to locking down the Centaur configuration. Once the Centaur has been locked down, the real register values are compared to the cache entries, and the Centaur is deconfigured (not garded) on any mismatch in assumptions. RTC: 187288 Change-Id: I7b13bfd7eb6b427aba115d6944958bf55e171008 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57532 Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Enforce PNOR section component IDsNick Bofferding2017-11-032-8/+24
| | | | | | | | | | | | | | | | | - In secure mode, bootloader will enforce that HBB component ID is set - In secure mode, Hostboot will enforce that PNOR component IDs are set Change-Id: I04f3bbc45417b3229003c56e1083e1fc31c01cd7 RTC: 179422 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48711 Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Fill in P9-specific scom error handlingDan Crowell2017-03-131-11/+24
| | | | | | | | | | | | | | | Adjusted address-specific register gathering to reflect P9 chip logic Fixed some error handling bugs in the testcases Added verbosity to error log parser Change-Id: Iad274e8333adb32deacffd3cb92e40f11c48f884 RTC: 158541 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37122 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Create User Details section so we can record PIB err if applicablecrgeddes2016-06-303-0/+173
The piberr mask used by fapi2 will check the pib err user details on the errl it get returned. RTC: 144507 Change-Id: I38f779692ac75676b37eaea129b2c423f3d69d30 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26143 Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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