summaryrefslogtreecommitdiffstats
path: root/src/usr/sbe
Commit message (Collapse)AuthorAgeFilesLines
...
* sbe_update: Poke the watchdog after each seeprom update actionWilliam A. Kennington III2017-07-201-0/+17
| | | | | | | | | | | | | | | | | | | | Normally the watchdog is only poked before each istep. During the SBE update istep the process of flashing the SBE can take too long for the default watchdog. Instead of only poking the watchdog at the end of the istep, also poke the watchdog after each flash action. Resolves #108 Signed-off-by: William A. Kennington III <wak@google.com> Change-Id: I71c2557a3b34da2a2597060cf3e3eb0d7c8f9820 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43120 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Block SBE updates during mpiplDzuy Nguyen2017-07-181-13/+46
| | | | | | | | | | | | | Change-Id: Ie59495404ec27d6be865063fc930e895340d9be2 RTC: 169683 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42853 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Log build level for SBE and HCODE customizationMarty Gloff2017-07-171-0/+30
| | | | | | | | | | | | | | | | | | Extract build information from the XIP header for the SBE and HCODE images. Trace the information. Also use it as FFDC for related error logs. Save the SBE build information in the SB keyword of MVPD. Change-Id: I600a71ae6cbf342643261da14f6b3b2e6bf3cbf1 RTC: 168827 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42951 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* xip_customize: GPTR/overlays stage 1 supportClaus Michael Olsen2017-07-141-0/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updated to poll Nimbus DD level and whether there's support for overlays in the XIP interface. Further, updated to add three extra args in xip_customize API, two of which are to support a third ring work buffer for the overlays handling. This has necessitated making changes to hcode_image_build (HIB) API as well. Note that the calling codes of xip_customize and HIB need to be updated to supply the additional args in their APIs. Note that this code stage 1 will work for Nimbus DD2 with Gptr rings in Mvpd, and no Gptr rings in the HW image. It will, however, not work if there's content in .overlays or if there's Gptr rings already in the .rings section. Thus, the stage 1 code here will work with a DD2 image (i.e., that does NOT have Gptr rings in .rings in HW image) as long as noone has put any real Gptr initfiles in for processing (which would result in ring content in .overlays). We must ensure that the stage 2 code of xip_customize gets merged on the HB side to enable processing of .overlays content before we actually add any Gptr initfiles for the .overlays section into EKB. Change-Id: I3d6ab8a9add239c92819613dcae21ef5faf0a1c5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40591 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40898 Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Tested-by: Dean Sanner <dsanner@us.ibm.com>
* Add in calls to p9_get_sbe_msg_register and handler functions (4/4)Elizabeth Liner2017-06-293-710/+2
| | | | | | | | | | | | | | | This commit adds in an additional hwp needed for the SBE conditions handling, p9_get_sbe_msg_register. This HWP pulls out the SBE register and determines if it got to runtime or not. From there there are handler functions that decide what to do next. Change-Id: I0e17b345bb983ed6373ec36ea2a6eb9b5e1bf3f1 RTC:173809 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41503 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Verify the correct HW Key Hash is used in Customized SBE ImageMike Baiocchi2017-06-112-124/+245
| | | | | | | | | | | | | | | | | | This commit keeps track of what HW Key Hash is added to HBBL before customizing the SBE Image and then checks that this HW Key Hash is found in the customized SBE Image. It did this by updating getHwKeyHashFromSbeImage() to possibly read the HW Key Hash from system memory along with its default behavior of reading it from a SBE Seeprom. Change-Id: I0139fb959102de74b12874f30e7d2ec0bf918e3f RTC:175330 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41453 Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Disable Ring Overrides in Secure ModeMike Baiocchi2017-06-081-1/+3
| | | | | | | | | | | | | | | This commit disables ring overrides during the IPL and at Runtime when the system has security enabled. Change-Id: Ic3b0db92994a61d4ba6e28858bcd6fde59be6a23 RTC: 163094 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40818 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add severity to saved data for SBE Update error logMarty Gloff2017-05-312-7/+12
| | | | | | | | | | | | | | | There are cases where SBE Update saves information about an error it has logged for a target. Adding the error log severity to this saved data. Change-Id: Icea6104d852735759a41ad06d9c5b9abbc4027a3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40974 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
* p9_dd_container: simple generic standalone DD level containerMartin Peschke2017-05-221-0/+1
| | | | | | | | | | | | | Change-Id: I4c9d8cb28d4ae6a8b21c87ebaad07c1fd7163b85 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39588 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40758 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Clean up of devdesc in hostboot codeIlya Smirnov2017-05-221-0/+8
| | | | | | | | | | | | Change-Id: I252b9bffe2ff66d700c82f090b2d3bb21c1e570f RTC:118001 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40558 Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
* Apply RINGOVD to SBE image prior to core dataDean Sanner2017-05-052-27/+30
| | | | | | | | | | | | | | | | -SBE is tight on space and if ALL core data is applied then ring override section doesn't fit. Since this is debug only, apply ring overrides to the base and let code winnow down the boot cores to fit constraints Change-Id: Ic0338e94b65d0481c51aac1dfa42f1c95abc9a4c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39496 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix for Add header and verify Hostboot Bootloader for sbe updateStephen M. Cprek2017-04-251-0/+14
| | | | | | | | | | | | | | Also enable the use of the FSP specific pnor layout. CMVC-prereq:1021911 Change-Id: If346c59537928d12af1dfbd085b2a492398cbf27 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39159 Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update the HW Key Hash in HBBL from PNOR for SBE Update OperationsMike Baiocchi2017-04-191-0/+52
| | | | | | | | | | | | | | | | | | | | This commit updates the HW Key Hash section of the HBBL partition pulled from PNOR before the SBE Update customization process. By default the HW Key Hash used to boot the system is used, but inside a Secureboot Key Transition (SBKT) IPL the new HW Key Hash will be used. Change-Id: I5ad235784cca53d746a46f5154c35f77540d24ba RTC: 167585 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38926 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Sign and securely load SBE partitionStephen Cprek2017-04-192-35/+51
| | | | | | | | | | | Change-Id: I92d1b9544168cfa8780d5be1a666fb3e748bf942 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38627 Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Revert "Add header to and verify Hostboot Bootloader for sbe update"Stephen M. Cprek2017-04-121-21/+0
| | | | | | | | | | This reverts commit a7bf050d4ddba121d7502939fc0c4ce517ef8e42. Change-Id: I95ddfe544cc537fcc847990dc9f85eec8f2912a1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39131 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Port SBKT signing and secure loadingStephen Cprek2017-04-102-0/+89
| | | | | | | | | | | Change-Id: I3817cbf8eb25bc83d538d9eb6ea4c5e801603f74 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38543 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add header to and verify Hostboot Bootloader for sbe updateStephen Cprek2017-04-101-0/+21
| | | | | | | | | | | | Change-Id: I2704ad9a110a52fe0ff0e290fdd9205a42bbd050 RTC:159915 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38326 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Read the HW Key Hash from a Processor's SBE SeepromMike Baiocchi2017-04-032-4/+307
| | | | | | | | | | | | | | | | This commit adds an interface to read the HW Key Hash located in the HBBL section of each Processor's two SBE Seeproms. Change-Id: I906434269746c296c646f7b0594575c58b145294 RTC: 167585 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38465 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix IPL: zzfp247 SBE update failMarty Gloff2017-03-221-18/+24
| | | | | | | | | | | | | | | Base SBE boot side for slave processor off SB keyword in MVPD rather than off boot side used by master processor. Change-Id: I3165d536f104c0d1f394de93a390bd0f722e4777 CQ: SW383676 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38152 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Read of SBE SEEPROM under second Processor Target failsMarty Gloff2017-03-091-9/+0
| | | | | | | | | | | | | | | | Remove the temporary check in the slave processor handling that skips SBE Update if Simics is running. Change-Id: I25d831bf71c5e13821e28b45905a2a607ad08596 RTC:168193 Depends-on: Ic0bde9a4ff573eb7e7eba180ded7324677457c90 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36035 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Elizabeth K. Liner <eliner@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add SecureROM version info and Change SBE update to use max HBBL sizeStephen Cprek2017-03-013-180/+17
| | | | | | | | | | | | | | | The HBBL also contains the securerom code and hw keys' hash for verification purposes. So looking for the end of the HBBL code leaves out those sections Change-Id: I73a1b5c50e3a5b3f642ca569b90e79dbe4c4ba1e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35979 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add missing includes for calls in sbeDan Crowell2017-02-281-0/+4
| | | | | | | | | | | | | | Hit a criss-cross of merges and config variable changes that exposed a little code bug Change-Id: Ibcd246b2fe89e54cbc0c41841cae47a51934f682 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37128 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove deprecated SBE side resolutionDan Crowell2017-02-275-1463/+122
| | | | | | | | | | | | | | | | The HB Bootloader now owns the responsibility of selecting the appropriate side of PNOR to use when loading the HBB image. There is no longer a HBB pointer in the SBE image itself. This commit removes the code that dealt with that support. There is also some cleaning up of a few other related functions. Change-Id: I35bfccb3590f81867d8222333cb4be66718828fa Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36358 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Reduce memory fragmentation during SBE updatesDean Sanner2017-02-272-8/+14
| | | | | | | | | | | | | | | | | | | - Original code was repeatedly allocating/freeing 256K chunks of heap memory - Other tasks in the background fragmented the allocations and could lead to out of memory conditions on large core number parts - Fix is to allocation one large chunk up front and use that for all operations Change-Id: Ie6df7eb9ebce526d87480425e842f8d1be8d78d4 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36920 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Only update SBEs on chips connected to powerbusDean Sanner2017-02-211-0/+18
| | | | | | | | | | | | | | | - Fixes issue in istep 7 where HB was attempting to update the slave chip's SBE, as SBE update expects SBE PSU interface to be active Change-Id: Id90f1b0f23c668a153a7e2725e762c761ee3c490 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36792 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* sbe: flush PNOR sections after customization to free up memoryRobert Lippert2017-02-161-0/+2
| | | | | | | | | | | | | | | | | | After customizing the PNOR data is no longer needed but remains resident in memory. This change forces the pages to be released so that the memory is free for other allocations without needing to castout or evict the SBE pages. Change-Id: I7c7298cc279d110fcf188514fd04f9ed3e0a81e8 Signed-off-by: Robert Lippert <rlippert@google.com> Signed-off-by: William A. Kennington III <wak@google.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36209 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove Hack to Set SBE Side to 0 before SBE Update calls doShutdownMarty Gloff2017-02-151-73/+0
| | | | | | | | | | | | | | | Can be removed with updated p9_select_boot_master.C propagated to CMVC. Change-Id: I8fbf416c804104e3c2da3bd308f2d19b25d7d19c RTC:167179 CMVC-Prereq: 1015962 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35600 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Quiesce SBE before writing SEEPROMMarty Gloff2017-02-103-4/+25
| | | | | | | | | | | | | | Call sendPsuQuiesceSbe before doing the deviceWrite of the SBE SEEPROM with the SBE image. Change-Id: I6d3cec5b0430b8083acabc30bb7ff14ba5e1b56e RTC:158899 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34994 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* IPL: Error log cleanup: BC8A2210 - SBE_PERM_SIDE_DIRTY_BAD_PATHMarty Gloff2017-02-071-1/+3
| | | | | | | | | | | | | | | | | | | | | Long-term fix to get boot side before SBE is started Code can attempt to get the boot side for an SBE before the SBE is started and the SCOM can be read. In this case the boot side for the master processor should be used. Second step of this fix is to read the SCOM for the master processor target when finding the boot side of the master processor SBE or a slave processor SBE that is not started and read the SCOM for the slave processor target only after its SBE is started. A new processor target attribute will be set after the processor's SBE has been started. Change-Id: I12f97435f8872e41f06dcff6120abe4c24a1bb22 CQ: SW378865 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35938 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* OP820:OPRASGS:Garrison:Hostboot IPL fails to halt during shutdown reconfigRichard J. Knight2017-02-071-19/+6
| | | | | | | | | | | | | | | | | | | | | -Added the ability to notify the istep dispacher discontinue executing isteps -Added call to stopIpl() api in sbe update path -Added internal graceful reboot request for SBE update and reconfigure re-ipl usage Change-Id: I5682992802b0f373df91378a38187d032bb3a0b4 CQ:SW361886 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27959 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28574 Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
* Updates to allow SBE update to work for OpenPOWERDean Sanner2017-02-061-1/+3
| | | | | | | | | | | | | | - RINGOVD partition is optional, don't error out on it - Default ATTR_SYSTEM_IPL_PHASE to HB IPL PHASE Change-Id: Ia672617713aee9e35345c76aab0bba96bc999024 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35950 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* IPL: BC8A2211 - SBE_P9_XIP_CUSTOMIZE_UNSUCCESSFULMarty Gloff2017-02-021-4/+5
| | | | | | | | | | | | | Modify core count to be the minimum of what is desired and what is available. Change-Id: I0859db40944571e084ec2c8aa338ccf1a4c909e6 CQ: SW378586 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35811 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Quick fix to get boot side before SBE is startedMarty Gloff2017-02-011-4/+1
| | | | | | | | | | | | | | | | Code can attempt to get the boot side for an SBE before the SBE is started and the SCOM can be read. In this case the boot side for the master processor should be used. First step of this fix is to remove the #if logic around the block to select the master processor target. Change-Id: Idb08165a3e2c9217adc17592ffb56b9434182acd Depends-on: I8111a40c8aa53e1699b0381440584db3dd6c3fc6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35730 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Fix getSbeBootSeeprom in sbe_update.CMarty Gloff2017-02-011-1/+6
| | | | | | | | | | | | | | | Change so that an error log and an unknown side value are returned if the boot side cannot be determined by the function. Change-Id: I7be3abfda9aeec46070270c5785f837680b25a70 RTC:166492 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35267 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable updates of SBE SEEPROMsMarty Gloff2017-01-301-0/+19
| | | | | | | | | | | | | Unset NO_SBE_UPDATES in fsprelease.config. Create ATTR_SBE_UPDATE_DISABLE to allow disabling updates. Change-Id: Ic57d4e7a28d3778f6959d7665052ac7e9c9f73c7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35288 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enforce single-threaded rule for Hardware ProceduresDan Crowell2017-01-231-20/+47
| | | | | | | | | | | | | | | | | | | | Because we aren't using read thread-local storage for the FAPI variables (opmode, piberrmask, current_err) we need to ensure that we never have multiple HWPs running at the same time. The external interface that we use in all cases is FAPI_INVOKE_HWP so that is where a mutex is placed. This change also uncovered a couple bugs in how we were executing some non-fapi HWPs in the SBE update code so I fixed those as well. Change-Id: Ie8817da62dd4e6bc9ed3ac2debf126f6d05c2b23 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34518 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* SBE Update Changes and HacksMarty Gloff2017-01-203-502/+139
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While verifying SBE boot from both SEEPROM sides, several changes were identified and a hack was created to fix a HWP bug. 1) Replace use of SBE::setNestFreqAttributes with use of TARGETING::setFrequencyAttributes. 2) Update TARGETING::setFrequencyAttributes to not pass in i2cBusDiv, but instead to calculate this value. 3) Update TARGETING::setFrequencyAttributes to find the PLL bucket for the new nest frequency. 4) Add a call to TARGETING::setFrequencyAttributes in call_mss_freq. 5) Remove finding PLL bucket from call_host_voltage_config. It is not required since TARGETING::setFrequencyAttributes is being called. 6) Remove SBE::setNestFreqAttributes and SBE::checkSeepromNestFreq from sbe_update.C as they are not being used. 7) Remove various variables, fields, and parameters because they are unneeded after work above. 8) Add hack to set SBE boot side indicator back to primary side before doShutdown in sbe_update.C. 9) Add syncAllAttributesToFsp call before doShutdown in sbe_update.C. 10) Add attributes for the nest PLL frequency data. Change-Id: I97ea6386eb583a71c0dbec70adb9977e749dbfd3 RTC:152404 CMVC-Prereq:1014451 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34735 Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Select boot seeprom for slave processorsMarty Gloff2016-12-222-5/+112
| | | | | | | | | | | | | | Add a function to set the boot SEEPROM for the target processor based off the setting for the master processor. Change-Id: Ie39ca011952ea5cf10a8b752268116265cc4fabd RTC:162326 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34022 Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Add gcc -Os optimization to the hostboot bootloaderStephen Cprek2016-12-202-4/+7
| | | | | | | | | | | Change-Id: Ibe443c8c937387ffa817d22fa72365b216f42151 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33414 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Access of p9_ringId array gets Storage ExceptionMarty Gloff2016-12-121-0/+1
| | | | | | | | | | | | | | | Need to add the p9_ringId.mk to the makefile for the sbe module so that p9_ringId arrays can be accessed by code in this module. Change-Id: I078f7217a9a0f0a78fde64a82e1a5d2529e94eb4 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33731 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* SBE Update fixes and patches for Bring-upMarty Gloff2016-12-022-12/+76
| | | | | | | | | | | | | | | | | Set NO_SBE_UPDATE in fsprelease.config. Patch eepromdd.C to make write cycle time a minimum of 10 msec. Find .hbbl section before attempting to append new HBBL to SBE image and delete it if it already exists. Use malloc rather than stack space for ring section buffer. Fix i_maxImgSize value passed to procCustomizeSbeImg. Fix SBE_ECC_IMG_MAX_SIZE calculation to include pad bytes. Change-Id: I632e17851830acb1b365abc92438b0356232487c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32487 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Tested-by: William G. Hoffa <wghoffa@us.ibm.com>
* Changes for P9 SBE - Clean-up work from EKB/HWPMarty Gloff2016-11-081-6/+18
| | | | | | | | | | | | | | | Enable use of ATTR_SBE_IMAGE_MINIMUM_VALID_ECS. Change-Id: Ia5fa6b1ea68137f148ebfc789b19c10f2476fcc7 RTC:161050 CMVC-Prereq:1009913 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31267 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Changes for P9 SBE - Clean-up override of a Zero Nest PLL Bucket IDMarty Gloff2016-10-191-10/+0
| | | | | | | | | | | | | | Remove logic to conditionally set Nest PLL Bucket ID to 3 if the value received for it is 0. Change-Id: I781071e74333ef8c96651c27dbd29a5dc6777a2c RTC:161398 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30832 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Changes for P9 SBE - Clean-up work from EKB/HWP MAX_RING_BUF_SIZEMarty Gloff2016-10-173-7/+7
| | | | | | | | | | | | | Stop using FIXED_RING_BUF_SIZE, but instead use MAX_RING_BUF_SIZE. Change-Id: I84022645fcc9d43d5eb0c6a087cd2b6ffd671700 RTC:161050 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31269 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Save away mbox scratch regs before usingDean Sanner2016-10-121-61/+24
| | | | | | | | | | | | | | | | The debug tools use the scratch regs for communication purposes with the debug tools, however the initial values of the scratch regs are used for boot. Save the initial values away so the mbox scratch regs can be used for debug tools Change-Id: I372f7d23bc03cf0c88c845a18ebb1c9657c364c5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30880 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Changes for P9 SBE - End-to-End Testing SBE Boot Side FixMarty Gloff2016-10-102-6/+7
| | | | | | | | | | | | | | Changed SCOM that is read to determine SBE boot side to 0x0050008 and mask for the bit to check in that SCOM to bit 17. Change-Id: Ibec557edae338d54a0b61a2c49e746c76afa57b9 RTC:160466 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30812 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Read MC Sync Mode from SBEDan Crowell2016-10-071-0/+44
| | | | | | | | | | | | | | | | The SBE boots the system into a specific mode for MC/Nest running synchronously. Hostboot needs to detect the mode that we booted in and set our live copy based on that since it may be out of sync from what our attribute might say. Change-Id: I4d7839eb4dd7e40fa045006abfdedc35b16f956c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30811 Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add call to update SBE image if nest freq changed in istep 7.3Andres Lugo-Reyes2016-10-052-16/+72
| | | | | | | | | | | Change-Id: I529056bf1380238f5064f18b39bc09ec97e7a112 RTC: 157659 Depends-on: Idea9e3ae8d08052e960c00c225522bbe8da3ea5e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29521 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Changes for P9 SBE - End-to-End Testing in FSP environmentMarty Gloff2016-10-052-35/+24
| | | | | | | | | | | | | | Enable call of p9_xip_customize in FSP environment. Change-Id: I0cbcd11cdf458ffb018e58a20e05d2ec3fd38058 RTC:160466 CMVC-Prereq: 1007275 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30559 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix Bus Speed Array GenerationMarty Gloff2016-09-291-2/+2
| | | | | | | | | | | | | | | | | | | | | Change bus speed array from 4x3 to 4x4 (engines x ports). Remove code to "Default everything off except TPM until MRW is correct and simics model is complete". Also clean-up some TODO comments. Remove temp return statements from SBE update and resolve sides functions. Skip additional content types when processing eeproms. Change-Id: I490585ca48113fc2e07fc4194201361d04e93f22 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30323 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
OpenPOWER on IntegriCloud