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* Automatically include config.hDan Crowell2019-12-061-1/+0
| | | | | | | | | | | | | | | | | | Rather than having to remember to include config.h anywhere we reference a CONFIG variable (and usually forgetting), this adds it to the default compiler flags so that it gets included in every source file we build. Change-Id: I53622ab4d46c55d942e98cae6ec03049fd5b3d08 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/87475 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Zachary Clark <zach@ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com> Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com>
* Corrected bad logic, in an if statement, that was creating a bad traceRoland Veloz2019-05-071-60/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Corrected bad logic that was NOT guarding a check for when the procIOMask did not match the coreMask: Old logic: if ( (NULL == err) && (procIOMask == coreMask)) { ... } else if ( procIOMask != coreMask ) <-- bad logic { ... } <--- produced bad/confusing trace else { ... } New logic: if (nullptr == err ) { if (procIOMask == coreMask) { ... } else <-- good logic to guard (procIOMask != coreMask) with if (nullptr == err ) { ... } <--- trace is no longer confusing } else { ... } Change-Id: Ic852e1e4c670b021b48354efbdc51bd1a009115c CQ:SW464063 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76840 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Modify PNOR load order in SBE update to avoid OOM conditionDan Crowell2019-02-261-71/+129
| | | | | | | | | | | | | | | | | | Changed the order and lifetime of the various PNOR section loads that happen inside the SBE update flow to reduce the overlap as much as possible. SBE_IPL and HBBL will be loaded, consumed, then unloaded. Then after that HCODE will get loaded, consumed, and unloaded. Change-Id: Icf30d0313cf326e3e7b3f1f5a6614c76d1e75e91 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72453 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Add new path in EEPROM device op to allow reading from new EECACHEChristian Geddes2019-02-161-10/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | Recently a new EECACHE section was introduced to Hostboot. This section gets populated with a copy of every PRIMARY_VPD eeprom (someday could contain other eeprom roles also) during host_discover_targets. This commit add support to allow users to select where they want to perform their EEPROM device operation. If they pass CACHE to the deviceOp macro then a read will come from the pnor cache, writes will write to pnor cache and then also write to the eeprom HW. If HARDWARE is passed in then reads and writes will be directly done on the eeprom hardware. If AUTOSELECT is passed the code will check our cache to see if we have a copy of the eeprom in question, if we have a copy we will go the CACHE path, if no copy exists we will go the HARDWARE path. Along with this change some reorganization was done w/ the eeprom related files. RTC: 196805 Change-Id: If2c4e5d3e338a1a10780740c1a019eb4af003b73 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70822 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Create error log and fail if Proc's EC is found to be 0x0Christian Geddes2018-11-271-1/+28
| | | | | | | | | | | | | | | | | | | | While looking up the SBE version we will look at the processor's EC level to determine how to lookup the version. If we find that the EC level is 0 then something went wrong. In HW the register describing the procs EC will always be fused to some non-zero so we shouldnt see this in HW , in simics if this happens it is likely because simics has not implemented this register yet. Change-Id: I24bc0caaf3d2c9a574943ca07069bd6fb99cf1a6 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68804 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Only allow key transition in istep 10.2Nick Bofferding2018-11-151-3/+8
| | | | | | | | | | | | | In certain cases, if a key transition driver was booted and the nest frequency had to be updated, the key transition flow would erroneously activate in istep 7.3 (call_mss_freq). This change confines key transitioning to istep 10.2 Change-Id: I450703e21bf68644298f77fcdfca62eae5c667e4 CQ: SW451376 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68685 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Serialize all attribute synchronization callsNick Bofferding2018-10-171-2/+3
| | | | | | | | | | | | | | | Forces all FSP attribute synchronizations down to FSP to serialize in the attribute resource provider attribute synchronization daemon thread to avoid concurrenty problems. Change-Id: Ifb355ba6f42872465ea3d6f0d9009cfd6f768d7a CQ: SW448280 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67450 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Revert "P10 prep: Infrastructure (IS) ring Id metadata and API changes"Daniel M. Crowell2018-10-151-1/+1
| | | | | | | | | | This reverts commit 52b76be222254e59959db984606c09dae854270b. Accidental merge before ekb was complete. Change-Id: I59412ecad661596322aaba5cb5cf83190727d64f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67455 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* P10 prep: Infrastructure (IS) ring Id metadata and API changesClaus Michael Olsen2018-10-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Gerrit intent: - Applicable for P9 merge (co-req NOT required) - Co-req not req'd for any tests Includes the following changes: - Accommodates initCompiler's needs for additional ring Id APIs to retrieve IS's key ring identifiers, ringId and ringClass, and to align with our enumerated chipId - Elimination of redundancy in and reorg of IS's ring Id lists: RingProperties, GenRingIdList (gone) and ChipletData. - GenRingIdList has been removed. - Expand RingProperties to also include scanScomAddr and ringClass. - Member of ring and chiplet properties structs have been renamed in consistent camel style (no longer using "iv_" anywhere). - Note that with "infrastructure (IS)" we here mean the core infrastructure codes that directly interact with and affect the image. Key_Cronus_Test=XIP_REGRESS Change-Id: I7e92af04edd10c0994718e476f6e7b77c5d124d6 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/59087 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Account for mixed procs in compatibility modeDean Sanner2018-08-211-2/+11
| | | | | | | | | | | | | | | | Current code enforces the same EC level for all processors in the system. However, this breaks compatibility mode for P9C 1.2/1.3 and P9N 2.2/2.3. Added code to allow these to pass the EC check when mixing parts Change-Id: Ie013d94dfdee3627911f4afbec5f65d5ce984227 CQ:SW442691 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64823 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Only switch sides and perform hreset if SEEPROM side versions matchChristian Geddes2018-07-191-117/+212
| | | | | | | | | | | | | | | | | | | | | | | | In the event that the SBE fails hostboot will attempt to recover it. During runtime hostboot will attempt an HRESET if the SBE is in a failed state. When the SBE performs the HRESET it will save some important information that will persist through the reset. If one side is failing to recover the retry code will attempt to switch sides and do the hreset. If the SBE seeproms have different versions of the SBE code the data that was supposed to persist through the HRESET will be in incorrect places because the version mismatch. Because of this we cannot switch seeprom sides and perform a hreset if the seeproms have different level of the SBE code. CQ: SW438029 Change-Id: Ic7078a886088cc4d5355cc076e72d0fc36f85027 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/61605 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* ABUS Node Communication: Add Support for Redundant LinksMike Baiocchi2018-07-131-1/+1
| | | | | | | | | | | | | | | This commit adds redundancy to the ABUS Node Communication procedure by using the best possible link per connection rather than the default secure link. Change-Id: I051d316eacb05d59889d3f45fcb387e29877e1fe RTC:184518 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62133 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update comment in getSbeVersionViaChipop to be correctChristian Geddes2018-07-121-1/+1
| | | | | | | | | | | | | | | Previously it was saying the size of the version read was 3*128 bytes but it is actually 2*128 bytes. Change-Id: I884da84f82f64de4d2562e77907b375cfbba23e3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62181 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Read HW Key Hash From SBE Seeprom via ChipOp when applicableMike Baiocchi2018-07-061-7/+113
| | | | | | | | | | | | | | | | This commit uses SBEIO ChipOps to read the HW Key Hash from the SBE Seeprom when reading from the Seeprom that booted the processor. This will help avoid I2C collisions when both Hostboot and the SBE try to access the same SBE Seeprom at the same time. Change-Id: I5693cc59aa2a7259f07363328bd8513c943f0a06 CQ:SW435288 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61958 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* In non-MNFG, only match SBE keys for the sides that bootJaymes Wilks2018-06-281-3/+11
| | | | | | | | | | | | | | | | | | | FSP was not IPL'ing from SBE side 1 when production key is corrupt in SEEPROM of SBE side 0 (due to the key mismatch check). This change gets around that by only matching SBE keys for the sides that booted in non-MNFG case. Change-Id: I1dfcb5c7f7e281125fdbcfc8b8f3a84747c90f59 CQ:SW420430 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60571 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix for SBE_P9_XIP_CUSTOMIZE_UNSUCCESSFUL during ipl with one EXMarty Gloff2018-05-311-7/+13
| | | | | | | | | | | | | | | | | Remove code that enforces having a minimum number of cores, allowing the code to continue with the present cores. Also add a trace to identify that the minimum core count was not met. Change-Id: I0d139d39824ad6eb57c14227e1366f96cdaf7ea7 CQ: SW418068 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59543 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Inform FSP of key transition progressNick Bofferding2018-05-101-7/+122
| | | | | | | | | | | | | | | | | | | | | | | The existing key transition flow updates all SBE SEEPROMs within the system in the same boot, thereby quiescing all SBEs. This compromises the ability of FSP to detect a key transition TI at the end of the update process because the SBE is not alive to service FSP's incoming SBE FIFO request to read the memory holding the attention information. This change adds new support to log the key transition progress in a node target attribute introduced in an earlier commit and send that status to FSP via a new mailbox message. Change-Id: I828184ae8be89ac87137d7510a3c375cef2e05d7 CQ: SW418697 CMVC-Prereq: 1053806 CMVC-Prereq: 1053552 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56677 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* SBE Update: Don't alter HBB partition when customizing SBE imageNick Bofferding2018-04-191-2/+8
| | | | | | | | | | | | | | | | | | | | | This change creates a scratch copy of the HBBL (bootloader) partition during SBE image customization because the data is potentially altered prior to customizing it into the SBE image. If the partition data is altered directly, that can trigger a storage exception when HBBL's memory pages are read only. Change-Id: I00f220170c69401d4dcefd294e96aacccc7baff8 Resolves: #133 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57442 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> CI-Ready: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Close SBE Security BackdoorIlya Smirnov2018-03-301-1/+13
| | | | | | | | | | | | | | | | | | | | | During a key transition process from dev to prod keys the lab override bit does not get unset and does not get customized into SBE at the time of the transition. Only when the system reaches istep 10.2 with prod keys does the bit get reset. This change customizes the bit at the time of the transition, which ensures the system is secure all the way through IPL with prod keys. Change-Id: I1343d2dd95aa4549b92e46ebcb9df142303c1f0b RTC: 188958 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56127 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Ensure ATTR_EC_GARD and ATTR_EQ_GARD are updated before SBE updateDan Crowell2018-03-261-0/+6
| | | | | | | | | | | | | | | | | | | | | The xip_customize code does not look at target states directly. Instead it just shoves a couple of attributes directly into the image. This change ensures those attributes are set correctly before executing the xip_customize procedure. Change-Id: I6e9ffedcea08af70882be1de6ff2203de8b3e30b CQ: SW421514 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56144 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> CI-Ready: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
* Created individual update flags for both SEEPROM 0 and SEEPROM 1Roland Veloz2018-03-121-4/+10
| | | | | | | | | | | | | | | | | | I created individual update flags for both SEEPROM 0 and SEEPROM 1 to better target which seeprom to update. Now SEEPROM 0 or SEEPROM 1 or both can be singled out for update(s). Change-Id: I91f1b66f6a1f2e42d37173fb9e21f87e440d3a21 RTC: 189218 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55173 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Force an SBE update upon boot failure as well as break out common dataRoland Veloz2018-02-281-4/+9
| | | | | | | | | | | | | | | | | | | | | | This commit takes care of two stories since they are related to each other. First, moved all common data (structs, enums, constant literals) from file sbe_update.H into sbe_common.H. This will allow content to be shared between FSP and HB with out having to have simultaneous updates. Secondly, an update will be forced if bit 3 of the SB keyword flags dictates it, regardless of whether an update is recommended or not by other logic. Change-Id: I3bd3c5cdd648309637bdf657db8f0935670c7d12 RTC:181140 RTC:181141 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54408 Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Brian E. Bakke <bbakke@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Send additional FSP progress messages during long isteps (e.g. memdiags)Rick Ward2018-02-151-12/+1
| | | | | | | | | | | | | | | | | | | Updated sendProgressCode() so that it would only output trace or console messages once per step/substep. Replaced most calls to IPMIWATCHDOG::resetWatchDogTimer() with calls to sendProgressCode() which calls resetWatchDogTimer() if communicating with a BMC, or updates the FSP with its progress on FSP-based systems. Change-Id: I29beb7ce5cdae467d26a0b2c5fee9e3cc4629161 RTC: 169682 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53995 Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove is_master conditional from getVersionInfo in sbe_updateChristian Geddes2018-01-181-20/+15
| | | | | | | | | | | | | | | | | Previously we were having issues reading from the slave proc's SBE while we were in cache containment. We have re-order the IPL steps to reset the memory bars later on in the boot. This allows us to perform the reads now. We had issues running chipOps on simics. I am opening up a defect to look into this problem but for now we will only do i2c reads on simics. Change-Id: I177082d9c443d83ee750c57cde9a16c09844807f RTC: 182266 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52040 Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Make SBE_MISCOMPARE_WITH_MASTER_VERSION errors informationalChristian Geddes2017-12-121-14/+19
| | | | | | | | | | | | | | | Now that we are getting closer to release we want these errors to be informational. Change-Id: Ic6304d20f1fc027d8c7acc7c077912264ead7642 CQ: SW370016 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49835 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Secure Boot; Force simultaneous SBE update on key transitionNick Bofferding2017-12-111-264/+320
| | | | | | | | | | | | | | | | - Forces simultaneous SBE update in sequential mode during key transition Change-Id: If660c99a43dcbb465ca962ca060f52e63f9cd97c RTC: 180784 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50610 Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Surface unique TI when key transitioning completeNick Bofferding2017-12-081-3/+3
| | | | | | | | | | | | | Change-Id: Ib06c2cfab24e521c044f662218720e44d489866c RTC: 180784 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50546 Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: VENKATESH SAINATH <venkatesh.sainath@in.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Handle ContainerHeader asserts more nicely with error logsStephen Cprek2017-12-051-1/+7
| | | | | | | | | | | | Change-Id: I2dfd02bd7c7f5b5356cd93ca967482c2d7f79ec1 RTC: 178520 RTC: 181899 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49966 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add RTC to remind us to allow sending readSeeprom op to slave SBEChristian Geddes2017-11-301-0/+8
| | | | | | | | | | | | | | | | | | There was some issues sending readSeeprom commands to the slave SBE while hostboot was running out of master core's cache and the LPC bars that were used for initial IPL have been reset. This commit adds a TODO in the code so we will come back and allow this once we alter the design to allow this Change-Id: Icd592d43d14706c0f198bc5ad5a50bc5abaccfb7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49601 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Story 179465 - Smarter HBBL id handling ...Brian Bakke2017-11-191-8/+112
| | | | | | | | | | | | | | | to avoid constant SBE updates Change-Id: Id02c7eb95a8e83274968477514130512ee553968 RTC: 179465 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49748 Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Use readSeeprom PSU chipop to get SBE seeprom image versionChristian Geddes2017-11-171-101/+282
| | | | | | | | | | | | | | | | | | | | During an SBE update we were getting I2C collisions when trying to access pnor on the "running" or "active" side of the seeprom. This commit adds support for a PSU chipOp called "readSeeprom" which allows the host to make a request to the SBE to copy a specified chunk of pnor out to a buffer in memory which the host can access. This commit also uses this chipOp in place of the I2C read during the SBE update of the active seeprom side. Change-Id: I4b639ebe6090dcc0bdbb42f13fcb12c23260a8b4 RTC: 180959 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48408 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Parser for SBE and HCODE build levelMarty Gloff2017-11-061-3/+3
| | | | | | | | | | | | | | | | | Add ERRL_UDT_BUILD and associated parser for XIP image build information user detail in an error log. Change-Id: I7ef7eaa1eedd51a882d0b1a2159d2b89569ade02 RTC: 177362 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48586 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian E. Bakke <bbakke@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Implement Secure unloadJaymes Wilks2017-10-201-12/+5
| | | | | | | | | | | | | | | Implement Secure unload of secure sections within PNOR. Change-Id: I92a00013d23e0506f89f89ec41a193eac0b25d25 RTC:157475 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46203 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Default to use the master's side for slave sbe starts in OPDan Crowell2017-09-121-39/+59
| | | | | | | | | | | | | | | | | | | | On OP systems (any non-sequential sbe update config), we will use the same side of the sbe seeprom on the slave as what was used to boot the master. This will prevent us from seeing the same failure booting the slaves that we got booting the master in the case where we have a bad sbe image for some reason. resolves zaius-openpower/#61 Change-Id: Ibcd00c43958d0ba2ce5978b0ab921a934f9f58a5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45264 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Remove sleep from SBE_UPDATE pathBill Hoffa2017-09-111-5/+0
| | | | | | | | | | | | | | Change-Id: I72143b397dec264ba1d3d881f53c75ba0f65dc09 RTC: 178620 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45980 Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* SBE Update Console Print FixBill Hoffa2017-09-081-1/+1
| | | | | | | | | | | | | | | - Instead of printing side 2/3 print the more commonly referred to side 0/1 Change-Id: I932a9236625f6b7137640eeea7da2a44104216a0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45814 Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Improve SBE Update Console MessagesBill Hoffa2017-09-051-1/+8
| | | | | | | | | | | | Change-Id: Iac6785910f15dc6b67cf432a590288f70d86aa9e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45488 Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Check for Minimum Number of Cores (depending on system) during SBE UpdateDzuy Nguyen2017-08-221-1/+8
| | | | | | | | | | | | Change-Id: I0ae673a82878cff5da703ee0955e86310142d00a RTC: 169067 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44696 Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Keep masterVersionCompare() call out of OpenPOWER SBE Update re-IPL pathMarty Gloff2017-08-181-13/+15
| | | | | | | | | | | | | | | | | | | The call to sbeDoReboot() returns to SBE Update code for the BMC_IPMI config and then calls masterVersionCompare(). The masterVersionCompare() call should not be made if a shutdown has been requested, so should be put in an else leg for the if statement that determines if sbeDoReboot() is called. Change-Id: Ib1b1d7a08b7886e9954edd05284a666e23b37796 RTC: 176755 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44676 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Sleep after SBE Quiesce in SBE Update PathBill Hoffa2017-08-171-0/+6
| | | | | | | | | | | | | | | | | - There was a race condition introduced with the f0a8fe8 commit in SBE that causes checkstops during an SBE Update as the SBE wasn't fully quiesced when it replied to the message and caused HB to start writing to the SEEPROM before the SBE was ready. Change-Id: I25d79f17bb6a849825a5af72ecf33b98ced77008 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44736 Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* SBE update plan for OpenPOWERMarty Gloff2017-08-091-124/+201
| | | | | | | | | | | | | | | | | | | | We need to have a new way to handle the SBE update flow for OpenPOWER. Update the SBE code one side at a time to avoid a scenario where a bad code load bricks the system. Start by loading side 0 (primary), then re-IPL, and finally load side 1 (backup). A new config flag is used, SBE_UPDATE_CONSECUTIVE. Change-Id: Icf18ebec173c2f42fe200fb9cd547b9ebc580acc RTC: 176755 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43893 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Shutdown after key transitionNick Bofferding2017-07-281-16/+53
| | | | | | | | | | | | | | | | | | - Fence off istep path after istep dispatcher stops - Automatically power off after a key transition has completed - Added IPMI API to power off system Change-Id: I74eaec08e86d0cbc46db6aa1674845c53bcf14d4 RTC: 174017 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43436 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Remove SBEC pnor partition from p9 codeStephen Cprek2017-07-241-4/+0
| | | | | | | | | | | | | Change-Id: I13e79a6542353e42ac809cc60295947dfb1acb96 RTC: 163810 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43048 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* sbe_update: Poke the watchdog after each seeprom update actionWilliam A. Kennington III2017-07-201-0/+17
| | | | | | | | | | | | | | | | | | | | Normally the watchdog is only poked before each istep. During the SBE update istep the process of flashing the SBE can take too long for the default watchdog. Instead of only poking the watchdog at the end of the istep, also poke the watchdog after each flash action. Resolves #108 Signed-off-by: William A. Kennington III <wak@google.com> Change-Id: I71c2557a3b34da2a2597060cf3e3eb0d7c8f9820 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43120 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Block SBE updates during mpiplDzuy Nguyen2017-07-181-13/+46
| | | | | | | | | | | | | Change-Id: Ie59495404ec27d6be865063fc930e895340d9be2 RTC: 169683 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42853 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Log build level for SBE and HCODE customizationMarty Gloff2017-07-171-0/+30
| | | | | | | | | | | | | | | | | | Extract build information from the XIP header for the SBE and HCODE images. Trace the information. Also use it as FFDC for related error logs. Save the SBE build information in the SB keyword of MVPD. Change-Id: I600a71ae6cbf342643261da14f6b3b2e6bf3cbf1 RTC: 168827 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42951 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* xip_customize: GPTR/overlays stage 1 supportClaus Michael Olsen2017-07-141-0/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updated to poll Nimbus DD level and whether there's support for overlays in the XIP interface. Further, updated to add three extra args in xip_customize API, two of which are to support a third ring work buffer for the overlays handling. This has necessitated making changes to hcode_image_build (HIB) API as well. Note that the calling codes of xip_customize and HIB need to be updated to supply the additional args in their APIs. Note that this code stage 1 will work for Nimbus DD2 with Gptr rings in Mvpd, and no Gptr rings in the HW image. It will, however, not work if there's content in .overlays or if there's Gptr rings already in the .rings section. Thus, the stage 1 code here will work with a DD2 image (i.e., that does NOT have Gptr rings in .rings in HW image) as long as noone has put any real Gptr initfiles in for processing (which would result in ring content in .overlays). We must ensure that the stage 2 code of xip_customize gets merged on the HB side to enable processing of .overlays content before we actually add any Gptr initfiles for the .overlays section into EKB. Change-Id: I3d6ab8a9add239c92819613dcae21ef5faf0a1c5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40591 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40898 Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Tested-by: Dean Sanner <dsanner@us.ibm.com>
* Add in calls to p9_get_sbe_msg_register and handler functions (4/4)Elizabeth Liner2017-06-291-1/+1
| | | | | | | | | | | | | | | This commit adds in an additional hwp needed for the SBE conditions handling, p9_get_sbe_msg_register. This HWP pulls out the SBE register and determines if it got to runtime or not. From there there are handler functions that decide what to do next. Change-Id: I0e17b345bb983ed6373ec36ea2a6eb9b5e1bf3f1 RTC:173809 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41503 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Verify the correct HW Key Hash is used in Customized SBE ImageMike Baiocchi2017-06-111-119/+240
| | | | | | | | | | | | | | | | | | This commit keeps track of what HW Key Hash is added to HBBL before customizing the SBE Image and then checks that this HW Key Hash is found in the customized SBE Image. It did this by updating getHwKeyHashFromSbeImage() to possibly read the HW Key Hash from system memory along with its default behavior of reading it from a SBE Seeprom. Change-Id: I0139fb959102de74b12874f30e7d2ec0bf918e3f RTC:175330 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41453 Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Disable Ring Overrides in Secure ModeMike Baiocchi2017-06-081-1/+3
| | | | | | | | | | | | | | | This commit disables ring overrides during the IPL and at Runtime when the system has security enabled. Change-Id: Ic3b0db92994a61d4ba6e28858bcd6fde59be6a23 RTC: 163094 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40818 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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