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* sio: Add test for availabilityAndrew Jeffery2018-10-151-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some components can continue to operate in the face of the SuperIO controller being unavailable on the LPC bus (specifically, the UART and boot flag processing). Other components require it present (AST-based SFC implementations and the AST mailbox). Components in the latter category can just fail with an errl when they attempt to access the controller, but for those in the former category we add an isAvailable() function in the SIO namespace to sidestep dealing with errors. Specifically, isAvailable() tests for the expected error when the SuperIO controller is disabled, and returns an errlHndl_t if any other error occurs. This way true LPC errors are propagated to the caller to commit as desired. For the moment *all* errors produced by the SIO::isAvailable() LPC bus access will result in the SIO code assuming the device is absent. We should be more precise about this, but the hardware behaviour seen under hostboot currently prevents us from being more specific. This problem is highlighted by a FIXME block in the implementation of SIO::isAvailable(). Change-Id: Id30a09b48586d2054e0cdae625ee23df68ac2aa3 Signed-off-by: Andrew Jeffery <andrewrj@au1.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67460 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Revert "sio: Add test for availability - LPC error tweak"Andrew Jeffery2018-10-151-6/+1
| | | | | | | | | | | | | | | | | | This reverts commit 627379aeaa27e30d66ebb0aecf218708d465162c, which incorrectly attempted to account for LPC errors during testing for SIO absence. The broken patch interprets the OPBM status as LPCHC status and expects an LPCHC SYNC Abnormal error, however as it's the OPBM status that indicates the error we never hit the LPCHC error path to populate the errl with the error RC expected by the SIO driver. Change-Id: Ib993d4a2b9b4e5018d9273a1c82f8b5c21ec9a25 Signed-off-by: Andrew Jeffery <andrewrj@au1.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67459 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* sio: Add test for availability - LPC error tweakDan Crowell2018-10-111-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | Some components can continue to operate in the face of the SuperIO controller being unavailable on the LPC bus (specifically, the UART and boot flag processing). Other components require it present (AST-based SFC implementations and the AST mailbox). Components in the latter category can just fail with an errl when they attempt to access the controller, but for those in the former category we add an isAvailable() function in the SIO namespace to sidestep dealing with errors. Specifically, isAvailable() tests for the expected error when the SuperIO controller is disabled, and returns an errlHndl_t if any other error occurs. This way true LPC errors are propagated to the caller to commit as desired. Change-Id: Ib94ceabfd4f4e9c63c114cfe3db3c954dbb6d6e5 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67315 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: ANDREW R. JEFFERY <andrewrj@au1.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Pnor DD Changes for AST2500Bill Hoffa2016-10-311-489/+3
| | | | | | | | | | | | | | | | - Created Common sfc_ast2X000 class for common functions - Modified sfc_ast2400 class to use common class - Added sfc_ast2500 class Change-Id: I27c7674b58e006801ae03aabd60fdcfa21f49e9c RTC: 161664 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30919 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Elizabeth K. Liner <eliner@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
* superio driver to control accesss to SIO registersManali Kumar2015-12-081-232/+53
| | | | | | | | | | | | | | | | | The SuperIO driver makes accesses to the SIO chip from the console and pnor module thread safe. Change-Id: Ib07dea2867d14684806c56cd965b26c95810f7f3 RTC:115576 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20928 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: PRACHI GUPTA <pragupta@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* determine the toc locations in pnorrp and rt_pnor codePrachi Gupta2015-02-241-9/+10
| | | | | | | | | | RTC: 120733 Change-Id: I5372a102ce9761a514a6f7245ca206a2226f1f3b Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15456 Tested-by: Jenkins Server Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix missing align include in OP buildsDan Crowell2014-12-121-0/+1
| | | | | | | | | Change-Id: I99b32088cc27dc533b304b27f7c492e39cd8c6e2 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14895 Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix readFlash size calculation bugNick Bofferding2014-12-101-1/+1
| | | | | | | | | | | | | - Allows Micron extended chip ID to be read correctly - Fixed bytes to words calculation in IBM + AST readFlash routines Change-Id: I26feec40bf111d9bfbb1c791f2b113fcdd270a78 CQ: SW289339 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14835 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix bad loop in PNOR write pathDan Crowell2014-11-121-1/+3
| | | | | | | Change-Id: I2326fde348f944b4f50dc51f3a32040220a77481 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14447 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Enable writes to PNOR on AST systemsDan Crowell2014-10-311-4/+23
| | | | | | | | | | | | Unlock SIO after console setup Fix PP write length Change-Id: I3b5b9c589ac16b392a0df6f9d4355f8aa1701061 RTC: 97493 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14028 Tested-by: Jenkins Server Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Split out SFC logic and add support for AST2400Dan Crowell2014-10-141-0/+856
Refactored the PNOR device driver to pull all SFC-specific code into a new set of classes. Any time a new type of serial flash controller (SFC) is introduced, a new subclass should be created to support it. Also added the full support for the AST2400 BMC that is being used on Palmetto. Change-Id: I9cdbf9b48bbf94615a39804920e170a3142ec386 Origin: Google Shared Technology RTC: 97493 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13229 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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