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Depending on which vendor made a given OCMB the i2c device address
of the PMIC targets on the OCMB will be different. To account for this
we have added a new DYNAMIC_DEVICE_ADDRESS attribute. This attribute
is filled out on the PMIC target by looking at the SPD on parent
OCMB chip. This means that we must do presence detection on the OCMB
prior to the the PMIC targets. While doing i2c operations if a given
target has the DYNAMIC_DEVICE_ADDRESS we will use that over the devAddr
in the any complex i2c attribute for that target.
Change-Id: I22a185a65c064a1514751dd5828547c57af98df1
RTC: 209714
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/85394
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: William G Hoffa <wghoffa@us.ibm.com>
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This commit is an audit of the traces that have been added
in Axone. This commit should remove ~32,000 lines of traces from
hbTracMERG which were result from a few poorly placed trace statements.
Also in this commit a few xml attribute are fixed which were causing errant
traces.
Change-Id: I6ddcfa449aa94e1c661dcf08ec1482be1d5b4b14
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77754
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Glenn Miles <milesg@ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Recently a new EECACHE section was introduced to Hostboot. This section
gets populated with a copy of every PRIMARY_VPD eeprom (someday could
contain other eeprom roles also) during host_discover_targets. This
commit add support to allow users to select where they want to perform
their EEPROM device operation. If they pass CACHE to the deviceOp macro
then a read will come from the pnor cache, writes will write to pnor
cache and then also write to the eeprom HW. If HARDWARE is passed in
then reads and writes will be directly done on the eeprom hardware.
If AUTOSELECT is passed the code will check our cache to see if we have
a copy of the eeprom in question, if we have a copy we will go the
CACHE path, if no copy exists we will go the HARDWARE path. Along with
this change some reorganization was done w/ the eeprom related files.
RTC: 196805
Change-Id: If2c4e5d3e338a1a10780740c1a019eb4af003b73
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70822
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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