| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Base Core/Kernel Changes to Support the Axone Processor Chip | Bill Hoffa | 2018-08-20 | 1 | -4/+5 |
| * | Force 25G Nvlink speed on P9N DD2.1 | Dean Sanner | 2018-03-08 | 1 | -1/+19 |
| * | Cleanup for SMT4/SMT8 read fuse bits and activate threads | Corey Swenson | 2017-05-15 | 1 | -2/+0 |
| * | Fix PVR check for Nimbus DD1 | Dan Crowell | 2017-05-11 | 1 | -2/+10 |
| * | Handle SMT4/SMT8 fuse bits | Corey Swenson | 2017-04-28 | 1 | -0/+2 |
| * | Create PVR routines to handle DD2 changes | Dan Crowell | 2017-03-09 | 1 | -0/+135 |

