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* Force a Hostboot dump on any TI in SimicsDan Crowell2020-01-071-0/+1
| | | | | | | | | | | | | | | Execute a magic instruction in the TI path to force a hostboot dump to be collected on any TI while running in Simics. Change-Id: I8aeffb2b646bbe8480568e8af33a658400fa01a5 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/88831 Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G Hoffa <wghoffa@us.ibm.com>
* Assembly for DARN instruction inconsistentCorey Swenson2019-06-211-5/+3
| | | | | | | | | | | | | | Sometimes generating incorrect L value for the darn instruction. Removed the L variable and hard-coded into the instruction. Change-Id: I5b478d2c220858942320f6fea3cb09d0ba6aee42 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79278 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* NVDIMM encryption HW function supportCorey Swenson2019-06-031-0/+20
| | | | | | | | | | | | | | | | | | Update random number generation, IPL and runtime. Write encryption regs to enable nvdimm encryption, crypto-erase, disable encryption. Read config-status reg to verify encryption state. Change-Id: I25625b53f90eeb542767fa729ebb47f8f8455a4b RTC:201474 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77321 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Developer Improvement: Get code coverage tool working with HostbootZach Clark2019-05-131-0/+1
| | | | | | | | | | | | | | | This commit fixes GCOV code coverage for P9 with GCC 4.9.2 Change-Id: Ie1e7c35f67414531dbd6e7a771ac1529a9ebd59d RTC: 208351 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76812 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* General Improvement: Get HB standalone + op-build working with GCC8Luis Fernandez2019-05-021-4/+6
| | | | | | | | | | | | | | | | Fix issue where when compiling with GCC 8, illegal instruction of value 0x0 is placed instead of the expected "blr" instrusction. Change-Id: I2ff28d5549689d541ea24d102230cbfc22cbbbff RTC: 163075 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76650 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Zachary Clark <zach@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add simics exit_cache_contained mode callMatt Derksen2019-04-081-0/+1
| | | | | | | | | | | | | | | | In istep14, need to call magic instruction 8021 in order to exit cache contained mode when running simics. Change-Id: I277f07420111c0383a7d9b61bf4d1750e39126f2 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75473 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Add msgsync to doorbell wakeup logic to avoid weak consistency bugDan Crowell2019-01-211-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | POWER9 added a new sync mode called 'msgsync' that is required to avoid weak consistency issues when you are using doorbell (msgsnd) functions. See POWER ISA Section 5.9.2 for details, excerpt here: The ordering done by sync (and ptesync) provides the appearance of "causality" across a sequence of msgsnd instructions, as in the following example. "msgsnd->T1" means "msgsnd instruction target- ting thread T1". "<DHDI 0>" means "occurrence of Directed Hypervisor Doorbell interrupt caused by msgsnd executed on T0". On T0, register r1 is assumed to contain the value 1. T0 T1 T2 std r1,X <DHDI 0> <DHDI 1> sync msgsnd->T2 msgsync msgsnd->T1 ld r1,X In this example, T2's load from X must return 1. The change here adds the msgsync call to the code that executes any time we handle a doorbell interrupt. In addition there is a POWER9 DD2 errata that indicates we also require a lwsync to ensure consistency. Change-Id: Ib0f3571926d71efcbffa205093278e2a1d58df85 CQ: SW454611 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70648 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Elevate log levels for simics during PSU opsChristian Geddes2018-10-181-1/+37
| | | | | | | | | | | | | | | | | | | | This commit introduces some new magic instructions one which will temporarily elevate the log levels for given components and another which will start and stop collection of these simics logs. This was added so we can temporarily increase log levels during PSU operations in hopes of catching a timeout we have been seeing in simics and getting more info for the simics teams. Change-Id: I990a4b5413f7ff14796dee36e39199f785aef458 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67359 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Hieu C. Nguyen <hieu.nguyen@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Support HB running in SMFDean Sanner2018-09-241-0/+8
| | | | | | | | | | | | | | | | | | | | | | Support SMF for P9N/P9C. Lots of minor tweaks to make this work, but the biggest is to run userspace in problem state This is needed because for SMF Hostboot will need to run in S=1, HV=0,PR=1 (and kernel in S=1, HV=1, PR=0) This commit makes P9 HB userpsace run in HV=0 PR=1 and kernel in HV=1, PR=0. Change-Id: Ia4771df5e8858c6b7ae54b0746e62b283afb4bc4 RTC: 197243 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/50530 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update MAGIC instruction for SimicsDan Crowell2018-06-181-2/+2
| | | | | | | | | | | | Fixed some bad asm code Change-Id: I6786a6010c682ce8bb5de74999da659ad2eb43d7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60775 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Debug improvements for exceptions and OOM hangsDan Crowell2018-06-151-1/+2
| | | | | | | | | | | | | | | | | There are two main changes in this commit: 1) Forcing an assert if we cannot allocate pages after 10,000 attempts to yield. 2) Adding a backtrace for a lot of exception paths. Change-Id: I755ada753b78abed56e553f7c669f0f98ae68700 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58224 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Add some MAGIC instructions to aid Simics optimizationDan Crowell2018-05-301-8/+25
| | | | | | | | | | | | | | | | 8001 - Tell Simics we are waiting on the FSP 8006 - Tell Simics we shutdown 8020 - Tell Simics which istep we're running CQ: SW423959 Change-Id: Icea13d2ed7ff73de04400c46b9b1855e94db7c84 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58104 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Hieu C. Nguyen <hieu.nguyen@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Enable ATTN prior to OPAL handoffBrian Bakke2017-11-301-0/+7
| | | | | | | | | | | | | Change-Id: Iadfded90c09b149948348ee462ab34f9c2431982 RTC: 182134 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49865 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Story 180760 - Use self restore API to disable ATTN in HID ...Brian Bakke2017-11-071-0/+8
| | | | | | | | | | | | | | | during istep 15/16 of HCODE build/execution Change-Id: I63f54cdc35b3ff7e68120a07c142b6a557257854 RTC: 180760 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49070 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Log traces to error logs in HBRTMatt Derksen2017-10-191-0/+10
| | | | | | | | | | | | | | | | This enables buffer tracing at hostboot runtime. Will add these traces to runtime errors for better debug Change-Id: I795bb7deafdd02adea4588ebf8dfb11cbce116a0 RTC:172770 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48084 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* More istep debug outputDan Crowell2017-04-171-1/+16
| | | | | | | | | | | | | | | | Write current istep out to mbox scratch reg 5 Print istep out to simics console Change-Id: I14d8a9afba12b627a0b1880e0818b5b16f317d7c RTC: 171748 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39292 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Log SBE Traces on error (simics only)Dan Crowell2016-09-281-0/+7
| | | | | | | | | | | | | | | A quick change to add a new magic instruction that collects the SBE traces any time we hit an error from the SBE. If multiple errors occur they will all be appended to the same file. Data will be saved to $sb/simics/sbetrace.hb.txt. Change-Id: I27575c1565c0089e847e19c3e51cb2926833e387 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30206 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Replace NAP with STOP instructionBrian Stegmiller2016-08-071-10/+1
| | | | | | | | | Change-Id: I58a382cfc285e37cc8748fe8e23f71c877850263 RTC: 130186 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/816 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add simics breakpoint for exceptionsDan Crowell2016-05-241-1/+3
| | | | | | | | | | | | | | | | | | | Created a new magic instruction handler that can be enabled via environment variable to stop the simulation for Hostboot exceptions. This is useful when we want to get a backtrace at the failing spot without recompiling code or having to manually insert breakpoints in simics directly. Enable the function by setting HB_BREAK_ON_ERROR The trigger call is MAGIC_BREAK_ON_ERROR Change-Id: I17e008281d010e3f8c5e5817e5f30fd0ccb624d0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24600 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* HOSTBOOT: Support fused coresBrian Stegmiller2015-12-111-0/+34
| | | | | | | | | Change-Id: I2ad133be733ee9e41590b3b8bd60bd6abe69d1a9 RTC: 126786 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22054 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* P9 page table changesCorey Swenson2015-12-111-0/+15
| | | | | | | | | | Change-Id: Ic5f234e0ce0747f887a706054f82372c9a96258c RTC:126640 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19041 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Base kernel changes for Nimbus/CumulusCorey Swenson2015-12-111-2/+3
| | | | | | | | | Change-Id: Ic5dfde1e975453d760631335bab674919e1109e7 RTC: 126637 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18321 Tested-by: Jenkins Server Reviewed-by: Christian Geddes <crgeddes@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Load PAYLOAD from FFS partition.Thi Tran2014-06-301-1/+5
| | | | | | | | Change-Id: Ib4f3b0631a9afb92fd5950b1636b8a3077684dbc Origin: Google Shared Technology Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11553 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Change copyright prolog for all files to Apache.Patrick Williams2014-05-211-11/+11
| | | | | | | Change-Id: I5664587b4f889099290ef50d50fa9ce5e580e1eb Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11167 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Force TIs for unhandled exceptionsPatrick Williams2013-12-091-0/+17
| | | | | | | | | | Change-Id: I743687d7072af303e62d638a7ee5ad6f89afbccb RTC: 89403 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7484 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fixed performance issues in SIMICS IPLStephen Cprek2013-10-311-0/+1
| | | | | | | | Change-Id: Iccce5b641d0e2dc414bacc143a6b3e186f4e49ab CQ: SW224728 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/6960 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update Core Scratch Reg 6 with L3 vs Mainstore for FSP to queryMissy Connell2013-03-261-0/+13
| | | | | | | | | RTC:64829 Change-Id: Ic8e7983f6838b79c359c4cee2647b7676493cb1e Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3564 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Load a fake payloadPatrick Williams2013-03-261-0/+1
| | | | | | | | | | | | | | | | | Support loading a fake payload that simply naps all the threads. I am not enabling this via the simics_MACHINE.system.xml files because it causes drastic usability concerns for developers wanting to use the debug tools. When the payload is launched, the HRMOR changes, which means the debug tools no longer point at Hostboot. Change-Id: Ic899cf96af4d315f01c0ca4b7fc99e97c15d4dc1 RTC: 43029 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3642 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support RPR register.Patrick Williams2013-01-141-1/+15
| | | | | | | | | | | | | | | | | | | | For P8 the priority of different threads has no effect unless the relative priority register is programmed to tell the relative scheduling weight of the different priorities. We will now be programming the RPR to give 32x performance boost to "high" priority threads relative to "low" priority. This means that when a thread is waiting on another, and thus has low priority, it will get 32x less dispatch cycles then the thread it is waiting on. Change-Id: I0d1d1052b12ab8bd5612aa4580cd85b5c238f885 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2888 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Mark W. Wenning <wenning@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Memory profiling tools.Patrick Williams2012-09-071-1/+2
| | | | | | | | | | Change-Id: I4a9cfc1f55c09ff6d02dce80889ac2e3150ab137 RTC: 44504 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1619 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Set "high" thread priority as 2 rather than 3.Patrick Williams2012-09-051-24/+23
| | | | | | | | | | | | | | | | | | | | | The Power processor has instructions of the form 'or a,a,a' that allow code to change the priority of a hw-thread relative to the others. We initially used 'or 1,1,1' as low priority and 'or 3,3,3' as high priority. This is used in, for instance, spinlocks to reduce the priority of a hw-thread while waiting for another thread to perform an activity. This code originally came from HAL. In reading the Power ISA closer I realized that 'or 3,3,3' has no effect when in user-space code, which means that a spinlock-like effect in user code is going to end up with the thread stuck at low priority until the next context switch. To prevent this we are going to change from 1/3 to 1/2 as the priority levels. Change-Id: I60ee866cde37499106f5e1e1d68a0b5ddeedf403 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1569 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support for master winkle.Patrick Williams2012-08-101-2/+12
| | | | | | | | | RTC: 44730 Change-Id: Ifaeecc659e1bfd8ded4744dc591fc993471519ba Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1471 Tested-by: Jenkins Server Reviewed-by: Mark W. Wenning <wenning@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* cpu_spr_value syscall for SLW image build.Patrick Williams2012-07-181-22/+46
| | | | | | | | | | | | Task 44887 Change-Id: If87b6e80b974bb4cbff13844d8a3f055a17282d2 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1378 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Mark W. Wenning <wenning@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support for core_activate via IPI.Patrick Williams2012-07-161-0/+6
| | | | | | | | RTC: 37009 Change-Id: I56669805c86d9659a20ad7c26e5e9860c7a248c7 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1087 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Initial attention handler support.Brad Bishop2012-07-161-1/+2
| | | | | | | | RTC: 40764 Change-Id: Ic5b5b3e80915cb4f0ee543baa6fe4abc51e07ad2 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1079 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Code optimizations.Patrick Williams2012-04-161-15/+27
| | | | | | | | | | | | | | - Reduce DCBZ and ICBI calls in memory copy and init functions. - Reduce strlen calls in trace. - Set thread to low priority while waiting on in-kernel barrier. Change-Id: Ic9c23b1e26797ff393e5862819830de60554747e Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/871 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Simics continuous traceMonte Copeland2012-01-111-0/+60
| | | | | | | | | Change-Id: I5f5d9c30b4cc0f0d8704fb99c10757e0f41018bf Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/603 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Reviewed-by: Mark W. Wenning <wenning@us.ibm.com> Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
* Add copyright headers to all source files.Patrick Williams2011-08-241-0/+22
| | | | | | | Change-Id: I205f2409e56032cfc0aaf01d7e26d357f0b86373 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/277 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: Jenkins Server
* Virtual File System module load and unloaddgilbert2011-08-171-0/+7
| | | | | | | | Change-Id: Iaa6a256a8a15ac48bfba5bc1cab292c5ac246166 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/253 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update scratch SPR #s for P8.Patrick Williams2011-08-101-29/+0
| | | | | | | | Change-Id: Ia063a66b705b3272b7578ece420c84ac9c4c3d26 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/224 Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server
* Clean up mutex issues.Patrick Williams2011-08-091-5/+4
| | | | | | | | | | | | | - Final fix for mutex bug. - Document weak-consistency decisions in mutex code. - Prevent aggressive optimizations around lwsync/isync instrs. - Fix minor bug in futex_wait system call. - Optimize futex path with likely/unlikely hints. Change-Id: I26b54dee7e45bcb42195f730474b350b44f53cfc Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/233 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add handling for HvEmu exception.Patrick Williams2011-08-011-11/+50
| | | | | | | | Change-Id: I03a7460b347b47f4653a6f457d1d7711fc0a0512 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/209 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: MATTHEW S. BARTH <msbarth@us.ibm.com>
* Shutdown and post status on HostBoot completionMike Jones2011-07-191-0/+35
| | | | | | | | Change-Id: If2ab46af85065b29695a1186ed331fd835944eb4 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/204 Tested-by: Jenkins Server Reviewed-by: Mark W. Wenning <wenning@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Move inline mtdec into arch/ppc.HPatrick Williams2011-04-211-0/+7
| | | | | | | | Change-Id: I65b2be9a5a5166cd946033e34cedd87345e55979 Reviewed-on: http://gfwr801.rchland.ibm.com:8080/gerrit/4 Tested-by: Jenkins Server Tested-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
* VBU: dcbz cache lines after code image to ensure they are in the L3.Patrick Williams2011-04-071-0/+7
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* Merge of PowerHAL project up to commit:Patrick Williams2011-03-051-0/+174
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