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* Fix simulation get all registers commandBill Hoffa2018-01-301-2/+2
| | | | | | | | | | | | | - The name of the cpu simulation object changed Change-Id: Ibb1f556fdc612f635a930a1dd047c807f17f8462 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52939 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Use effective fabric position for LPC operations in the bootloaderMarty Gloff2017-06-081-1/+21
| | | | | | | | | | | | | | | | | | | When the LPC BAR value is supplied in the SBE to BL structure, use it as the base LPC address, otherwise, still use the LPC constant. Save the value being used in the Bootloader data (which is reorganized to align data blocks on boundaries). Also add hb-bldata to parse out the Bootloader data. Change-Id: I1db19467464b90e0190c4df5f7404624c9423eb5 RTC: 173525 Depends-on: I2b0d1959c303df8c9c28c8f0a5b5be1e77aa154f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40217 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Create Tool to Debug Bootloader IssuesMarty Gloff2016-05-101-1/+21
| | | | | | | | | | | | | | Create a Bootloader Trace parser under the hb tools in order to determine if Bootloader ran and to see what it ran. Change-Id: Ibfb8c95ac6565169f822a4092c028aceb7923b87 RTC: 152484 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23695 Tested-by: Jenkins Server Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Base kernel changes for Nimbus/CumulusCorey Swenson2015-12-111-2/+4
| | | | | | | | | Change-Id: Ic5dfde1e975453d760631335bab674919e1109e7 RTC: 126637 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18321 Tested-by: Jenkins Server Reviewed-by: Christian Geddes <crgeddes@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Change copyright prolog for all files to Apache.Patrick Williams2014-05-211-10/+10
| | | | | | | Change-Id: I5664587b4f889099290ef50d50fa9ce5e580e1eb Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11167 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* hb-istep does not work when listing a range of named stepsMike Jones2014-03-131-3/+3
| | | | | | | | | | Change-Id: I6544b475446bf07e6d56d571534d06147218f476 RTC: 99671 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9500 Tested-by: Jenkins Server Reviewed-by: William H. Schwartz <whs@us.ibm.com> Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Tweaks for simics scriptsDan Crowell2013-08-091-6/+7
| | | | | | | | | | | | 1) Moved hardcoded cpu to 1 place only 2) Attempt to use Simics commands for masterproc Change-Id: If6bb1f60342d16da54cb558a4092425da2ed1215 RTC: 51267 CQ: SW214903 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5509 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support SPIRA-H HDAT FormatDan Crowell2013-07-301-0/+41
| | | | | | | | | | Change-Id: If87eedf15c1ef96ea00c1a5574ad1f6b72e697b5 RTC: 71881 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5498 Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Enhance hb-dump to support full memory extraction.Patrick Williams2013-07-101-39/+2
| | | | | | | | | | Change-Id: I74823572a4935d3c8c4d7999d8c00c0286de1523 RTC: 50233 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5170 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Triggering Hostboot Shutdown when PNOR is badAdam Muhle2013-02-041-1/+1
| | | | | | | | | | | | | Updating the doShutdown path to support receiving a reason code as input. Then changing PNOR RP to issue a shutdown when problems are detected with the PNOR Partition table. RTC: 44146 Change-Id: Ib4111d0a91f53d90fa100422a1463539897598e6 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3024 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* HRMOR fixes for hb-dump.Patrick Williams2013-01-091-18/+27
| | | | | | | | | Change-Id: Iedaa42e227172ea7fdfe175b4343c4a269a44b73 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2905 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support for core_activate via IPI.Patrick Williams2012-07-161-3/+5
| | | | | | | | RTC: 37009 Change-Id: I56669805c86d9659a20ad7c26e5e9860c7a248c7 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1087 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support P8 memory map from PHYPPatrick Williams2012-06-011-2/+2
| | | | | | | | | Change-Id: I19e5c373713b6e8b12386266c5c2c3a015068d5a Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1132 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Pick up Simics FSI fixes for multiple chipsDan Crowell2012-05-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | Updating the Simics level to get FSI fixes to allow multiple chips to work. This also allows us to remove some previous workarounds. The new Simics build pulled in a different PNOR so needed to disable some of the tests. The new Simics build also modified some of the L3 objects so changes were required to some debug tools. Had to update the VENICE config since Ched rewired it to look like MURANO/Tuleta. Testing: Verified 2-proc, 4-centaur MURANO config Verified 2-proc, 4-centaur VENICE config Change-Id: I6aaaf8aad2f82dbfffb8ade551d545bedaa3e048 RTC: 41305 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1066 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* hb-istep in debug frameworkMark Wenning2012-05-211-546/+24
| | | | | | | | Change-Id: I21d95952e526e3ade6399c2f7e022e0897ae4610 RTC: 38308 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/959 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add IStep Stubs for all ISteps in IPL Flow DocumentMark Wenning2012-04-171-12/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add stubs for all remaining ISteps, based on HostBoot_IPL_Flow_v1.01.odt document. Task 39253 1 -5 Not applicable, performed by SBE 6 - Save SBE (HWAS) ALL, Brian is moving some of them from 4 7 - Start Clocks on Nest Chiplets ALL 8 - EDI, EI init ALL 9 - Activate PowerBus ALL 10 - Centaur Init already implemented 11 - DMI Training already implemented 12 - MC Init already Implemented 13 - Dram Training already Implemented 14 - Dram Initialization ALL 15 - Build Winkle Images ALL 16 - Core Activate ALL 17 - Init PSI marked FSP, not implemented 18 - Establish System SMP 18.8, 9, 10 only, the rest are marked FSP 19 - Build and Load Host Image marked FSP, not implemented 20 - Load Payload ALL 21 - Start Payload ALL RTC: 38196 Change-Id: I4e853f58caafe7dd472d57b42883724eaaa2e8a3 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/826 Tested-by: Jenkins Server Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Implement FSP MailboxMark Wenning2012-04-091-32/+49
| | | | | | | | | | | | | Modify IStepDisp to communicate over the mailbox Q to FSP. If there is no FSP, spin off a task to emulate FSP and communicate with the hb-istep user console on VPO or Simics. RTC: 38871 Change-Id: I2a75a05fbdc559db516a711bff46a49e82580bb0 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/812 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Patch for HWAS to work with hb-istepMark Wenning2012-04-061-6/+1
| | | | | | | | | | | | | HWAS stubs (istep 6) are numbered 3, 5, and 6 but are in the table as 0,1,2 . When hb-istep calls istep 6.3 it will get a "not found" error. Short term solution for this sprint is to renumber the stubs to 0,1,2 . This will be fixed permanently in another patch Add IStep Stubs for all ISteps in IPL Flow Document (task 39253) Change-Id: I7647c4405e1a19a83fe35af5ca6152b6585123d4 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/834 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Increase simics and AWAN timeouts for hb-stepMark Wenning2012-03-151-2/+4
| | | | | | | | | | | | - branch increase_simics_timeout review fixes Change-Id: Id2ee35f3d51ad040f68d8502ff11bcf36640be2a RTC: none Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/724 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* FAPI breakpoint external interface implementationDoug Gilbert2012-03-051-18/+62
| | | | | | | Change-Id: I2d18e87cb8ce250935a129e3567b09e12ce191d8 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/699 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Create framework for ISTEP 10, 12, 13Mark Wenning2012-02-291-3/+7
| | | | | | | | | | | | | | | | | | | | | | istep framework for istep 10 (sbe_centaur_init) istep 12( mss_volt, etc). istep 13 ( mss_draminit, etc ) Commented out testHWP, not used anymore. Fixed bug in hb-istep for simics fixed review comments Added section in genIstep.pl to generate include/usr/isteps/istepNlist.H ( istep 13 generated using script) NOTE: 10, 11, 12 were partially generated manually, that is why they are not consistent. Change-Id: I28ed8d3e60d2d0438ebe7ca3ed2053c781bc72ed Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/661 Tested-by: Jenkins Server Reviewed-by: Van H. Lee <vanlee@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* istep breakpoint supportDoug Gilbert2012-02-031-2/+36
| | | | | | | Change-Id: I592c617963f810209a9ab76345a8c568d14af62c Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/629 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
* RTC4420 SPless on VPOMark Wenning2012-01-201-17/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify SPLess code to use memory-mapped locations instead of SCOM scratchpad regs - Debug Framework does not support this at this time. VBU_Cacheline.pm is intended to be a module to read a single 64-bit word (which will be the spless command, status, and istepmode regs) from L3 memory within the AWAN model. CLread() will read the cacheline (at 128-byte boundaries) and then extract the quadword from the offet within the cacheline. CLwrite() will read/modify/write the quadword and cacheline. Note: There is a code block within VBU_Cacheline.pm called TEST - this returns dummy values to CLread and CLwrite so that I can run the perl script on a local system without connecting to simics or AWAN. It is not normally used. hb_istep is meant to be run after running a modified version of Jim McGuire's do_p8vbu_script_hbi-Sprint7 . See my public directory /gsa/ausgsa/home/w/e/wenning/Public/HBI/scripts for the modified script. These changes will be merged back into Jim McGuire's script later. The modified version loads the binaries into L3, sets up all the rest of the environment, and then exits BEFORE going into the execution loop. At that point, the user should run hb-istep --istepmode to set HostBoot up to run IStep SPLess (Single Step) . The user can then run hb-istep commands to execute isteps, etc. hb-istep use is documented on the wiki at https://w3-connections.ibm.com/wikis/home?lang=en_US#/wiki/Host%20Boot/page/HB%20ISteps%20on%20AWAN Please look there for updates. - first commit, branch vbu2 - modify spless to use memory locations instead of SCOM regs - add VBU_Cacheline.pm - archive temporary version of do_p8vbu_script_hbi-mark until we can get the hb-istep hooks into Jim McGuire's scripts - add test calls to VBU_Cacheline.pm - change flush call to Joe McGills "quiet" version - add note that p8_ins* calls are in Jim McGuires dir and will be replaced by the "official" ones soon. - experiment with git notes command, sorry for the thrash - add check to see if VPO is STOPPED before accessing anything - partial review fixes - blocked on model: can't test Change-Id: I07431dc525844c5c504175d92eae113457eac063 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/592 Tested-by: Jenkins Server Reviewed-by: CAMVAN T. NGUYEN <ctnguyen@us.ibm.com> Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
* RTC3594: Improve SPLess OperationMark Wenning2011-12-061-203/+330
| | | | | | | | | | | | | | | | - branch spless3 - reorganize command and status regs - add seqnum - rewrite spless handler - add scanistepnames.pl code to extract istep names - modify hb-simdebug.py to read istep names - review fixes - add workaround for vbu Change-Id: I0f8f991ccbaa822ef5ab672279c3c206e6b7b2e3 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/523 Tested-by: Jenkins Server Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
* Interactive debug tool.Patrick Williams2011-12-061-32/+65
| | | | | | | | | | | | | | | - Modify debug fw to support writing data. - Modify debug fw to support clocking model forward. - Add simics environment support for both. - Kernel support to start a task when directed. - Write debug tool to modify kernel structure for debug. Change-Id: Ic001dfd45f91392aefbc9d5096c5344018d5190e Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/518 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* DbgFw: save tool output to file in simics.Patrick Williams2011-11-181-3/+5
| | | | | | | Change-Id: Ib796caecac77df68012c79fce481445ba171d7ed Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/507 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* RTC4287: Access PNOR to read IStep Mode AttributeMark Wenning2011-11-181-73/+94
| | | | | | | | | | | | | | - initial commit - fix script to work with changes in simics, to test - review fixes - review fixes 2 - add extra command to set (nonvolatile) ISTEP_MODE to OFF - review fixes 3 - minor fixes, remove unit test Change-Id: I9a1b7582da26a272393e3ea6c87c6979d0ea7c11 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/499 Tested-by: Jenkins Server Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Errl.pm for error log handling via perl debug frameworkMonte Copeland2011-11-161-152/+84
| | | | | | | | Change-Id: Idf79ba5e147afba2d98e926b73263adf9714e604 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/489 Tested-by: Jenkins Server Reviewed-by: Monte K. Copeland <copelanm@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Simics implementation of debug framework.Patrick Williams2011-11-161-238/+3
| | | | | | | | | Change-Id: Ie9f6963070ced0a39c2e62f685c79d6da01fdcdb Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/488 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Monte K. Copeland <copelanm@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Error log changes for Sprint 6Monte Copeland2011-10-311-4/+4
| | | | | | | | Change-Id: I44ad678cfae8cd84e5370391dc7e20d74f59c9ca Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/449 Tested-by: Jenkins Server Reviewed-by: Mark W. Wenning <wenning@us.ibm.com> Reviewed-by: Monte K. Copeland <copelanm@us.ibm.com>
* Simics command for single-thread mode.Patrick Williams2011-10-061-0/+12
| | | | | | | | | Change-Id: I74b49c7bd9647d31603a08ffbc14f21ef579cfc1 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/395 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: CAMVAN T. NGUYEN <ctnguyen@us.ibm.com> Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
* Added function to dump and parse error logs to hostboot dump and parse tools.CamVan Nguyen2011-09-141-73/+67
| | | | | | | | | | Added new tools hb-trace, hb-errl, hb-printk, hb-dump for vbu/vpo debug. Added support for ecmd options, more error checking and misc enhancements. Change-Id: I8f5ed666a1d99ff894015e07a20595fcac8727b5 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/343 Tested-by: Jenkins Server Reviewed-by: CAMVAN T. NGUYEN <ctnguyen@us.ibm.com>
* Add function to dump and parse error logs in SIMICS to python scriptCamVan Nguyen2011-08-231-16/+125
| | | | | | | Change-Id: I5f475a83943b29ccc30e56535b4b9402ac364f28 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/274 Tested-by: Jenkins Server Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
* RTC3582: Allow control of ISTEPs within HostBoot: "hb-istep" commands in ↵Mark Wenning2011-08-171-0/+587
python script to drive Simics and VBU console - initial commit - working version - comment out debug prints - name/path of traceHB.py changed, had to change citest - fixes after review - fixes after review2 Change-Id: I5da961106052ae0b50bdaf68556a42538f2a8a40 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/258 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Reviewed-by: CAMVAN T. NGUYEN <ctnguyen@us.ibm.com>
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