summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/include/usr/hwpf/plat/fapiPlatReasonCodes.H20
-rw-r--r--src/include/usr/mvpd/mvpdenums.H33
-rw-r--r--src/include/usr/pnor/pnorif.H12
-rw-r--r--src/usr/hwpf/hwp/thread_activate/thread_activate.C177
-rwxr-xr-xsrc/usr/mvpd/mvpd.H7
-rwxr-xr-xsrc/usr/mvpd/test/mvpdtest.H39
-rw-r--r--src/usr/pnor/pnordd.C29
-rw-r--r--src/usr/pnor/pnordd.H11
-rw-r--r--src/usr/runtime/populate_attributes.C8
9 files changed, 303 insertions, 33 deletions
diff --git a/src/include/usr/hwpf/plat/fapiPlatReasonCodes.H b/src/include/usr/hwpf/plat/fapiPlatReasonCodes.H
index 4ea439e17..9029a6853 100644
--- a/src/include/usr/hwpf/plat/fapiPlatReasonCodes.H
+++ b/src/include/usr/hwpf/plat/fapiPlatReasonCodes.H
@@ -50,7 +50,7 @@ namespace fapi
MOD_ATTR_GET_TARGET_NAME = 0x0B,
MOD_FAPI_GET_ASSOCIATE_DIMMS = 0x0C,
MOD_EDI_EI_IO_RUN_TRAINING = 0x0D,
- MOD_THREAD_ACTIVATE = 0x0E, //@fixme RTC:42816
+ MOD_THREAD_ACTIVATE = 0x0E,
MOD_ATTR_GET_FUNCTIONAL = 0x0F,
MOD_ATTR_GET_HB_TARGET = 0x10,
MOD_ATTR_PROC_MEMBASE_GET = 0x11,
@@ -77,6 +77,7 @@ namespace fapi
MOD_ATTR_PROC_PCIE_BAR_SIZE_GET = 0x26,
MOD_MVPD_ACCESS = 0x27,
MOD_EXIT_CACHE_CONTAINED = 0x28,
+ MOD_GET_CACHE_DECONFIG = 0x29,
};
/**
@@ -104,15 +105,14 @@ namespace fapi
RC_SAME_CHIP_PBUS_CONNECTION = HWPF_COMP_ID | 0x1A,
RC_CONFLICT_PBUS_CONNECTION = HWPF_COMP_ID | 0x1B,
RC_NO_MASTER_CORE_TARGET = HWPF_COMP_ID | 0x1C,
- RC_THREAD_IN_WRONG_STATE = HWPF_COMP_ID | 0x1D, //@fixme RTC:42816
- RC_THREAD_DID_NOT_START = HWPF_COMP_ID | 0x1E, //@fixme RTC:42816
- RC_NULL_FAPI_TARGET = HWPF_COMP_ID | 0x1F,
- RC_UNEXPECTED_TARGET_TYPE = HWPF_COMP_ID | 0x20,
- RC_ATTR_UNKNOWN_TARGET_NAME = HWPF_COMP_ID | 0x21,
- RC_ATTR_UNSUPPORTED_PROC_NUM = HWPF_COMP_ID | 0x22,
- RC_INVALID_RECORD = HWPF_COMP_ID | 0x23,
- RC_INVALID_KEYWORD = HWPF_COMP_ID | 0x24,
- RC_MM_EXTEND_FAILED = HWPF_COMP_ID | 0x25,
+ RC_NULL_FAPI_TARGET = HWPF_COMP_ID | 0x1D,
+ RC_UNEXPECTED_TARGET_TYPE = HWPF_COMP_ID | 0x1E,
+ RC_ATTR_UNKNOWN_TARGET_NAME = HWPF_COMP_ID | 0x1F,
+ RC_ATTR_UNSUPPORTED_PROC_NUM = HWPF_COMP_ID | 0x20,
+ RC_INVALID_RECORD = HWPF_COMP_ID | 0x21,
+ RC_INVALID_KEYWORD = HWPF_COMP_ID | 0x22,
+ RC_MM_EXTEND_FAILED = HWPF_COMP_ID | 0x23,
+ RC_INCORRECT_KEWORD_SIZE = HWPF_COMP_ID | 0x24,
};
/**
diff --git a/src/include/usr/mvpd/mvpdenums.H b/src/include/usr/mvpd/mvpdenums.H
index 5f2fa4319..00fbfafe5 100644
--- a/src/include/usr/mvpd/mvpdenums.H
+++ b/src/include/usr/mvpd/mvpdenums.H
@@ -54,19 +54,25 @@ enum mvpdRecord
LRP9 = 0x0c,
LRPA = 0x0d,
LRPB = 0x0e,
- LWP0 = 0x0f,
- LWP1 = 0x10,
- LWP2 = 0x11,
- LWP3 = 0x12,
- LWP4 = 0x13,
- LWP5 = 0x14,
- LWP6 = 0x15,
- LWP7 = 0x16,
- LWP8 = 0x17,
- LWP9 = 0x18,
- LWPA = 0x19,
- LWPB = 0x1a,
- VWML = 0x1b,
+ LRPC = 0x0f,
+ LRPD = 0x10,
+ LRPE = 0x11,
+ LWP0 = 0x12,
+ LWP1 = 0x13,
+ LWP2 = 0x14,
+ LWP3 = 0x15,
+ LWP4 = 0x16,
+ LWP5 = 0x17,
+ LWP6 = 0x18,
+ LWP7 = 0x19,
+ LWP8 = 0x1a,
+ LWP9 = 0x1b,
+ LWPA = 0x1c,
+ LWPB = 0x1d,
+ LWPC = 0x1e,
+ LWPD = 0x1f,
+ LWPE = 0x20,
+ VWML = 0x21,
// Last Record
MVPD_LAST_RECORD,
@@ -115,6 +121,7 @@ enum mvpdKeyword
pdG = 0x1f,
MK = 0x20,
PB = 0x21,
+ CH = 0x22,
// Last Keyword
MVPD_LAST_KEYWORD,
diff --git a/src/include/usr/pnor/pnorif.H b/src/include/usr/pnor/pnorif.H
index 533c7f932..4f3b5d930 100644
--- a/src/include/usr/pnor/pnorif.H
+++ b/src/include/usr/pnor/pnorif.H
@@ -99,6 +99,18 @@ errlHndl_t getSectionInfo( SectionId i_section,
SideSelect i_side,
SectionInfo_t& o_info );
+/**
+ * @brief Informs caller if PNORDD is using
+ * L3 Cache for fake PNOR or not.
+ *
+ * @return Indicate state of fake PNOR
+ * true = PNOR DD is using L3 Cache for fake PNOR
+ * false = PNOR DD not using L3 Cache for fake PNOR
+ */
+bool usingL3Cache();
}
+
+
+
#endif
diff --git a/src/usr/hwpf/hwp/thread_activate/thread_activate.C b/src/usr/hwpf/hwp/thread_activate/thread_activate.C
index 5c192e7ec..747829427 100644
--- a/src/usr/hwpf/hwp/thread_activate/thread_activate.C
+++ b/src/usr/hwpf/hwp/thread_activate/thread_activate.C
@@ -53,10 +53,181 @@
#include <hwpf/plat/fapiPlatReasonCodes.H>
#include <hwpf/plat/fapiPlatTrace.H>
+#include <pnor/pnorif.H>
+#include <mvpd/mvpdenums.H>
namespace THREAD_ACTIVATE
{
+/**
+ * @brief This function will query MVPD and figure out if the master
+ * core has a fully configured cache or not..
+ *
+ * @param[in] i_masterCoreId - Core number of the core we're running on.
+ *
+ *
+ * @return bool - Indicates if half of cache is deconfigured or not.
+ * true - half cache deconfigured, only 4MB available
+ * false -> No Cache deconfigured, 8MB available.
+*/
+bool getCacheDeconfig(uint64_t i_masterCoreId)
+{
+ TRACFCOMP( g_fapiImpTd,
+ "Entering getCacheDeconfig, i_masterCoreId=0x%.8X",
+ i_masterCoreId);
+
+ //CH Keyword in LPRx Record of MVPD contains the Cache Deconfig State
+ //the x in LPRx is the core number.
+
+ errlHndl_t l_errl = NULL;
+ bool cacheDeconfig = true;
+ uint64_t theRecord = 0x0;
+ uint64_t theKeyword = MVPD::CH;
+ uint8_t * theData = NULL;
+ size_t theSize = 0;
+ TARGETING::Target* l_procTarget = NULL;
+
+ do {
+ // Target: Find the Master processor
+ TARGETING::targetService().masterProcChipTargetHandle(l_procTarget);
+ assert(l_procTarget != NULL);
+
+ //Convert core number to LPRx Record ID.
+ //TODO: use a common utility function for conversion. RTC: 60552
+ switch (i_masterCoreId)
+ {
+ case 0x0:
+ theRecord = MVPD::LRP0;
+ break;
+ case 0x1:
+ theRecord = MVPD::LRP1;
+ break;
+ case 0x2:
+ theRecord = MVPD::LRP2;
+ break;
+ case 0x3:
+ theRecord = MVPD::LRP3;
+ break;
+ case 0x4:
+ theRecord = MVPD::LRP4;
+ break;
+ case 0x5:
+ theRecord = MVPD::LRP5;
+ break;
+ case 0x6:
+ theRecord = MVPD::LRP6;
+ break;
+ case 0x7:
+ theRecord = MVPD::LRP7;
+ break;
+ case 0x8:
+ theRecord = MVPD::LRP8;
+ break;
+ case 0x9:
+ theRecord = MVPD::LRP9;
+ break;
+ case 0xA:
+ theRecord = MVPD::LRPA;
+ break;
+ case 0xB:
+ theRecord = MVPD::LRPB;
+ break;
+ case 0xC:
+ theRecord = MVPD::LRPC;
+ break;
+ case 0xD:
+ theRecord = MVPD::LRPE;
+ break;
+ case 0xE:
+ theRecord = MVPD::LRPE;
+ break;
+ default:
+ TRACFCOMP( g_fapiImpTd,
+ "getCacheDeconfig: No MVPD Record for core 0x%.8X",
+ i_masterCoreId);
+ /*@
+ * @errortype
+ * @moduleid fapi::MOD_GET_CACHE_DECONFIG
+ * @reasoncode fapi::RC_INVALID_RECORD
+ * @userdata1 Master Core Number
+ * @userdata2 Master processor chip huid
+ * @devdesc getCacheDeconfig> Master core is not mapped
+ * to a LRPx Module VPD Record.
+ */
+ l_errl = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE,
+ fapi::MOD_GET_CACHE_DECONFIG,
+ fapi::RC_INVALID_RECORD,
+ i_masterCoreId,
+ TARGETING::get_huid(l_procTarget));
+ break;
+ }
+
+ //First call is just to get the Record size.
+ l_errl = deviceRead(l_procTarget,
+ NULL,
+ theSize,
+ DEVICE_MVPD_ADDRESS( theRecord,
+ theKeyword ) );
+ if( l_errl ) { break; }
+
+ if(theSize != 1)
+ {
+ /*@
+ * @errortype
+ * @moduleid fapi::MOD_GET_CACHE_DECONFIG
+ * @reasoncode fapi::RC_INCORRECT_KEWORD_SIZE
+ * @userdata1 Master Core Number
+ * @userdata2 CH Keyword Size
+ * @devdesc getCacheDeconfig> LRPx Record, CH keyword
+ * is incorrect size
+ */
+ l_errl = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE,
+ fapi::MOD_GET_CACHE_DECONFIG,
+ fapi::RC_INCORRECT_KEWORD_SIZE,
+ i_masterCoreId,
+ theSize);
+ break;
+ }
+
+ theData = static_cast<uint8_t*>(malloc( theSize ));
+
+ //2nd call is to get the actual data.
+ l_errl = deviceRead(l_procTarget,
+ theData,
+ theSize,
+ DEVICE_MVPD_ADDRESS( theRecord,
+ theKeyword ) );
+ if( l_errl ) { break; }
+
+
+ if(0 == theData[0])
+ {
+ cacheDeconfig = false;
+ }
+
+ } while(0);
+
+ if(NULL != theData)
+ {
+ free(theData);
+ }
+
+ if(NULL != l_errl)
+ {
+ //TODO: We may not be able to run with only 4MB
+ // in the long run so need to revist this after
+ // we no longer have to deal with parital good
+ // bringup chips. RTC: 60620
+
+ //Not worth taking the system down, just assume
+ //we only have half the cache available.
+ errlCommit(l_errl,HWPF_COMP_ID);
+ cacheDeconfig = true;
+ }
+
+ return cacheDeconfig;
+}
+
void activate_threads( errlHndl_t& io_rtaskRetErrl )
{
@@ -221,9 +392,11 @@ void activate_threads( errlHndl_t& io_rtaskRetErrl )
}
// Reclaim remainder of L3 cache if available.
- // TODO: RTC 49137: Add calls to MVPD and PNOR to make decision.
- if (!TARGETING::is_vpo())
+ if ((!PNOR::usingL3Cache()) &&
+ (!getCacheDeconfig(l_masterCoreID)))
{
+ TRACFCOMP( g_fapiTd,
+ "activate_threads: Extending cache to 8MB" );
mm_extend(MM_EXTEND_FULL_CACHE);
}
diff --git a/src/usr/mvpd/mvpd.H b/src/usr/mvpd/mvpd.H
index 958135fbd..82a8fd4a5 100755
--- a/src/usr/mvpd/mvpd.H
+++ b/src/usr/mvpd/mvpd.H
@@ -109,6 +109,9 @@ const mvpdRecordInfo mvpdRecords[] =
{ LRP9, "LRP9" },
{ LRPA, "LRPA" },
{ LRPB, "LRPB" },
+ { LRPC, "LRPC" },
+ { LRPD, "LRPD" },
+ { LRPE, "LRPE" },
{ LWP0, "LWP0" },
{ LWP1, "LWP1" },
{ LWP2, "LWP2" },
@@ -121,6 +124,9 @@ const mvpdRecordInfo mvpdRecords[] =
{ LWP9, "LWP9" },
{ LWPA, "LWPA" },
{ LWPB, "LWPB" },
+ { LWPC, "LWPC" },
+ { LWPD, "LWPD" },
+ { LWPE, "LWPE" },
{ VWML, "VWML" },
// -------------------------------------------------------------------
// DO NOT USE!! This is for test purposes ONLY!
@@ -173,6 +179,7 @@ const mvpdKeywordInfo mvpdKeywords[] =
{ pdG, "#G" },
{ MK, "MK" },
{ PB, "PB" },
+ { CH, "CH" },
// -------------------------------------------------------------------
// DO NOT USE!! This is for test purposes ONLY!
{ MVPD_TEST_KEYWORD, "TEST" },
diff --git a/src/usr/mvpd/test/mvpdtest.H b/src/usr/mvpd/test/mvpdtest.H
index 4befd407c..059b81c0c 100755
--- a/src/usr/mvpd/test/mvpdtest.H
+++ b/src/usr/mvpd/test/mvpdtest.H
@@ -87,52 +87,79 @@ mvpdTestData mvpdData[] =
{ LRP0, pdV },
{ LRP0, pdP },
{ LRP0, pdM },
+ { LRP0, CH },
{ LRP1, VD },
{ LRP1, pdV },
{ LRP1, pdP },
{ LRP1, pdM },
+ { LRP1, CH },
{ LRP2, VD },
{ LRP2, pdV },
{ LRP2, pdP },
{ LRP2, pdM },
+ { LRP2, CH },
{ LRP3, VD },
{ LRP3, pdV },
{ LRP3, pdP },
{ LRP3, pdM },
+ { LRP3, CH },
*/
{ LRP4, VD },
{ LRP4, pdV },
{ LRP4, pdP },
{ LRP4, pdM },
+ { LRP4, CH },
{ LRP5, VD },
{ LRP5, pdV },
{ LRP5, pdP },
{ LRP5, pdM },
+ { LRP5, CH },
{ LRP6, VD },
{ LRP6, pdV },
{ LRP6, pdP },
{ LRP6, pdM },
+ { LRP6, CH },
/* // TODO no LRP7,LRP8,LRP9,LRPA,LRPB,LWPO,LWP1,LWP2,LWP3 in test data, pull for now RTC 51716
{ LRP7, VD },
{ LRP7, pdV },
{ LRP7, pdP },
{ LRP7, pdM },
+ { LRP7, CH },
{ LRP8, VD },
{ LRP8, pdV },
{ LRP8, pdP },
{ LRP8, pdM },
+ { LRP8, CH },
{ LRP9, VD },
{ LRP9, pdV },
{ LRP9, pdP },
{ LRP9, pdM },
+ { LRP9, CH },
{ LRPA, VD },
{ LRPA, pdV },
{ LRPA, pdP },
{ LRPA, pdM },
+ { LRPA, CH },
{ LRPB, VD },
{ LRPB, pdV },
{ LRPB, pdP },
{ LRPB, pdM },
+ { LRPB, CH },
+ { LRPC, VD },
+ { LRPC, pdV },
+ { LRPC, pdP },
+ { LRPC, pdM },
+ { LRPC, CH },
+ { LRPD, VD },
+ { LRPD, pdV },
+ { LRPD, pdP },
+ { LRPD, pdM },
+ { LRPD, CH },
+ { LRPE, VD },
+ { LRPE, pdV },
+ { LRPE, pdP },
+ { LRPE, pdM },
+ { LRPE, CH },
{ LWP0, VD },
{ LWP0, pd2 },
{ LWP0, pd3 },
@@ -183,6 +210,18 @@ mvpdTestData mvpdData[] =
{ LWPB, pd2 },
{ LWPB, pd3 },
{ LWPB, IN },
+ { LWPC, VD },
+ { LWPC, pd2 },
+ { LWPC, pd3 },
+ { LWPC, IN },
+ { LWPD, VD },
+ { LWPD, pd2 },
+ { LWPD, pd3 },
+ { LWPD, IN },
+ { LWPE, VD },
+ { LWPE, pd2 },
+ { LWPE, pd3 },
+ { LWPE, IN },
*/
{ VINI, DR },
{ VINI, VZ },
diff --git a/src/usr/pnor/pnordd.C b/src/usr/pnor/pnordd.C
index 0f4f3e29d..043f4ce39 100644
--- a/src/usr/pnor/pnordd.C
+++ b/src/usr/pnor/pnordd.C
@@ -160,6 +160,19 @@ errlHndl_t ddWrite(DeviceFW::OperationType i_opType,
return l_err;
}
+/**
+ * @brief Informs caller if PNORDD is using
+ * L3 Cache for fake PNOR or not.
+ *
+ * @return Indicate state of fake PNOR
+ * true = PNOR DD is using L3 Cache for fake PNOR
+ * false = PNOR DD not using L3 Cache for fake PNOR
+ */
+bool usingL3Cache()
+{
+ return Singleton<PnorDD>::instance().usingL3Cache();
+}
+
// Register PNORDD access functions to DD framework
DEVICE_REGISTER_ROUTE(DeviceFW::READ,
DeviceFW::PNOR,
@@ -527,8 +540,24 @@ void PnorDD::sfcInit( )
{
errlCommit(l_err,PNOR_COMP_ID);
}
+}
+bool PnorDD::usingL3Cache( )
+{
+ TRACDCOMP(g_trac_pnor,
+ "PnorDD::usingL3Cache> iv_mode=0x%.8x", iv_mode );
+ //If we are in one of the fake PNOR modes,
+ //than we are using L3 CAche
+ if( (MODEL_MEMCPY == iv_mode) ||
+ (MODEL_LPC_MEM == iv_mode) )
+ {
+ return true;
+ }
+ else
+ {
+ return false;
+ }
}
/**
diff --git a/src/usr/pnor/pnordd.H b/src/usr/pnor/pnordd.H
index e118f12a6..105f0cfa3 100644
--- a/src/usr/pnor/pnordd.H
+++ b/src/usr/pnor/pnordd.H
@@ -72,6 +72,17 @@ class PnorDD
size_t& io_buflen,
uint64_t i_address);
+ /**
+ * @brief Informs caller if PNORDD is using
+ * L3 Cache for fake PNOR or not.
+ *
+ * @return Indicate state of fake PNOR
+ * true = PNOR DD is using L3 Cache for fake PNOR
+ * false = PNOR DD not using L3 Cache for fake PNOR
+ */
+ bool usingL3Cache( );
+
+
// Enumeration values must match those in debug framework.
enum PnorMode_t {
MODEL_UNKNOWN, /**< Invalid */
diff --git a/src/usr/runtime/populate_attributes.C b/src/usr/runtime/populate_attributes.C
index 2ef1a3c68..043c3b126 100644
--- a/src/usr/runtime/populate_attributes.C
+++ b/src/usr/runtime/populate_attributes.C
@@ -531,14 +531,6 @@ errlHndl_t populate_attributes( void )
break;
}
- //@todo : Remove this before RTC:49137 is merged, fix with RTC:49509
- // Skip this in VPO
- if( TARGETING::is_vpo() )
- {
- TRACFCOMP( g_trac_runtime, "Skipping RUNTIME::populate_attributes in VPO mode" );
- break;
- }
-
errhdl = populate_system_attributes();
if( errhdl )
{
OpenPOWER on IntegriCloud