diff options
Diffstat (limited to 'src')
4 files changed, 116 insertions, 3 deletions
diff --git a/src/include/usr/hwpf/plat/fapiPlatAttributeService.H b/src/include/usr/hwpf/plat/fapiPlatAttributeService.H index e08b79629..11d519077 100644 --- a/src/include/usr/hwpf/plat/fapiPlatAttributeService.H +++ b/src/include/usr/hwpf/plat/fapiPlatAttributeService.H @@ -430,6 +430,51 @@ fapi::ReturnCode fapiPlatGetProcPcieBarSize ( /** * @brief This function is called by the FAPI_ATTR_GET macro when getting + * ATTR_PROC_NPU_MMIO_BAR_ENABLE + * It should not be called directly. + * + * @param[in] i_pTarget Target pointer + * @param[out] o_mmioBarEnable NPU MMIO Bar Enable + * @note: the array size of 4,2 was pulled from + * the xml file and is not expected to change. + * @return ReturnCode. Zero on success, else platform specified error + */ +fapi::ReturnCode fapiPlatGetNpuMmioBarEnable ( + const fapi::Target * i_pTarget, + uint8_t (&o_mmioBarEnable) [4][2] ); + +/** + * @brief This function is called by the FAPI_ATTR_GET macro when getting + * ATTR_PROC_NPU_MMIO_BAR_BASE_ADDR + * It should not be called directly. + * + * @param[in] i_pTarget Target pointer + * @param[out] o_mmioBarBaseAddr NPU MMIO Bar Base Address + * @note: the array size of 4,2 was pulled from + * the xml file and is not expected to change. + * @return ReturnCode. Zero on success, else platform specified error + */ +fapi::ReturnCode fapiPlatGetNpuMmioBarBaseAddr ( + const fapi::Target * i_pTarget, + uint64_t (&o_mmioBarBaseAddr) [4][2] ); + +/** + * @brief This function is called by the FAPI_ATTR_GET macro when getting + * ATTR_PROC_NPU_MMIO_BAR_SIZE + * It should not be called directly. + * + * @param[in] i_pTarget Target pointer + * @param[out] o_mmioBarSize NPU MMIO Bar Size + * @note: the array size of 4,2 was pulled from + * the xml file and is not expected to change. + * @return ReturnCode. Zero on success, else platform specified error + */ +fapi::ReturnCode fapiPlatGetNpuMmioBarSize ( + const fapi::Target * i_pTarget, + uint64_t (&o_mmioBarSize) [4][2] ); + +/** + * @brief This function is called by the FAPI_ATTR_GET macro when getting * ATTR_EX_L2_SINGLE_MEMBER_ENABLE. It should not be called directly. * * @param[in] i_pTarget Target MB pointer @@ -1190,6 +1235,15 @@ fapi::ReturnCode fapiPlatGetRCDCntlWord015 (const fapi::Target * i_pTarget, #define ATTR_PROC_PCIE_BAR_SIZE_GETMACRO( ID, PTARGET, VAL ) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ fapi::platAttrSvc::fapiPlatGetProcPcieBarSize (PTARGET, VAL ) +#define ATTR_PROC_NPU_MMIO_BAR_ENABLE_GETMACRO( ID, PTARGET, VAL ) \ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ + fapi::platAttrSvc::fapiPlatGetNpuMmioBarEnable (PTARGET, VAL ) +#define ATTR_PROC_NPU_MMIO_BAR_BASE_ADDR_GETMACRO( ID, PTARGET, VAL ) \ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ + fapi::platAttrSvc::fapiPlatGetNpuMmioBarBaseAddr (PTARGET, VAL ) +#define ATTR_PROC_NPU_MMIO_BAR_SIZE_GETMACRO( ID, PTARGET, VAL ) \ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ + fapi::platAttrSvc::fapiPlatGetNpuMmioBarSize (PTARGET, VAL ) //------------------------------------------------------------------------------ // MACROS to support enable attributes in p8_xip_customize_attributes.xml diff --git a/src/usr/hwpf/fapi/fapiParseErrorInfo.pl b/src/usr/hwpf/fapi/fapiParseErrorInfo.pl index 3cdb26612..28d1716d1 100755 --- a/src/usr/hwpf/fapi/fapiParseErrorInfo.pl +++ b/src/usr/hwpf/fapi/fapiParseErrorInfo.pl @@ -24,7 +24,7 @@ # # IBM_PROLOG_END_TAG -# $Id: fapiParseErrorInfo.pl,v 1.32 2015-02-02 18:57:30 dcrowell Exp $ +# $Id: fapiParseErrorInfo.pl,v 1.32 2015/02/02 18:57:30 dcrowell Exp $ # Purpose: This perl script will parse HWP Error XML files and create required # FAPI code. # diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml index 9a6516302..84d133591 100644 --- a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml +++ b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml @@ -22,7 +22,7 @@ <!-- permissions and limitations under the License. --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: proc_setup_bars_mmio_attributes.xml,v 1.5 2014/11/18 17:44:22 jmcgill Exp $ --> +<!-- $Id: proc_setup_bars_mmio_attributes.xml,v 1.6 2015/02/02 18:57:33 jmcgill Exp $ --> <!-- proc_setup_bars_mmio_attributes.xml --> <attributes> <!-- ********************************************************************* --> @@ -263,6 +263,65 @@ </attribute> <!-- ********************************************************************* --> <attribute> + <id>ATTR_PROC_NPU_MMIO_BAR_ENABLE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>NPU MMIO BAR enables + creator: platform + consumer: proc_setup_bars + firmware notes: + first dimension: unit number (0:3) + second dimension: BAR number (0:1) + </description> + <valueType>uint8</valueType> + <enum>DISABLE = 0x0, ENABLE = 0x1</enum> + <array>4,2</array> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_NPU_MMIO_BAR_BASE_ADDR</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>NPU MMIO BAR base address values + creator: platform + consumer: proc_setup_bars + firmware notes: + 64-bit address representing BAR RA + NOTE: BAR register covers RA 14:51 + first dimension: unit number (0:3) + second dimension: BAR number (0:1) + </description> + <valueType>uint64</valueType> + <array>4,2</array> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_NPU_MMIO_BAR_SIZE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>NPU MMIO BAR size values + creator: platform + consumer: proc_setup_bars + firmware notes: none + first dimension: unit number (0:3) + second dimension: BAR number (0:1) + </description> + <valueType>uint64</valueType> + <enum> + 2_MB = 0x0000000000200000, + 1_MB = 0x0000000000100000, + 512_KB = 0x0000000000080000, + 256_KB = 0x0000000000040000, + 128_KB = 0x0000000000020000, + 64_KB = 0x0000000000010000 + </enum> + <array>4,2</array> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> <id>ATTR_PROC_PCIE_BAR_ENABLE</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description>PCIE BAR enable diff --git a/src/usr/hwpf/hwp/fapiHwpErrorInfo.xml b/src/usr/hwpf/hwp/fapiHwpErrorInfo.xml index c622508b3..3af8cb95b 100755 --- a/src/usr/hwpf/hwp/fapiHwpErrorInfo.xml +++ b/src/usr/hwpf/hwp/fapiHwpErrorInfo.xml @@ -22,7 +22,7 @@ <!-- permissions and limitations under the License. --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: fapiHwpErrorInfo.xml,v 1.17 2015-02-02 18:40:42 dcrowell Exp $ --> +<!-- $Id: fapiHwpErrorInfo.xml,v 1.17 2015/02/02 18:40:42 dcrowell Exp $ --> <!-- XML file specifying Test HW Procedure generated errors. --> <hwpErrors> |
