summaryrefslogtreecommitdiffstats
path: root/src/usr/spd/spdDDR3.H
diff options
context:
space:
mode:
Diffstat (limited to 'src/usr/spd/spdDDR3.H')
-rwxr-xr-xsrc/usr/spd/spdDDR3.H49
1 files changed, 26 insertions, 23 deletions
diff --git a/src/usr/spd/spdDDR3.H b/src/usr/spd/spdDDR3.H
index 35f17846e..1112a1c79 100755
--- a/src/usr/spd/spdDDR3.H
+++ b/src/usr/spd/spdDDR3.H
@@ -1,25 +1,26 @@
-// IBM_PROLOG_BEGIN_TAG
-// This is an automatically generated prolog.
-//
-// $Source: src/usr/spd/spdDDR3.H $
-//
-// IBM CONFIDENTIAL
-//
-// COPYRIGHT International Business Machines Corp. 2012
-//
-// p1
-//
-// Object Code Only (OCO) source materials
-// Licensed Internal Code Source Materials
-// IBM HostBoot Licensed Internal Code
-//
-// The source code for this program is not published or other-
-// wise divested of its trade secrets, irrespective of what has
-// been deposited with the U.S. Copyright Office.
-//
-// Origin: 30
-//
-// IBM_PROLOG_END
+/* IBM_PROLOG_BEGIN_TAG
+ * This is an automatically generated prolog.
+ *
+ * $Source: src/usr/spd/spdDDR3.H $
+ *
+ * IBM CONFIDENTIAL
+ *
+ * COPYRIGHT International Business Machines Corp. 2012
+ *
+ * p1
+ *
+ * Object Code Only (OCO) source materials
+ * Licensed Internal Code Source Materials
+ * IBM HostBoot Licensed Internal Code
+ *
+ * The source code for this program is not published or other-
+ * wise divested of its trade secrets, irrespective of what has
+ * been deposited with the U.S. Copyright Office.
+ *
+ * Origin: 30
+ *
+ * IBM_PROLOG_END_TAG
+ */
#ifndef __SPDDDR3_H
#define __SPDDDR3_H
@@ -121,6 +122,8 @@ KeywordData ddr3Data[] =
{ SDRAM_OPTIONAL_FEATURES, 0x1e, 0x01, false, 0x00, 0x00, false, false, NA },
{ SDRAM_THERMAL_REFRESH_OPTIONS, 0x1f, 0x01, false, 0x00, 0x00, false, false, NA },
{ DIMM_BAD_DQ_DATA, 0xb0, 0x50, false, 0x00, 0x00, false, true, NA },
+ { SDRAM_DIE_COUNT, 0x21, 0x01, true, 0x70, 0x04, false, false, NA },
+ { SDRAM_DEVICE_TYPE_SIGNAL_LOADING,0x21, 0x01, true, 0x03, 0x00, false, false, NA },
{ MODSPEC_COM_NOM_HEIGHT_MAX, 0x3c, 0x01, true, 0x0f, 0x00, false, false, ALL },
{ MODSPEC_COM_MAX_THICK_BACK, 0x3d, 0x01, true, 0xf0, 0x04, false, false, ALL },
{ MODSPEC_COM_MAX_THICK_FRONT, 0x3d, 0x01, true, 0x0f, 0x00, false, false, ALL },
@@ -252,7 +255,7 @@ KeywordData ddr3Data[] =
{ LRMM_PERSONALITY_BYTE12, 0x72, 0x01, false, 0x00, 0x00, false, false, LRMM },
{ LRMM_PERSONALITY_BYTE13, 0x73, 0x01, false, 0x00, 0x00, false, false, LRMM },
{ LRMM_PERSONALITY_BYTE14, 0x74, 0x01, false, 0x00, 0x00, false, false, LRMM },
- // ---------------------------------------------------------------------------------------
+ //---------------------------------------------------------------------------------------
};
OpenPOWER on IntegriCloud