diff options
36 files changed, 536 insertions, 387 deletions
diff --git a/src/include/arch/pirformat.H b/src/include/arch/pirformat.H new file mode 100644 index 000000000..90d164f93 --- /dev/null +++ b/src/include/arch/pirformat.H @@ -0,0 +1,167 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/arch/pirformat.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/* A variety of PIR/PID formatting utilities */ + +#ifndef _PIRFORMAT_H +#define _PIRFORMAT_H + +/** + * @brief Format of Processor Id Register (PIR) for P9 + * + * GGGGCCCPPPPPTT where + * G = group, C = chip, P = proc, T = thread + */ +struct PIR_t +{ + union + { + uint32_t word; + + struct + { + // Normal Core Mode + uint32_t reserved:18; // 00:17 = unused + uint32_t groupId:4; // 18:21 = group id + uint32_t chipId:3; // 22:24 = chip id + uint32_t coreId:5; // 25:29 = core id (normal core) + uint32_t threadId:2; // 30:31 = thread id (normal core) + } PACKED; + + struct + { + // Fused Core Mode + uint32_t reservedFused:18; // 00:17 = unused + uint32_t groupIdFused:4; // 18:21 = group id + uint32_t chipIdFused:3; // 22:24 = chip id + uint32_t coreIdFused:4; // 25:28 = core id (fused core) + uint32_t threadIdFused:3; // 29:31 = thread id (fused core) + } PACKED; + }; + PIR_t(uint32_t i_word = 0) : word(i_word) {} + + PIR_t(uint32_t i_groupId, uint32_t i_chipId, + uint32_t i_coreId, uint32_t i_thread = 0) : + reserved(0), + groupId(i_groupId), chipId(i_chipId), + coreId(i_coreId), threadId(i_thread) {} + + PIR_t operator= (uint32_t i_word) + { + word = i_word; + return word; + } + + bool operator< (const PIR_t& r) const + { + return word < r.word; + } + + // Some more handy constants + enum + { + // Normal (non-fused) mode + BITS_IN_GROUP = 4, + BITS_IN_CHIP = 3, + BITS_IN_CORE = 5, + BITS_IN_THREAD = 2, + + BITS_AFTER_THREAD = 0, + BITS_AFTER_CORE = BITS_AFTER_THREAD+BITS_IN_THREAD, + BITS_AFTER_CHIP = BITS_AFTER_CORE+BITS_IN_CORE, + BITS_AFTER_GROUP = BITS_AFTER_CHIP+BITS_IN_CHIP, + + GROUP_MASK = 0x00003C00, + CHIP_MASK = 0x00000380, + CORE_MASK = 0x0000007C, + THREAD_MASK = 0x00000003, + VALID_BITS = 0x00003FFF, + + + // Fused mode + BITS_IN_CORE_FUSED = 5, + BITS_IN_THREAD_FUSED = 3, + + GROUP_MASK_FUSED = 0x00003C00, + CHIP_MASK_FUSED = 0x00000380, + CORE_MASK_FUSED = 0x00000078, + THREAD_MASK_FUSED = 0x00000007, + }; + + // Some handy functions + inline static uint32_t groupFromPir( uint32_t i_pir ) { + return (static_cast<PIR_t>(i_pir)).groupId; + } + inline static uint32_t chipFromPir( uint32_t i_pir ) { + return (static_cast<PIR_t>(i_pir)).chipId; + } + inline static uint32_t coreFromPir( uint32_t i_pir ) { + return (static_cast<PIR_t>(i_pir)).coreId; + } + inline static uint32_t threadFromPir( uint32_t i_pir ) { + return (static_cast<PIR_t>(i_pir)).threadId; + } + + inline static uint32_t groupFromChipId( uint32_t i_chipId ) { + return (i_chipId >> BITS_IN_CHIP); + } + inline static uint32_t chipFromChipId( uint32_t i_chipId ) { + return (i_chipId & (CHIP_MASK >> + (BITS_IN_CORE + BITS_IN_THREAD))); + } + + inline static uint32_t groupFromCoreId( uint32_t i_chipId ) { + return (i_chipId >> (BITS_IN_CHIP+ BITS_IN_CORE)); + } + inline static uint32_t chipFromCoreId( uint32_t i_chipId ) { + return (i_chipId >> BITS_IN_CORE); + } + inline static uint32_t coreFromCoreId( uint32_t i_chipId ) { + return (i_chipId & (CORE_MASK >> BITS_IN_THREAD)); + } + + inline static uint32_t createChipId( uint32_t i_groupId, + uint32_t i_chipId ) { + return ((i_groupId << BITS_IN_CHIP) | i_chipId); + } + inline static uint32_t createCoreId( uint32_t i_groupId, + uint32_t i_chipId, + uint32_t i_coreId ) + { + return ((((i_groupId << BITS_IN_CHIP) + | i_chipId) + << BITS_IN_CORE) | i_coreId); + } + + inline static uint32_t createCoreId( uint32_t i_chipId, + uint32_t i_coreId ) + { + return ((i_chipId << BITS_IN_CORE) | i_coreId); + } + +}; + + +#endif /* _PIRFORMAT_H */ + diff --git a/src/include/kernel/intmsghandler.H b/src/include/kernel/intmsghandler.H index 57044a483..98d8d5288 100644 --- a/src/include/kernel/intmsghandler.H +++ b/src/include/kernel/intmsghandler.H @@ -5,7 +5,9 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* COPYRIGHT International Business Machines Corp. 2011,2014 */ +/* Contributors Listed Below - COPYRIGHT 2011,2016 */ +/* [+] International Business Machines Corp. */ +/* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ @@ -28,6 +30,7 @@ #include <kernel/msghandler.H> #include <kernel/msg.H> #include <builtins.h> +#include <arch/pirformat.H> /** * @class InterruptMsgHdlr @@ -53,17 +56,17 @@ class InterruptMsgHdlr : public MessageHandler */ enum { - P8_PIR_THREADID_MSK = 0x00000007, - P8_PIR_COREID_MSK = 0x00000078, - P8_PIR_CHIPID_MSK = 0x00000380, - P8_PIR_NODEID_MSK = 0x00001C00, + P8_PIR_THREADID_MSK = PIR_t::THREAD_MASK, + P8_PIR_COREID_MSK = PIR_t::CORE_MASK, + P8_PIR_CHIPID_MSK = PIR_t::CHIP_MASK, + P8_PIR_NODEID_MSK = PIR_t::GROUP_MASK, // Logical Shift Left fields for mmio Base address from PIR. // (IP addr bit pos - PIR bit pos) - P8_IP_THREADID_LSL = (12-0), - P8_IP_COREID_LSL = (15-3), - P8_IP_CHIPID_LSL = (20-7), - P8_IP_NODEID_LSL = (22-10), + P8_IP_THREADID_LSL = (12-PIR_t::BITS_AFTER_CORE), + P8_IP_COREID_LSL = (15-PIR_t::BITS_AFTER_CORE), + P8_IP_CHIPID_LSL = (20-PIR_t::BITS_AFTER_CHIP), + P8_IP_NODEID_LSL = (22-PIR_t::BITS_AFTER_GROUP), XIRR_ADDR_OFFSET = 4, MFRR_ADDR_OFFSET = 12, diff --git a/src/include/usr/hwas/common/deconfigGard.H b/src/include/usr/hwas/common/deconfigGard.H index 374b6b44f..7c11d8643 100644 --- a/src/include/usr/hwas/common/deconfigGard.H +++ b/src/include/usr/hwas/common/deconfigGard.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2015 */ +/* Contributors Listed Below - COPYRIGHT 2012,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -431,7 +431,7 @@ private: // target for this chip TARGETING::Target * iv_pThisProc; TARGETING::ATTR_HUID_type procHUID; - TARGETING::ATTR_FABRIC_NODE_ID_type procFabricNode; + TARGETING::ATTR_FABRIC_GROUP_ID_type procFabricGroup; TARGETING::ATTR_FABRIC_CHIP_ID_type procFabricChip; bool iv_masterCapable; bool iv_deconfigured; diff --git a/src/include/usr/intr/interrupt.H b/src/include/usr/intr/interrupt.H index b5e41a2d9..1b24c2eed 100644 --- a/src/include/usr/intr/interrupt.H +++ b/src/include/usr/intr/interrupt.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2015 */ +/* Contributors Listed Below - COPYRIGHT 2011,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -36,44 +36,6 @@ namespace TARGETING namespace INTR { /** - * cpu PIR register - */ - struct PIR_t - { - union - { - uint32_t word; - struct - { - //P8: - uint32_t reserved:19; //!< zeros - uint32_t nodeId:3; //!< node (0-3) - uint32_t chipId:3; //!< chip pos on node (0-5) - uint32_t coreId:4; //!< Core number (1-6,9-14)? - uint32_t threadId:3; //!< Thread number (0-7) - } PACKED; - }; - PIR_t(uint32_t i_word = 0) : word(i_word) {} - - PIR_t(uint32_t i_nodeId, uint32_t i_chipId, - uint32_t i_coreId, uint32_t i_thread = 0) : - reserved(0), - nodeId(i_nodeId), chipId(i_chipId), - coreId(i_coreId), threadId(i_thread) {} - - PIR_t operator= (uint32_t i_word) - { - word = i_word; - return word; - } - - bool operator< (const PIR_t& r) const - { - return word < r.word; - } - }; - - /** * External Interrupt Types (XISR) * This value is passed in message data[0] on interrupt or shutdown. * @note The XISR is 24 bits: diff --git a/src/include/usr/runtime/rt_targeting.H b/src/include/usr/runtime/rt_targeting.H index 7559b6170..e26ea5fe4 100644 --- a/src/include/usr/runtime/rt_targeting.H +++ b/src/include/usr/runtime/rt_targeting.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2014,2015 */ +/* Contributors Listed Below - COPYRIGHT 2014,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -38,20 +38,19 @@ namespace RT_TARG enum { - CHIPID_NODE_SHIFT = 3, //!< CHIPID NODE is 'NNNCCC'b - MEMBUF_ID_SHIFT = 4, //!< CHIPID for MEMBUF is 'NNNCCCMMMM'b - UNIT_ID_SHIFT = 4, //!< CHIPID for CORE is 'NNNCCCPPPP'b - UNIT_ID_MASK = 0x000003ff, //!< Valid id bits w/o ID_FLAG - PROC_ID_TYPE = 0x00000000, //!< PROC chip id type - MEMBUF_ID_TYPE = 0x80000000, //!< MEMBUF chip id type - CORE_ID_TYPE = 0x40000000, //!< CORE/EX chip id type - CHIPID_ID_MASK = 0xFF000000, //!< TYPE field + MEMBUF_ID_SHIFT = 4, //!< CHIPID for MEMBUF is '<procid>MMMM'b + MEMBUF_ID_MASK = 0x0000000F, //!< valid position bits for MEMBUF + + PROC_TYPE = 0x00000000, //!< PROC chip id type + MEMBUF_TYPE = 0x80000000, //!< MEMBUF chip id type + CORE_TYPE = 0x40000000, //!< CORE chip id type + CHIPID_TYPE_MASK = 0xFF000000, //!< TYPE field }; /** * @brief Convert a TARGETING::Target to an unit ID that can be used - * in calls to Sapphire + * in calls to the runtime host * @param[in] The HB TARGETING::Target * @param[out] Sapphire target id * @return an error handle on error diff --git a/src/include/usr/targeting/common/targetservice.H b/src/include/usr/targeting/common/targetservice.H index 828fe86f3..455502dcf 100644 --- a/src/include/usr/targeting/common/targetservice.H +++ b/src/include/usr/targeting/common/targetservice.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2015 */ +/* Contributors Listed Below - COPYRIGHT 2012,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -79,8 +79,8 @@ namespace TARGETING /* Invalid Section Id - to initialize struct variable */ static const uint8_t INVALID_SECTIONID = 0xFF; - // Special "not found" fabric node ID is the data type with all bits set - static const ATTR_FABRIC_NODE_ID_type FABRIC_NODE_ID_NOT_FOUND = + // Special "not found" fabric group ID is the data type with all bits set + static const ATTR_FABRIC_GROUP_ID_type FABRIC_GROUP_ID_NOT_FOUND = INVALID_NODE; /** diff --git a/src/usr/devtree/bld_devtree.C b/src/usr/devtree/bld_devtree.C index aca3f3562..14b690426 100644 --- a/src/usr/devtree/bld_devtree.C +++ b/src/usr/devtree/bld_devtree.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2013,2015 */ +/* Contributors Listed Below - COPYRIGHT 2013,2016 */ /* [+] Google Inc. */ /* [+] International Business Machines Corp. */ /* */ @@ -34,7 +34,6 @@ #include <devtree/devtreeif.H> #include "devtree.H" #include <sys/mmio.h> //THIRTYTWO_GB -#include <intr/interrupt.H> #include <vpd/vpd_if.H> #include <stdio.h> #include <pnor/pnorif.H> @@ -48,12 +47,15 @@ #include <vpd/pvpdenums.H> #include <i2c/i2cif.H> #include <i2c/eepromif.H> +#include <intr/interrupt.H> + #include <ipmi/ipmisensor.H> //@TODO RTC:143092 //#include <fapi.H> //#include <fapiPlatHwpInvoker.H> // for fapi::fapiRcToErrl() #include <vpd/mvpdenums.H> +#include <arch/pirformat.H> trace_desc_t *g_trac_devtree = NULL; TRAC_INIT(&g_trac_devtree, "DEVTREE", 4096); @@ -64,20 +66,17 @@ using namespace TARGETING; typedef std::pair<uint64_t,uint64_t> homerAddr_t; -#define CHIPID_EXTRACT_NODE(i_chipid) (i_chipid >> CHIPID_NODE_SHIFT) -#define CHIPID_EXTRACT_PROC(i_chipid) (i_chipid & CHIPID_PROC_MASK) - enum BuildConstants { - DEVTREE_DATA_ADDR =0xFF00000, /* 256MB - 1MB*/ + DEVTREE_DATA_ADDR =0xFF00000, /*256MB - 1MB*/ DEVTREE_SPACE_SIZE =0x40000, /*256KB*/ XSCOM_NODE_SHIFT =38, /*Node pos is 25, so 63-25=38*/ XSCOM_CHIP_SHIFT =35, /*Chip pos is 28, so 63-28=35*/ - CHIPID_NODE_SHIFT =3, /*CHIPID is NNNCCC, shift 3*/ - CHIPID_PROC_MASK =0x7, /*CHIPID is NNNCCC, shift 3*/ + CHIPID_NODE_SHIFT =3, /*CHIPID is NNNNCCC, shift 3*/ + CHIPID_PROC_MASK =0x7, /*CHIPID is NNNNCCC, shift 3*/ PHB0_MASK =0x80, - MAX_PHBs =4, /*Max PHBs per chip is 4*/ - THREADPERCORE =8, /*8 threads per core*/ + MAX_PHBs =4, /*Max PHBs per chip is 4*/ + THREADPERCORE =8, /*8 threads per core*/ MHZ =1000000, /* The Cache unit address (and reg property) is mostly free-for-all @@ -168,7 +167,7 @@ void bld_swCheckstopFir (devTree * i_dt, dtOffset_t & i_parentNode) //@todo-RTC:123043 -- Should use the functions in RT_TARG uint32_t getProcChipId(const TARGETING::Target * i_pProc) { - uint32_t l_fabId = i_pProc->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>(); + uint32_t l_fabId = i_pProc->getAttr<TARGETING::ATTR_FABRIC_GROUP_ID>(); uint32_t l_procPos = i_pProc->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>(); return ( (l_fabId << CHIPID_NODE_SHIFT) + l_procPos); } @@ -600,6 +599,7 @@ void bld_xscom_node(devTree * i_dt, dtOffset_t & i_parentNode, /**********************************************************/ /* Xscom node */ /**********************************************************/ + //@todo-Fix for P9-RTC:128077 uint64_t l_xscomAddr = l_xscomBaseAddr + (static_cast<uint64_t>(i_chipid) << XSCOM_CHIP_SHIFT); @@ -787,7 +787,7 @@ uint32_t bld_l2_node(devTree * i_dt, dtOffset_t & i_parentNode, uint32_t bld_cpu_node(devTree * i_dt, dtOffset_t & i_parentNode, const TARGETING::Target * i_ex, - INTR::PIR_t i_pir, uint32_t i_chipId, + PIR_t i_pir, uint32_t i_chipId, uint32_t i_nextCacheHandle) { /* @@ -929,7 +929,7 @@ uint32_t bld_cpu_node(devTree * i_dt, dtOffset_t & i_parentNode, uint32_t bld_intr_node(devTree * i_dt, dtOffset_t & i_parentNode, const TARGETING::Target * i_ex, - INTR::PIR_t i_pir) + PIR_t i_pir) { /* @@ -1421,26 +1421,26 @@ errlHndl_t bld_fdt_cpu(devTree * i_dt, //to be reserved -- save it away o_homerRegions.push_back(getHomerPhysAddr(l_pProc)); - TARGETING::TargetHandleList l_exlist; - getChildChiplets( l_exlist, l_pProc, TYPE_CORE ); - for (size_t core = 0; core < l_exlist.size(); core++) + TARGETING::TargetHandleList l_corelist; + getChildChiplets( l_corelist, l_pProc, TYPE_CORE ); + for (size_t core = 0; core < l_corelist.size(); core++) { - const TARGETING::Target * l_ex = l_exlist[core]; - if(l_ex->getAttr<TARGETING::ATTR_HWAS_STATE>().functional != true) + const TARGETING::Target * l_core = l_corelist[core]; + if(l_core->getAttr<TARGETING::ATTR_HWAS_STATE>().functional != true) { continue; //Not functional } - /* Proc ID Reg is N NNCC CPPP PTTT Where - NNN is node number + /* Proc ID Reg is GG GGCC CPPP PPTT Where + GGGG is Group number CCC is Chip - PPPP is the core number - TTT is Thread num + PPPPP is the core number + TT is Thread num */ - uint32_t l_coreNum = l_ex->getAttr<TARGETING::ATTR_CHIP_UNIT>(); - INTR::PIR_t pir(0); - pir.nodeId = CHIPID_EXTRACT_NODE(l_chipid); - pir.chipId = CHIPID_EXTRACT_PROC(l_chipid); + uint32_t l_coreNum = l_core->getAttr<TARGETING::ATTR_CHIP_UNIT>(); + PIR_t pir(0); + pir.groupId = PIR_t::groupFromChipId(l_chipid); + pir.chipId = PIR_t::chipFromChipId(l_chipid); pir.coreId = l_coreNum; TRACFCOMP( g_trac_devtree, "Added pir[%x] chipid 0x%x core %d", @@ -1451,10 +1451,10 @@ errlHndl_t bld_fdt_cpu(devTree * i_dt, uint32_t l3pHandle = bld_l3_node(i_dt, cpusNode, pir.word); uint32_t l2pHandle = bld_l2_node(i_dt, cpusNode, pir.word, l3pHandle); - bld_cpu_node(i_dt, cpusNode, l_ex, pir, l_chipid, l2pHandle); + bld_cpu_node(i_dt, cpusNode, l_core, pir, l_chipid, l2pHandle); rootNode = i_dt->findNode("/"); - bld_intr_node(i_dt, rootNode, l_ex, pir); + bld_intr_node(i_dt, rootNode, l_core, pir); } } @@ -1949,19 +1949,20 @@ errlHndl_t bld_fdt_vpd(devTree * i_dt, bool i_smallTree) //@TODO RTC:143092 #if 0 - TARGETING::TargetHandleList l_exlist; + TARGETING::TargetHandleList l_corelist; fapi::Target l_pFapiProc(fapi::TARGET_TYPE_PROC_CHIP, (const_cast<TARGETING::Target*>(l_pProc) )); - getChildChiplets( l_exlist, l_pProc, TYPE_CORE ); - for (size_t core = 0; core < l_exlist.size(); core++) + getChildChiplets( l_corelist, l_pProc, TYPE_CORE ); + for (size_t core = 0; core < l_corelist.size(); core++) { - const TARGETING::Target * l_ex = l_exlist[core]; + const TARGETING::Target * l_core = l_corelist[core]; - uint32_t l_coreNum = l_ex->getAttr<TARGETING::ATTR_CHIP_UNIT>(); - INTR::PIR_t pir(0); - pir.nodeId = CHIPID_EXTRACT_NODE(l_procId); - pir.chipId = CHIPID_EXTRACT_PROC(l_procId); + uint32_t l_coreNum = + l_core->getAttr<TARGETING::ATTR_CHIP_UNIT>(); + PIR_t pir(0); + pir.groupId = PIR_t::groupFromChipId(l_procId); + pir.chipId = PIR_t::chipFromChipId(l_procId); pir.coreId = l_coreNum; // Get #V bucket data @@ -1982,10 +1983,10 @@ errlHndl_t bld_fdt_vpd(devTree * i_dt, bool i_smallTree) } //Add the attached core - dtOffset_t exNode = i_dt->addNode(procNode, "cpu", + dtOffset_t coreNode = i_dt->addNode(procNode, "cpu", pir.word); - i_dt->addPropertyBytes(exNode, "frequency,voltage", + i_dt->addPropertyBytes(coreNode, "frequency,voltage", reinterpret_cast<uint8_t*>( &l_poundVdata), sizeof(fapi::voltageBucketData_t)); } diff --git a/src/usr/diag/attn/common/attntarget.C b/src/usr/diag/attn/common/attntarget.C index fcc9df417..ed90b75f2 100644 --- a/src/usr/diag/attn/common/attntarget.C +++ b/src/usr/diag/attn/common/attntarget.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2014 */ +/* Contributors Listed Below - COPYRIGHT 2014,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -189,9 +189,9 @@ bool TargetServiceImpl::getAttribute( switch (i_attribute) { - case ATTR_FABRIC_NODE_ID: + case ATTR_FABRIC_GROUP_ID: - found = i_target->tryGetAttr<ATTR_FABRIC_NODE_ID>(u8); + found = i_target->tryGetAttr<ATTR_FABRIC_GROUP_ID>(u8); o_val = u8; break; diff --git a/src/usr/diag/attn/ipl/attnsvc.C b/src/usr/diag/attn/ipl/attnsvc.C index 2fe0bb934..c8ecbae35 100644 --- a/src/usr/diag/attn/ipl/attnsvc.C +++ b/src/usr/diag/attn/ipl/attnsvc.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2014,2015 */ +/* Contributors Listed Below - COPYRIGHT 2014,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -177,7 +177,7 @@ void Service::processIntrQMsgPreAck(const msg_t & i_msg) { uint64_t node = 0, chip = 0; - getTargetService().getAttribute(ATTR_FABRIC_NODE_ID, *it, node); + getTargetService().getAttribute(ATTR_FABRIC_GROUP_ID, *it, node); getTargetService().getAttribute(ATTR_FABRIC_CHIP_ID, *it, chip); if(node == xisr.node diff --git a/src/usr/diag/attn/ipl/test/attnfakepresenter.C b/src/usr/diag/attn/ipl/test/attnfakepresenter.C index d44bdf7de..f5c23f733 100644 --- a/src/usr/diag/attn/ipl/test/attnfakepresenter.C +++ b/src/usr/diag/attn/ipl/test/attnfakepresenter.C @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/usr/diag/attn/hostboot/test/attnfakepresenter.C $ */ +/* $Source: src/usr/diag/attn/ipl/test/attnfakepresenter.C $ */ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2014 */ +/* Contributors Listed Below - COPYRIGHT 2014,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -134,7 +134,7 @@ void FakePresenter::interrupt( uint64_t node = 0, chip = 0; - getTargetService().getAttribute(ATTR_FABRIC_NODE_ID, i_source, node); + getTargetService().getAttribute(ATTR_FABRIC_GROUP_ID, i_source, node); getTargetService().getAttribute(ATTR_FABRIC_CHIP_ID, i_source, chip); xisr.node = node; diff --git a/src/usr/diag/attn/ipl/test/attnfaketarget.C b/src/usr/diag/attn/ipl/test/attnfaketarget.C index 9f76135ea..9a4d5814a 100644 --- a/src/usr/diag/attn/ipl/test/attnfaketarget.C +++ b/src/usr/diag/attn/ipl/test/attnfaketarget.C @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/usr/diag/attn/hostboot/test/attnfaketarget.C $ */ +/* $Source: src/usr/diag/attn/ipl/test/attnfaketarget.C $ */ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2014 */ +/* Contributors Listed Below - COPYRIGHT 2014,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -87,7 +87,7 @@ bool FakeProcTargetService::getAttribute( switch (i_attribute) { - case ATTR_FABRIC_NODE_ID: + case ATTR_FABRIC_GROUP_ID: o_val = 0; break; diff --git a/src/usr/errl/errlmanager.C b/src/usr/errl/errlmanager.C index fe48a2a8a..ac0174713 100644 --- a/src/usr/errl/errlmanager.C +++ b/src/usr/errl/errlmanager.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2015 */ +/* Contributors Listed Below - COPYRIGHT 2011,2016 */ /* [+] Google Inc. */ /* [+] International Business Machines Corp. */ /* */ @@ -46,7 +46,7 @@ #include <initservice/initserviceif.H> #include <pnor/pnorif.H> #include <sys/mm.h> -#include <intr/interrupt.H> +#include <arch/pirformat.H> #include <errldisplay/errldisplay.H> #include <console/consoleif.H> #include <config.h> @@ -155,10 +155,10 @@ ErrlManager::ErrlManager() : // [0..3] for hostboot on master proc (chip==0) on node [0..3] // [4..7] for hostboot on alternate proc on node [0..3] - const INTR::PIR_t masterCpu = task_getcpuid(); + const PIR_t masterCpu = task_getcpuid(); const uint32_t l_eid_id = (masterCpu.chipId == 0) ? - masterCpu.nodeId : - masterCpu.nodeId + 4; + masterCpu.groupId : + masterCpu.groupId + 4; iv_currLogId = ERRLOG_PLID_BASE + ERRLOG_PLID_INITIAL + (l_eid_id << ERRLOG_PLID_NODE_SHIFT); @@ -170,7 +170,7 @@ ErrlManager::ErrlManager() : // whatever it is. TRACFCOMP( g_trac_errl, INFO_MRK"ErrlManager on node %d (%smaster proc), LogId 0x%X", - masterCpu.nodeId, (masterCpu.chipId == 0) ? "" : "alternate ", + masterCpu.groupId, (masterCpu.chipId == 0) ? "" : "alternate ", iv_currLogId); // Create and register error log message queue. diff --git a/src/usr/hwas/common/deconfigGard.C b/src/usr/hwas/common/deconfigGard.C index fa266c881..5e08ed095 100644 --- a/src/usr/hwas/common/deconfigGard.C +++ b/src/usr/hwas/common/deconfigGard.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2015 */ +/* Contributors Listed Below - COPYRIGHT 2012,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -1137,9 +1137,9 @@ errlHndl_t DeconfigGard::_invokeDeconfigureAssocProc( // HUID l_ProcInfo.procHUID = (*l_procsIter)->getAttr<ATTR_HUID>(); - // FABRIC_NODE_ID - l_ProcInfo.procFabricNode = - (*l_procsIter)->getAttr<ATTR_FABRIC_NODE_ID>(); + // FABRIC_GROUP_ID + l_ProcInfo.procFabricGroup = + (*l_procsIter)->getAttr<ATTR_FABRIC_GROUP_ID>(); // FABRIC_CHIP_ID l_ProcInfo.procFabricChip = (*l_procsIter)->getAttr<ATTR_FABRIC_CHIP_ID>(); @@ -2024,7 +2024,7 @@ errlHndl_t DeconfigGard::_deconfigureAssocProc(ProcInfoVector &io_procInfo) // STEP 3: // If a deconfigured bus connects two non-master procs, - // both of which are in the master-containing logical node, + // both of which are in the master-containing logical group, // mark proc with higher HUID to be deconfigured. // Iterate through procs and check xbus chiplets @@ -2043,9 +2043,9 @@ errlHndl_t DeconfigGard::_deconfigureAssocProc(ProcInfoVector &io_procInfo) { continue; } - // If current proc is on master logical node - if (l_pMasterProcInfo->procFabricNode == - (*l_procInfoIter).procFabricNode) + // If current proc is on master logical group + if (l_pMasterProcInfo->procFabricGroup == + (*l_procInfoIter).procFabricGroup) { // Check xbus endpoints for (uint8_t i = 0; i < NUM_X_BUSES; i++) @@ -2063,7 +2063,7 @@ errlHndl_t DeconfigGard::_deconfigureAssocProc(ProcInfoVector &io_procInfo) " %.8X for deconfiguration " "due to higher HUID than peer " "proc on same master-containing logical " - "node.", + "group.", (*l_procInfoIter).iv_pXProcs[i]->procHUID); (*l_procInfoIter).iv_pXProcs[i]-> iv_deconfigured = true; @@ -2074,7 +2074,7 @@ errlHndl_t DeconfigGard::_deconfigureAssocProc(ProcInfoVector &io_procInfo) "%.8X for deconfiguration " "due to higher HUID than peer " "proc on same master-containing logical " - "node.", + "group.", (*l_procInfoIter).procHUID); (*l_procInfoIter).iv_deconfigured = true; } @@ -2086,14 +2086,14 @@ errlHndl_t DeconfigGard::_deconfigureAssocProc(ProcInfoVector &io_procInfo) // STEP 4: // If a deconfigured bus connects two procs, both in the same - // non-master-containing logical node, mark current proc + // non-master-containing logical group, mark current proc // deconfigured if there is a same position proc marked deconfigured - // in the master logical node, else mark remote proc if there is + // in the master logical group, else mark remote proc if there is // a same position proc marked deconfigured in the master logical - // node otherwise, mark the proc with the higher HUID. + // group otherwise, mark the proc with the higher HUID. // Iterate through procs and, if in non-master - // logical node, check xbus chiplets + // logical group, check xbus chiplets for (ProcInfoVector::iterator l_procInfoIter = io_procInfo.begin(); l_procInfoIter != io_procInfo.end(); @@ -2104,14 +2104,14 @@ errlHndl_t DeconfigGard::_deconfigureAssocProc(ProcInfoVector &io_procInfo) { continue; } - // Don't examine procs on master logical node - if (l_pMasterProcInfo->procFabricNode == - (*l_procInfoIter).procFabricNode) + // Don't examine procs on master logical group + if (l_pMasterProcInfo->procFabricGroup == + (*l_procInfoIter).procFabricGroup) { continue; } // Check xbuses because they connect procs which - // are in the same logical node + // are in the same logical group for (uint8_t i = 0; i < NUM_X_BUSES; i++) { // If endpoint deconfigured and endpoint peer proc @@ -2123,19 +2123,19 @@ errlHndl_t DeconfigGard::_deconfigureAssocProc(ProcInfoVector &io_procInfo) // finding a proc to mark deconfigured bool l_chipIDmatch = false; // Iterate through procs and examine ones found to - // be on the master-containing logical node + // be on the master-containing logical group for (ProcInfoVector::const_iterator - l_mNodeProcInfoIter = io_procInfo.begin(); - l_mNodeProcInfoIter != io_procInfo.end(); - ++l_mNodeProcInfoIter) + l_mGroupProcInfoIter = io_procInfo.begin(); + l_mGroupProcInfoIter != io_procInfo.end(); + ++l_mGroupProcInfoIter) { - if (l_pMasterProcInfo->procFabricNode == - (*l_mNodeProcInfoIter).procFabricNode) + if (l_pMasterProcInfo->procFabricGroup == + (*l_mGroupProcInfoIter).procFabricGroup) { - // If master logical node proc deconfigured with + // If master logical group proc deconfigured with // same FABRIC_CHIP_ID as current proc - if (((*l_mNodeProcInfoIter).iv_deconfigured) && - ((*l_mNodeProcInfoIter).procFabricChip == + if (((*l_mGroupProcInfoIter).iv_deconfigured) && + ((*l_mGroupProcInfoIter).procFabricChip == (*l_procInfoIter).procFabricChip)) { // Mark current proc to be deconfigured @@ -2144,19 +2144,19 @@ errlHndl_t DeconfigGard::_deconfigureAssocProc(ProcInfoVector &io_procInfo) "%.8X for deconfiguration " "due to same position deconfigured " "proc on master-containing logical " - "node.", + "group.", (*l_procInfoIter).procHUID); (*l_procInfoIter).iv_deconfigured =\ true; l_chipIDmatch = true; break; } - // If master logical node proc deconfigured with + // If master logical group proc deconfigured with // same FABRIC_CHIP_ID as current proc's xbus peer // proc - else if (((*l_mNodeProcInfoIter). + else if (((*l_mGroupProcInfoIter). iv_deconfigured) && - ((*l_mNodeProcInfoIter). + ((*l_mGroupProcInfoIter). procFabricChip == (*l_procInfoIter).iv_pXProcs[i]-> procFabricChip)) @@ -2167,7 +2167,7 @@ errlHndl_t DeconfigGard::_deconfigureAssocProc(ProcInfoVector &io_procInfo) "proc: %.8X for deconfiguration " "due to same position deconfigured " "proc on master-containing logical " - "node.", + "group.", (*l_procInfoIter).iv_pXProcs[i]->procHUID); (*l_procInfoIter).iv_pXProcs[i]-> iv_deconfigured = true; @@ -2187,7 +2187,7 @@ errlHndl_t DeconfigGard::_deconfigureAssocProc(ProcInfoVector &io_procInfo) " %.8X for deconfiguration " "due to higher HUID than peer " "proc on same non master-containing logical " - "node.", + "group.", (*l_procInfoIter).procHUID); (*l_procInfoIter).iv_deconfigured = true; @@ -2198,7 +2198,7 @@ errlHndl_t DeconfigGard::_deconfigureAssocProc(ProcInfoVector &io_procInfo) " %.8X for deconfiguration " "due to higher HUID than peer " "proc on same non master-containing logical " - "node.", + "group.", (*l_procInfoIter).iv_pXProcs[i]->procHUID); (*l_procInfoIter).iv_pXProcs[i]-> iv_deconfigured = true; @@ -2209,7 +2209,7 @@ errlHndl_t DeconfigGard::_deconfigureAssocProc(ProcInfoVector &io_procInfo) }// STEP 4 // STEP 5: - // If a deconfigured bus conects two procs on different logical nodes, + // If a deconfigured bus conects two procs on different logical groups, // and neither proc is the master proc: If current proc's xbus peer // proc is marked as deconfigured, mark current proc. Else, mark // abus peer proc. @@ -2231,7 +2231,7 @@ errlHndl_t DeconfigGard::_deconfigureAssocProc(ProcInfoVector &io_procInfo) continue; } // Check abuses because they connect procs which are in - // different logical nodes + // different logical groups for (uint8_t i = 0; i < NUM_A_BUSES; i++) { // If endpoint deconfigured and endpoint peer proc @@ -2279,7 +2279,7 @@ errlHndl_t DeconfigGard::_deconfigureAssocProc(ProcInfoVector &io_procInfo) }while(0); if (!l_errlHdl) { - // Perform SMP node balancing + // Perform SMP group balancing l_errlHdl = _symmetryValidation(io_procInfo); } return l_errlHdl; @@ -2293,13 +2293,13 @@ errlHndl_t DeconfigGard::_symmetryValidation(ProcInfoVector &io_procInfo) // Defined for possible use in future applications errlHndl_t l_errlHdl = NULL; - // Perform SMP node balancing + // Perform SMP group balancing do { // STEP 1: - // If a proc is deconfigured in a logical node + // If a proc is deconfigured in a logical group // containing the master proc, iterate through all procs - // and mark as deconfigured those in other logical nodes + // and mark as deconfigured those in other logical groups // with the same FABRIC_CHIP_ID (procFabricChip) // Find master proc @@ -2320,7 +2320,7 @@ errlHndl_t DeconfigGard::_symmetryValidation(ProcInfoVector &io_procInfo) // If no master proc found, abort HWAS_ASSERT(l_pMasterProcInfo, "HWAS _symmetryValidation:" "Master proc not found"); - // Iterate through procs and check if in master logical node + // Iterate through procs and check if in master logical group for (ProcInfoVector::const_iterator l_procInfoIter = io_procInfo.begin(); l_procInfoIter != io_procInfo.end(); @@ -2331,10 +2331,10 @@ errlHndl_t DeconfigGard::_symmetryValidation(ProcInfoVector &io_procInfo) { continue; } - // If current proc is on master logical node + // If current proc is on master logical group // and marked as deconfigured - if ((l_pMasterProcInfo->procFabricNode == - (*l_procInfoIter).procFabricNode) && + if ((l_pMasterProcInfo->procFabricGroup == + (*l_procInfoIter).procFabricGroup) && ((*l_procInfoIter).iv_deconfigured)) { // Iterate through procs and mark any same- @@ -2357,13 +2357,13 @@ errlHndl_t DeconfigGard::_symmetryValidation(ProcInfoVector &io_procInfo) }// STEP 1 // STEP 2: - // If a deconfigured proc is found on a non-master-containing node + // If a deconfigured proc is found on a non-master-containing group // and has the same position (FABRIC_CHIP_ID) as a functional - // non-master chip on the master logical node, + // non-master chip on the master logical group, // mark its xbus peer proc(s) for deconfiguration // Iterate through procs, if marked deconfigured, compare chip - // position to functional chip on master node. + // position to functional chip on master group. for (ProcInfoVector::const_iterator l_procInfoIter = io_procInfo.begin(); l_procInfoIter != io_procInfo.end(); @@ -2373,19 +2373,19 @@ errlHndl_t DeconfigGard::_symmetryValidation(ProcInfoVector &io_procInfo) if ((*l_procInfoIter).iv_deconfigured) { // Iterate through procs, examining those on - // the master logical node + // the master logical group for (ProcInfoVector::const_iterator - l_mNodeProcInfoIter = io_procInfo.begin(); - l_mNodeProcInfoIter != io_procInfo.end(); - ++l_mNodeProcInfoIter) + l_mGroupProcInfoIter = io_procInfo.begin(); + l_mGroupProcInfoIter != io_procInfo.end(); + ++l_mGroupProcInfoIter) { - // If proc found is on the master-containing logical node + // If proc found is on the master-containing logical group // functional, and matches the position of the deconfigured // proc from the outer loop - if ((l_pMasterProcInfo->procFabricNode == - (*l_mNodeProcInfoIter).procFabricNode) && - (!((*l_mNodeProcInfoIter).iv_deconfigured)) && - ((*l_mNodeProcInfoIter).procFabricChip == + if ((l_pMasterProcInfo->procFabricGroup == + (*l_mGroupProcInfoIter).procFabricGroup) && + (!((*l_mGroupProcInfoIter).iv_deconfigured)) && + ((*l_mGroupProcInfoIter).procFabricChip == (*l_procInfoIter).procFabricChip)) { // Find xbus peer proc to mark deconfigured diff --git a/src/usr/hwas/test/hwasGardTest.H b/src/usr/hwas/test/hwasGardTest.H index f25a67ee3..a1d3110fc 100644 --- a/src/usr/hwas/test/hwasGardTest.H +++ b/src/usr/hwas/test/hwasGardTest.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2015 */ +/* Contributors Listed Below - COPYRIGHT 2011,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -1812,7 +1812,7 @@ public: // Proc0: l_tuletaProcs[0].iv_pThisProc = NULL; // Target * l_tuletaProcs[0].procHUID = 0; // HUID - l_tuletaProcs[0].procFabricNode = 0; // FABRIC_NODE_ID + l_tuletaProcs[0].procFabricGroup = 0; // FABRIC_GROUP_ID l_tuletaProcs[0].procFabricChip = 0; // FABRIC_CHIP_ID l_tuletaProcs[0].iv_masterCapable = true; // Master proc l_tuletaProcs[0].iv_deconfigured = false; // HWAS state @@ -1828,7 +1828,7 @@ public: // Proc1: l_tuletaProcs[1].iv_pThisProc = NULL; // Target * l_tuletaProcs[1].procHUID = 1; // HUID - l_tuletaProcs[1].procFabricNode = 0; // FABRIC_NODE_ID + l_tuletaProcs[1].procFabricGroup = 0; // FABRIC_GROUP_ID l_tuletaProcs[1].procFabricChip = 1; // FABRIC_CHIP_ID l_tuletaProcs[1].iv_masterCapable = false; // Not master proc l_tuletaProcs[1].iv_deconfigured = false; // HWAS state @@ -1841,7 +1841,7 @@ public: // Proc2: l_tuletaProcs[2].iv_pThisProc = NULL; // Target * l_tuletaProcs[2].procHUID = 2; // HUID - l_tuletaProcs[2].procFabricNode = 1; // FABRIC_NODE_ID + l_tuletaProcs[2].procFabricGroup = 1; // FABRIC_GROUP_ID l_tuletaProcs[2].procFabricChip = 0; // FABRIC_CHIP_ID l_tuletaProcs[2].iv_masterCapable = false; // Not master proc l_tuletaProcs[2].iv_deconfigured = false; // HWAS state @@ -1855,7 +1855,7 @@ public: // Proc3: l_tuletaProcs[3].iv_pThisProc = NULL; // Target * l_tuletaProcs[3].procHUID = 3; // HUID - l_tuletaProcs[3].procFabricNode = 1; // FABRIC_NODE_ID + l_tuletaProcs[3].procFabricGroup = 1; // FABRIC_GROUP_ID l_tuletaProcs[3].procFabricChip = 1; // FABRIC_CHIP_ID l_tuletaProcs[3].iv_masterCapable = false; // Not master proc l_tuletaProcs[3].iv_deconfigured = false; // HWAS state @@ -1920,7 +1920,7 @@ public: // Proc0: l_tuletaProcs[0].iv_pThisProc = NULL; // Target * l_tuletaProcs[0].procHUID = 0; // HUID - l_tuletaProcs[0].procFabricNode = 0; // FABRIC_NODE_ID + l_tuletaProcs[0].procFabricGroup = 0; // FABRIC_GROUP_ID l_tuletaProcs[0].procFabricChip = 0; // FABRIC_CHIP_ID l_tuletaProcs[0].iv_masterCapable = false; // Note master proc l_tuletaProcs[0].iv_deconfigured = false; // HWAS state @@ -1933,7 +1933,7 @@ public: // Proc1: l_tuletaProcs[1].iv_pThisProc = NULL; // Target * l_tuletaProcs[1].procHUID = 1; // HUID - l_tuletaProcs[1].procFabricNode = 0; // FABRIC_NODE_ID + l_tuletaProcs[1].procFabricGroup = 0; // FABRIC_GROUP_ID l_tuletaProcs[1].procFabricChip = 1; // FABRIC_CHIP_ID l_tuletaProcs[1].iv_masterCapable = false; // Not master proc l_tuletaProcs[1].iv_deconfigured = false; // HWAS state @@ -1946,7 +1946,7 @@ public: // Proc2: l_tuletaProcs[2].iv_pThisProc = NULL; // Target * l_tuletaProcs[2].procHUID = 2; // HUID - l_tuletaProcs[2].procFabricNode = 1; // FABRIC_NODE_ID + l_tuletaProcs[2].procFabricGroup = 1; // FABRIC_GROUP_ID l_tuletaProcs[2].procFabricChip = 0; // FABRIC_CHIP_ID l_tuletaProcs[2].iv_masterCapable = true; // Master proc l_tuletaProcs[2].iv_deconfigured = false; // HWAS state @@ -1960,7 +1960,7 @@ public: // Proc3: l_tuletaProcs[3].iv_pThisProc = NULL; // Target * l_tuletaProcs[3].procHUID = 3; // HUID - l_tuletaProcs[3].procFabricNode = 1; // FABRIC_NODE_ID + l_tuletaProcs[3].procFabricGroup = 1; // FABRIC_GROUP_ID l_tuletaProcs[3].procFabricChip = 1; // FABRIC_CHIP_ID l_tuletaProcs[3].iv_masterCapable = false; // Not master proc l_tuletaProcs[3].iv_deconfigured = false; // HWAS state @@ -2024,7 +2024,7 @@ public: // Proc0: l_orlenaProcs[0].iv_pThisProc = NULL; // Target * l_orlenaProcs[0].procHUID = 0; // HUID - l_orlenaProcs[0].procFabricNode = 0; // FABRIC_NODE_ID + l_orlenaProcs[0].procFabricGroup = 0; // FABRIC_GROUP_ID l_orlenaProcs[0].procFabricChip = 0; // FABRIC_CHIP_ID l_orlenaProcs[0].iv_masterCapable = true; // Master proc l_orlenaProcs[0].iv_deconfigured = false; // HWAS state @@ -2039,7 +2039,7 @@ public: // Proc1: l_orlenaProcs[1].iv_pThisProc = NULL; // Target * l_orlenaProcs[1].procHUID = 1; // HUID - l_orlenaProcs[1].procFabricNode = 0; // FABRIC_NODE_ID + l_orlenaProcs[1].procFabricGroup = 0; // FABRIC_GROUP_ID l_orlenaProcs[1].procFabricChip = 1; // FABRIC_CHIP_ID l_orlenaProcs[1].iv_masterCapable = false; // Not master proc l_orlenaProcs[1].iv_deconfigured = false; // HWAS state @@ -2054,7 +2054,7 @@ public: // Proc2: l_orlenaProcs[2].iv_pThisProc = NULL; // Target * l_orlenaProcs[2].procHUID = 2; // HUID - l_orlenaProcs[2].procFabricNode = 1; // FABRIC_NODE_ID + l_orlenaProcs[2].procFabricGroup = 1; // FABRIC_GROUP_ID l_orlenaProcs[2].procFabricChip = 0; // FABRIC_CHIP_ID l_orlenaProcs[2].iv_masterCapable = false; // Not master proc l_orlenaProcs[2].iv_deconfigured = false; // HWAS state @@ -2068,7 +2068,7 @@ public: // Proc3: l_orlenaProcs[3].iv_pThisProc = NULL; // Target * l_orlenaProcs[3].procHUID = 3; // HUID - l_orlenaProcs[3].procFabricNode = 1; // FABRIC_NODE_ID + l_orlenaProcs[3].procFabricGroup = 1; // FABRIC_GROUP_ID l_orlenaProcs[3].procFabricChip = 1; // FABRIC_CHIP_ID l_orlenaProcs[3].iv_masterCapable = false; // Not master proc l_orlenaProcs[3].iv_deconfigured = false; // HWAS state @@ -2082,7 +2082,7 @@ public: // Proc4: l_orlenaProcs[4].iv_pThisProc = NULL; // Target * l_orlenaProcs[4].procHUID = 4; // HUID - l_orlenaProcs[4].procFabricNode = 2; // FABRIC_NODE_ID + l_orlenaProcs[4].procFabricGroup = 2; // FABRIC_GROUP_ID l_orlenaProcs[4].procFabricChip = 0; // FABRIC_CHIP_ID l_orlenaProcs[4].iv_masterCapable = false; // Master proc l_orlenaProcs[4].iv_deconfigured = false; // HWAS state @@ -2096,7 +2096,7 @@ public: // Proc5: l_orlenaProcs[5].iv_pThisProc = NULL; // Target * l_orlenaProcs[5].procHUID = 5; // HUID - l_orlenaProcs[5].procFabricNode = 2; // FABRIC_NODE_ID + l_orlenaProcs[5].procFabricGroup = 2; // FABRIC_GROUP_ID l_orlenaProcs[5].procFabricChip = 1; // FABRIC_CHIP_ID l_orlenaProcs[5].iv_masterCapable = false; // Not master proc l_orlenaProcs[5].iv_deconfigured = false; // HWAS state @@ -2110,7 +2110,7 @@ public: // Proc6: l_orlenaProcs[6].iv_pThisProc = NULL; // Target * l_orlenaProcs[6].procHUID = 6; // HUID - l_orlenaProcs[6].procFabricNode = 3; // FABRIC_NODE_ID + l_orlenaProcs[6].procFabricGroup = 3; // FABRIC_GROUP_ID l_orlenaProcs[6].procFabricChip = 0; // FABRIC_CHIP_ID l_orlenaProcs[6].iv_masterCapable = false; // Not master proc l_orlenaProcs[6].iv_deconfigured = false; // HWAS state @@ -2124,7 +2124,7 @@ public: // Proc7: l_orlenaProcs[7].iv_pThisProc = NULL; // Target * l_orlenaProcs[7].procHUID = 7; // HUID - l_orlenaProcs[7].procFabricNode = 3; // FABRIC_NODE_ID + l_orlenaProcs[7].procFabricGroup = 3; // FABRIC_GROUP_ID l_orlenaProcs[7].procFabricChip = 1; // FABRIC_CHIP_ID l_orlenaProcs[7].iv_masterCapable = false; // Not master proc l_orlenaProcs[7].iv_deconfigured = false; // HWAS state @@ -2193,7 +2193,7 @@ public: // Proc0: l_orlenaProcs[0].iv_pThisProc = NULL; // Target * l_orlenaProcs[0].procHUID = 0; // HUID - l_orlenaProcs[0].procFabricNode = 0; // FABRIC_NODE_ID + l_orlenaProcs[0].procFabricGroup = 0; // FABRIC_GROUP_ID l_orlenaProcs[0].procFabricChip = 0; // FABRIC_CHIP_ID l_orlenaProcs[0].iv_masterCapable = true; // Master proc l_orlenaProcs[0].iv_deconfigured = false; // HWAS state @@ -2207,7 +2207,7 @@ public: // Proc1: l_orlenaProcs[1].iv_pThisProc = NULL; // Target * l_orlenaProcs[1].procHUID = 1; // HUID - l_orlenaProcs[1].procFabricNode = 0; // FABRIC_NODE_ID + l_orlenaProcs[1].procFabricGroup = 0; // FABRIC_GROUP_ID l_orlenaProcs[1].procFabricChip = 1; // FABRIC_CHIP_ID l_orlenaProcs[1].iv_masterCapable = false; // Not master proc l_orlenaProcs[1].iv_deconfigured = false; // HWAS state @@ -2221,7 +2221,7 @@ public: // Proc2: l_orlenaProcs[2].iv_pThisProc = NULL; // Target * l_orlenaProcs[2].procHUID = 2; // HUID - l_orlenaProcs[2].procFabricNode = 1; // FABRIC_NODE_ID + l_orlenaProcs[2].procFabricGroup = 1; // FABRIC_GROUP_ID l_orlenaProcs[2].procFabricChip = 0; // FABRIC_CHIP_ID l_orlenaProcs[2].iv_masterCapable = false; // Not master proc l_orlenaProcs[2].iv_deconfigured = false; // HWAS state @@ -2236,7 +2236,7 @@ public: // Proc3: l_orlenaProcs[3].iv_pThisProc = NULL; // Target * l_orlenaProcs[3].procHUID = 3; // HUID - l_orlenaProcs[3].procFabricNode = 1; // FABRIC_NODE_ID + l_orlenaProcs[3].procFabricGroup = 1; // FABRIC_GROUP_ID l_orlenaProcs[3].procFabricChip = 1; // FABRIC_CHIP_ID l_orlenaProcs[3].iv_masterCapable = false; // Not master proc l_orlenaProcs[3].iv_deconfigured = false; // HWAS state @@ -2250,7 +2250,7 @@ public: // Proc4: l_orlenaProcs[4].iv_pThisProc = NULL; // Target * l_orlenaProcs[4].procHUID = 4; // HUID - l_orlenaProcs[4].procFabricNode = 2; // FABRIC_NODE_ID + l_orlenaProcs[4].procFabricGroup = 2; // FABRIC_GROUP_ID l_orlenaProcs[4].procFabricChip = 0; // FABRIC_CHIP_ID l_orlenaProcs[4].iv_masterCapable = false; // Master proc l_orlenaProcs[4].iv_deconfigured = false; // HWAS state @@ -2265,7 +2265,7 @@ public: // Proc5: l_orlenaProcs[5].iv_pThisProc = NULL; // Target * l_orlenaProcs[5].procHUID = 5; // HUID - l_orlenaProcs[5].procFabricNode = 2; // FABRIC_NODE_ID + l_orlenaProcs[5].procFabricGroup = 2; // FABRIC_GROUP_ID l_orlenaProcs[5].procFabricChip = 1; // FABRIC_CHIP_ID l_orlenaProcs[5].iv_masterCapable = false; // Not master proc l_orlenaProcs[5].iv_deconfigured = false; // HWAS state @@ -2279,7 +2279,7 @@ public: // Proc6: l_orlenaProcs[6].iv_pThisProc = NULL; // Target * l_orlenaProcs[6].procHUID = 6; // HUID - l_orlenaProcs[6].procFabricNode = 3; // FABRIC_NODE_ID + l_orlenaProcs[6].procFabricGroup = 3; // FABRIC_GROUP_ID l_orlenaProcs[6].procFabricChip = 0; // FABRIC_CHIP_ID l_orlenaProcs[6].iv_masterCapable = false; // Not master proc l_orlenaProcs[6].iv_deconfigured = false; // HWAS state @@ -2294,7 +2294,7 @@ public: // Proc7: l_orlenaProcs[7].iv_pThisProc = NULL; // Target * l_orlenaProcs[7].procHUID = 7; // HUID - l_orlenaProcs[7].procFabricNode = 3; // FABRIC_NODE_ID + l_orlenaProcs[7].procFabricGroup = 3; // FABRIC_GROUP_ID l_orlenaProcs[7].procFabricChip = 1; // FABRIC_CHIP_ID l_orlenaProcs[7].iv_masterCapable = false; // Not master proc l_orlenaProcs[7].iv_deconfigured = false; // HWAS state @@ -2365,7 +2365,7 @@ public: // Proc0: l_orlenaProcs[0].iv_pThisProc = NULL; // Target * l_orlenaProcs[0].procHUID = 0; // HUID - l_orlenaProcs[0].procFabricNode = 0; // FABRIC_NODE_ID + l_orlenaProcs[0].procFabricGroup = 0; // FABRIC_GROUP_ID l_orlenaProcs[0].procFabricChip = 0; // FABRIC_CHIP_ID l_orlenaProcs[0].iv_masterCapable = true; // Master proc l_orlenaProcs[0].iv_deconfigured = false; // HWAS state @@ -2380,7 +2380,7 @@ public: // Proc1: l_orlenaProcs[1].iv_pThisProc = NULL; // Target * l_orlenaProcs[1].procHUID = 1; // HUID - l_orlenaProcs[1].procFabricNode = 0; // FABRIC_NODE_ID + l_orlenaProcs[1].procFabricGroup = 0; // FABRIC_GROUP_ID l_orlenaProcs[1].procFabricChip = 1; // FABRIC_CHIP_ID l_orlenaProcs[1].iv_masterCapable = false; // Not master proc l_orlenaProcs[1].iv_deconfigured = false; // HWAS state @@ -2394,7 +2394,7 @@ public: // Proc2: l_orlenaProcs[2].iv_pThisProc = NULL; // Target * l_orlenaProcs[2].procHUID = 2; // HUID - l_orlenaProcs[2].procFabricNode = 1; // FABRIC_NODE_ID + l_orlenaProcs[2].procFabricGroup = 1; // FABRIC_GROUP_ID l_orlenaProcs[2].procFabricChip = 0; // FABRIC_CHIP_ID l_orlenaProcs[2].iv_masterCapable = false; // Not master proc l_orlenaProcs[2].iv_deconfigured = false; // HWAS state @@ -2409,7 +2409,7 @@ public: // Proc3: l_orlenaProcs[3].iv_pThisProc = NULL; // Target * l_orlenaProcs[3].procHUID = 3; // HUID - l_orlenaProcs[3].procFabricNode = 1; // FABRIC_NODE_ID + l_orlenaProcs[3].procFabricGroup = 1; // FABRIC_GROUP_ID l_orlenaProcs[3].procFabricChip = 1; // FABRIC_CHIP_ID l_orlenaProcs[3].iv_masterCapable = false; // Not master proc l_orlenaProcs[3].iv_deconfigured = false; // HWAS state @@ -2423,7 +2423,7 @@ public: // Proc4: l_orlenaProcs[4].iv_pThisProc = NULL; // Target * l_orlenaProcs[4].procHUID = 4; // HUID - l_orlenaProcs[4].procFabricNode = 2; // FABRIC_NODE_ID + l_orlenaProcs[4].procFabricGroup = 2; // FABRIC_GROUP_ID l_orlenaProcs[4].procFabricChip = 0; // FABRIC_CHIP_ID l_orlenaProcs[4].iv_masterCapable = false; // Master proc l_orlenaProcs[4].iv_deconfigured = true; // HWAS state @@ -2441,7 +2441,7 @@ public: // Proc5: l_orlenaProcs[5].iv_pThisProc = NULL; // Target * l_orlenaProcs[5].procHUID = 5; // HUID - l_orlenaProcs[5].procFabricNode = 2; // FABRIC_NODE_ID + l_orlenaProcs[5].procFabricGroup = 2; // FABRIC_GROUP_ID l_orlenaProcs[5].procFabricChip = 1; // FABRIC_CHIP_ID l_orlenaProcs[5].iv_masterCapable = false; // Not master proc l_orlenaProcs[5].iv_deconfigured = false; // HWAS state @@ -2457,7 +2457,7 @@ public: // Proc6: l_orlenaProcs[6].iv_pThisProc = NULL; // Target * l_orlenaProcs[6].procHUID = 6; // HUID - l_orlenaProcs[6].procFabricNode = 3; // FABRIC_NODE_ID + l_orlenaProcs[6].procFabricGroup = 3; // FABRIC_GROUP_ID l_orlenaProcs[6].procFabricChip = 0; // FABRIC_CHIP_ID l_orlenaProcs[6].iv_masterCapable = false; // Not master proc l_orlenaProcs[6].iv_deconfigured = false; // HWAS state @@ -2472,7 +2472,7 @@ public: // Proc7: l_orlenaProcs[7].iv_pThisProc = NULL; // Target * l_orlenaProcs[7].procHUID = 7; // HUID - l_orlenaProcs[7].procFabricNode = 3; // FABRIC_NODE_ID + l_orlenaProcs[7].procFabricGroup = 3; // FABRIC_GROUP_ID l_orlenaProcs[7].procFabricChip = 1; // FABRIC_CHIP_ID l_orlenaProcs[7].iv_masterCapable = false; // Not master proc l_orlenaProcs[7].iv_deconfigured = false; // HWAS state @@ -2545,7 +2545,7 @@ public: // Proc0: l_brazosProcs[0].iv_pThisProc = NULL; // Target * l_brazosProcs[0].procHUID = 0; // HUID - l_brazosProcs[0].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[0].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[0].procFabricChip = 0; // FABRIC_CHIP_ID l_brazosProcs[0].iv_masterCapable = true; // Master proc l_brazosProcs[0].iv_deconfigured = false; // HWAS state @@ -2558,7 +2558,7 @@ public: // Proc1: l_brazosProcs[1].iv_pThisProc = NULL; // Target * l_brazosProcs[1].procHUID = 1; // HUID - l_brazosProcs[1].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[1].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[1].procFabricChip = 1; // FABRIC_CHIP_ID l_brazosProcs[1].iv_masterCapable = false; // Not master proc l_brazosProcs[1].iv_deconfigured = false; // HWAS state @@ -2572,7 +2572,7 @@ public: // Proc2: l_brazosProcs[2].iv_pThisProc = NULL; // Target * l_brazosProcs[2].procHUID = 2; // HUID - l_brazosProcs[2].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[2].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[2].procFabricChip = 2; // FABRIC_CHIP_ID l_brazosProcs[2].iv_masterCapable = false; // Not master proc l_brazosProcs[2].iv_deconfigured = false; // HWAS state @@ -2584,7 +2584,7 @@ public: // Proc3: l_brazosProcs[3].iv_pThisProc = NULL; // Target * l_brazosProcs[3].procHUID = 3; // HUID - l_brazosProcs[3].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[3].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[3].procFabricChip = 3; // FABRIC_CHIP_ID l_brazosProcs[3].iv_masterCapable = false; // Not master proc l_brazosProcs[3].iv_deconfigured = false; // HWAS state @@ -2795,7 +2795,7 @@ public: // Proc0: l_tuletaProcs[0].iv_pThisProc = NULL; // Target * l_tuletaProcs[0].procHUID = 0; // HUID - l_tuletaProcs[0].procFabricNode = 0; // FABRIC_NODE_ID + l_tuletaProcs[0].procFabricGroup = 0; // FABRIC_GROUP_ID l_tuletaProcs[0].procFabricChip = 0; // FABRIC_CHIP_ID l_tuletaProcs[0].iv_masterCapable = true; // Master proc l_tuletaProcs[0].iv_deconfigured = false; // HWAS state @@ -2808,7 +2808,7 @@ public: // Proc1: l_tuletaProcs[1].iv_pThisProc = NULL; // Target * l_tuletaProcs[1].procHUID = 1; // HUID - l_tuletaProcs[1].procFabricNode = 0; // FABRIC_NODE_ID + l_tuletaProcs[1].procFabricGroup = 0; // FABRIC_GROUP_ID l_tuletaProcs[1].procFabricChip = 1; // FABRIC_CHIP_ID l_tuletaProcs[1].iv_masterCapable = false; // Not master proc l_tuletaProcs[1].iv_deconfigured = false; // HWAS state @@ -2821,7 +2821,7 @@ public: // Proc2: l_tuletaProcs[2].iv_pThisProc = NULL; // Target * l_tuletaProcs[2].procHUID = 2; // HUID - l_tuletaProcs[2].procFabricNode = 1; // FABRIC_NODE_ID + l_tuletaProcs[2].procFabricGroup = 1; // FABRIC_GROUP_ID l_tuletaProcs[2].procFabricChip = 0; // FABRIC_CHIP_ID l_tuletaProcs[2].iv_masterCapable = false; // Not master proc l_tuletaProcs[2].iv_deconfigured = true; // HWAS state @@ -2836,7 +2836,7 @@ public: // Proc3: l_tuletaProcs[3].iv_pThisProc = NULL; // Target * l_tuletaProcs[3].procHUID = 3; // HUID - l_tuletaProcs[3].procFabricNode = 1; // FABRIC_NODE_ID + l_tuletaProcs[3].procFabricGroup = 1; // FABRIC_GROUP_ID l_tuletaProcs[3].procFabricChip = 1; // FABRIC_CHIP_ID l_tuletaProcs[3].iv_masterCapable = false; // Not master proc l_tuletaProcs[3].iv_deconfigured = true; // HWAS state @@ -2902,7 +2902,7 @@ public: // Proc0: l_tuletaProcs[0].iv_pThisProc = NULL; // Target * l_tuletaProcs[0].procHUID = 0; // HUID - l_tuletaProcs[0].procFabricNode = 0; // FABRIC_NODE_ID + l_tuletaProcs[0].procFabricGroup = 0; // FABRIC_GROUP_ID l_tuletaProcs[0].procFabricChip = 0; // FABRIC_CHIP_ID l_tuletaProcs[0].iv_masterCapable = true; // Master proc l_tuletaProcs[0].iv_deconfigured = false; // HWAS state @@ -2915,7 +2915,7 @@ public: // Proc1: l_tuletaProcs[1].iv_pThisProc = NULL; // Target * l_tuletaProcs[1].procHUID = 1; // HUID - l_tuletaProcs[1].procFabricNode = 0; // FABRIC_NODE_ID + l_tuletaProcs[1].procFabricGroup = 0; // FABRIC_GROUP_ID l_tuletaProcs[1].procFabricChip = 1; // FABRIC_CHIP_ID l_tuletaProcs[1].iv_masterCapable = false; // Not master proc l_tuletaProcs[1].iv_deconfigured = false; // HWAS state @@ -2925,7 +2925,7 @@ public: // Proc2: l_tuletaProcs[2].iv_pThisProc = NULL; // Target * l_tuletaProcs[2].procHUID = 2; // HUID - l_tuletaProcs[2].procFabricNode = 1; // FABRIC_NODE_ID + l_tuletaProcs[2].procFabricGroup = 1; // FABRIC_GROUP_ID l_tuletaProcs[2].procFabricChip = 0; // FABRIC_CHIP_ID l_tuletaProcs[2].iv_masterCapable = false; // Not master proc l_tuletaProcs[2].iv_deconfigured = false; // HWAS state @@ -2937,7 +2937,7 @@ public: // Proc3: l_tuletaProcs[3].iv_pThisProc = NULL; // Target * l_tuletaProcs[3].procHUID = 3; // HUID - l_tuletaProcs[3].procFabricNode = 1; // FABRIC_NODE_ID + l_tuletaProcs[3].procFabricGroup = 1; // FABRIC_GROUP_ID l_tuletaProcs[3].procFabricChip = 1; // FABRIC_CHIP_ID l_tuletaProcs[3].iv_masterCapable = false; // Not master proc l_tuletaProcs[3].iv_deconfigured = true; // HWAS state @@ -2998,7 +2998,7 @@ public: // Proc0: l_brazosProcs[0].iv_pThisProc = NULL; // Target * l_brazosProcs[0].procHUID = 0; // HUID - l_brazosProcs[0].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[0].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[0].procFabricChip = 0; // FABRIC_CHIP_ID l_brazosProcs[0].iv_masterCapable = true; // Master proc l_brazosProcs[0].iv_deconfigured = false; // HWAS state @@ -3011,7 +3011,7 @@ public: // Proc1: l_brazosProcs[1].iv_pThisProc = NULL; // Target * l_brazosProcs[1].procHUID = 1; // HUID - l_brazosProcs[1].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[1].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[1].procFabricChip = 1; // FABRIC_CHIP_ID l_brazosProcs[1].iv_masterCapable = true; // Not master proc l_brazosProcs[1].iv_deconfigured = false; // HWAS state @@ -3025,7 +3025,7 @@ public: // Proc2: l_brazosProcs[2].iv_pThisProc = NULL; // Target * l_brazosProcs[2].procHUID = 2; // HUID - l_brazosProcs[2].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[2].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[2].procFabricChip = 2; // FABRIC_CHIP_ID l_brazosProcs[2].iv_masterCapable = false; // Not master proc l_brazosProcs[2].iv_deconfigured = false; // HWAS state @@ -3037,7 +3037,7 @@ public: // Proc3: l_brazosProcs[3].iv_pThisProc = NULL; // Target * l_brazosProcs[3].procHUID = 3; // HUID - l_brazosProcs[3].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[3].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[3].procFabricChip = 3; // FABRIC_CHIP_ID l_brazosProcs[3].iv_masterCapable = false; // Not master proc l_brazosProcs[3].iv_deconfigured = false; // HWAS state @@ -3100,7 +3100,7 @@ public: // Proc0: l_brazosProcs[0].iv_pThisProc = NULL; // Target * l_brazosProcs[0].procHUID = 0; // HUID - l_brazosProcs[0].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[0].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[0].procFabricChip = 0; // FABRIC_CHIP_ID l_brazosProcs[0].iv_masterCapable = true; // Master proc l_brazosProcs[0].iv_deconfigured = true; // HWAS state @@ -3113,7 +3113,7 @@ public: // Proc1: l_brazosProcs[1].iv_pThisProc = NULL; // Target * l_brazosProcs[1].procHUID = 1; // HUID - l_brazosProcs[1].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[1].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[1].procFabricChip = 1; // FABRIC_CHIP_ID l_brazosProcs[1].iv_masterCapable = true; // Not master proc l_brazosProcs[1].iv_deconfigured = false; // HWAS state @@ -3127,7 +3127,7 @@ public: // Proc2: l_brazosProcs[2].iv_pThisProc = NULL; // Target * l_brazosProcs[2].procHUID = 2; // HUID - l_brazosProcs[2].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[2].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[2].procFabricChip = 2; // FABRIC_CHIP_ID l_brazosProcs[2].iv_masterCapable = false; // Not master proc l_brazosProcs[2].iv_deconfigured = false; // HWAS state @@ -3139,7 +3139,7 @@ public: // Proc3: l_brazosProcs[3].iv_pThisProc = NULL; // Target * l_brazosProcs[3].procHUID = 3; // HUID - l_brazosProcs[3].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[3].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[3].procFabricChip = 3; // FABRIC_CHIP_ID l_brazosProcs[3].iv_masterCapable = false; // Not master proc l_brazosProcs[3].iv_deconfigured = false; // HWAS state @@ -3202,7 +3202,7 @@ public: // Proc0: l_brazosProcs[0].iv_pThisProc = NULL; // Target * l_brazosProcs[0].procHUID = 0; // HUID - l_brazosProcs[0].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[0].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[0].procFabricChip = 0; // FABRIC_CHIP_ID l_brazosProcs[0].iv_masterCapable = true; // Master proc l_brazosProcs[0].iv_deconfigured = false; // HWAS state @@ -3215,7 +3215,7 @@ public: // Proc1: l_brazosProcs[1].iv_pThisProc = NULL; // Target * l_brazosProcs[1].procHUID = 1; // HUID - l_brazosProcs[1].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[1].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[1].procFabricChip = 1; // FABRIC_CHIP_ID l_brazosProcs[1].iv_masterCapable = true; // Not master proc l_brazosProcs[1].iv_deconfigured = true; // HWAS state @@ -3229,7 +3229,7 @@ public: // Proc2: l_brazosProcs[2].iv_pThisProc = NULL; // Target * l_brazosProcs[2].procHUID = 2; // HUID - l_brazosProcs[2].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[2].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[2].procFabricChip = 2; // FABRIC_CHIP_ID l_brazosProcs[2].iv_masterCapable = false; // Not master proc l_brazosProcs[2].iv_deconfigured = false; // HWAS state @@ -3241,7 +3241,7 @@ public: // Proc3: l_brazosProcs[3].iv_pThisProc = NULL; // Target * l_brazosProcs[3].procHUID = 3; // HUID - l_brazosProcs[3].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[3].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[3].procFabricChip = 3; // FABRIC_CHIP_ID l_brazosProcs[3].iv_masterCapable = false; // Not master proc l_brazosProcs[3].iv_deconfigured = false; // HWAS state @@ -3305,7 +3305,7 @@ public: // Proc0: l_brazosProcs[0].iv_pThisProc = NULL; // Target * l_brazosProcs[0].procHUID = 0; // HUID - l_brazosProcs[0].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[0].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[0].procFabricChip = 0; // FABRIC_CHIP_ID l_brazosProcs[0].iv_masterCapable = true; // Master proc l_brazosProcs[0].iv_deconfigured = true; // HWAS state @@ -3318,7 +3318,7 @@ public: // Proc1: l_brazosProcs[1].iv_pThisProc = NULL; // Target * l_brazosProcs[1].procHUID = 1; // HUID - l_brazosProcs[1].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[1].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[1].procFabricChip = 1; // FABRIC_CHIP_ID l_brazosProcs[1].iv_masterCapable = true; // Not master proc l_brazosProcs[1].iv_deconfigured = false; // HWAS state @@ -3333,7 +3333,7 @@ public: // Proc2: l_brazosProcs[2].iv_pThisProc = NULL; // Target * l_brazosProcs[2].procHUID = 2; // HUID - l_brazosProcs[2].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[2].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[2].procFabricChip = 2; // FABRIC_CHIP_ID l_brazosProcs[2].iv_masterCapable = false; // Not master proc l_brazosProcs[2].iv_deconfigured = false; // HWAS state @@ -3346,7 +3346,7 @@ public: // Proc3: l_brazosProcs[3].iv_pThisProc = NULL; // Target * l_brazosProcs[3].procHUID = 3; // HUID - l_brazosProcs[3].procFabricNode = 0; // FABRIC_NODE_ID + l_brazosProcs[3].procFabricGroup = 0; // FABRIC_GROUP_ID l_brazosProcs[3].procFabricChip = 3; // FABRIC_CHIP_ID l_brazosProcs[3].iv_masterCapable = false; // Not master proc l_brazosProcs[3].iv_deconfigured = false; // HWAS state diff --git a/src/usr/hwpf/hwp/occ/occ.C b/src/usr/hwpf/hwp/occ/occ.C index 8c7e67e9d..070477fa7 100644 --- a/src/usr/hwpf/hwp/occ/occ.C +++ b/src/usr/hwpf/hwp/occ/occ.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2013,2015 */ +/* Contributors Listed Below - COPYRIGHT 2013,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -392,7 +392,7 @@ namespace HBOCC TRACUCOMP( g_fapiImpTd, INFO_MRK "loadnStartAllOccs: Cur target nodeID=%d", - targ0->getAttr<ATTR_FABRIC_NODE_ID>()); + targ0->getAttr<ATTR_FABRIC_GROUP_ID>()); //if the next target in the list is in the same node @@ -402,11 +402,11 @@ namespace HBOCC { TRACUCOMP( g_fapiImpTd, INFO_MRK "loadnStartAllOccs: n+1 target nodeID=%d", - ((*(itr+1))->getAttr<ATTR_FABRIC_NODE_ID>()) + ((*(itr+1))->getAttr<ATTR_FABRIC_GROUP_ID>()) ); - if((targ0->getAttr<ATTR_FABRIC_NODE_ID>()) == - ((*(itr+1))->getAttr<ATTR_FABRIC_NODE_ID>())) + if((targ0->getAttr<ATTR_FABRIC_GROUP_ID>()) == + ((*(itr+1))->getAttr<ATTR_FABRIC_GROUP_ID>())) { itr++; targ1 = *itr; diff --git a/src/usr/hwpf/hwp/occ/occ_common.C b/src/usr/hwpf/hwp/occ/occ_common.C index 33ab95e0d..285eeebe3 100644 --- a/src/usr/hwpf/hwp/occ/occ_common.C +++ b/src/usr/hwpf/hwp/occ/occ_common.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2013,2015 */ +/* Contributors Listed Below - COPYRIGHT 2013,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -850,17 +850,17 @@ namespace HBOCC Target* targ1 = NULL; TRACFCOMP( g_fapiImpTd, INFO_MRK"stopAllOCCs: Cur target nodeID=%d", - targ0->getAttr<ATTR_FABRIC_NODE_ID>()); + targ0->getAttr<ATTR_FABRIC_GROUP_ID>()); //if the next target in the list is in the same node // they are on the same DCM, so bump itr forward // and update targ0 pointer if((itr+1) != procChips.end()) { - TRACFCOMP( g_fapiImpTd, INFO_MRK"stopAllOCCs: n+1 target nodeID=%d", ((*(itr+1))->getAttr<ATTR_FABRIC_NODE_ID>())); + TRACFCOMP( g_fapiImpTd, INFO_MRK"stopAllOCCs: n+1 target nodeID=%d", ((*(itr+1))->getAttr<ATTR_FABRIC_GROUP_ID>())); - if((targ0->getAttr<ATTR_FABRIC_NODE_ID>()) == - ((*(itr+1))->getAttr<ATTR_FABRIC_NODE_ID>())) + if((targ0->getAttr<ATTR_FABRIC_GROUP_ID>()) == + ((*(itr+1))->getAttr<ATTR_FABRIC_GROUP_ID>())) { //need to flip the numbers because we were reversed targ1 = targ0; diff --git a/src/usr/hwpf/hwp/occ/runtime/rt_occ.C b/src/usr/hwpf/hwp/occ/runtime/rt_occ.C index cb7a1b45a..282dacb96 100644 --- a/src/usr/hwpf/hwp/occ/runtime/rt_occ.C +++ b/src/usr/hwpf/hwp/occ/runtime/rt_occ.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2014,2015 */ +/* Contributors Listed Below - COPYRIGHT 2014,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -351,8 +351,8 @@ namespace RT_OCC TARGETING::Target* t1 = NULL; if((itarg+1) != targets.end()) { - if((t0->getAttr<ATTR_FABRIC_NODE_ID>()) == - ((*(itarg+1))->getAttr<ATTR_FABRIC_NODE_ID>())) + if((t0->getAttr<ATTR_FABRIC_GROUP_ID>()) == + ((*(itarg+1))->getAttr<ATTR_FABRIC_GROUP_ID>())) { ++itarg; t1 = *itarg; diff --git a/src/usr/intr/intrrp.C b/src/usr/intr/intrrp.C index 8bd385947..7a19429aa 100644 --- a/src/usr/intr/intrrp.C +++ b/src/usr/intr/intrrp.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2015 */ +/* Contributors Listed Below - COPYRIGHT 2011,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -50,6 +50,7 @@ #include <hwas/common/hwasCallout.H> #include <fsi/fsiif.H> #include <arch/ppc.H> +#include <arch/pirformat.H> #include <config.h> #define INTR_TRACE_NAME INTR_COMP_NAME @@ -185,8 +186,8 @@ errlHndl_t IntrRp::_init() iv_masterCpu = cpuid; iv_masterCpu.threadId = 0; - TRACFCOMP(g_trac_intr,"Master cpu node[%d], chip[%d], core[%d], thread[%d]", - iv_masterCpu.nodeId, iv_masterCpu.chipId, iv_masterCpu.coreId, + TRACFCOMP(g_trac_intr,"Master cpu group[%d], chip[%d], core[%d], thread[%d]", + iv_masterCpu.groupId, iv_masterCpu.chipId, iv_masterCpu.coreId, iv_masterCpu.threadId); // The base realAddr is the base address for the whole system. @@ -200,7 +201,7 @@ errlHndl_t IntrRp::_init() uint64_t barValue = 0; barValue = procTarget->getAttr<TARGETING::ATTR_INTP_BASE_ADDR>(); - // Mask off node & chip id to get base address + // Mask off group & chip id to get base address uint64_t realAddr = barValue & ICPBAR_BASE_ADDRESS_MASK; TRACFCOMP(g_trac_intr,"INTR: realAddr = %lx",realAddr); @@ -607,9 +608,9 @@ void IntrRp::msgHandler() pir.threadId = 0; iv_cpuList.push_back(pir); - TRACFCOMP(g_trac_intr,"Add CPU node[%d], chip[%d]," + TRACFCOMP(g_trac_intr,"Add CPU group[%d], chip[%d]," "core[%d], thread[%d]", - pir.nodeId, pir.chipId, pir.coreId, + pir.groupId, pir.chipId, pir.coreId, pir.threadId); size_t threads = cpu_thread_count(); @@ -709,7 +710,7 @@ void IntrRp::msgHandler() uint32_t * xirrAddress = reinterpret_cast<uint32_t*>(baseAddr + XIRR_OFFSET); - //Generate the mailbox IRSN for this node + //Generate the mailbox IRSN for this group uint32_t l_irsn = makeXISR(iv_masterCpu, ISN_FSI); l_irsn |= CPPR_MASK; //set all CPPR bits - allow any INTR @@ -879,9 +880,9 @@ errlHndl_t IntrRp::initIRSCReg(TARGETING::Target * i_target) iv_chipList.end()) { uint8_t chip = 0; - uint8_t node = 0; + uint8_t group = 0; - node = i_target->getAttr<ATTR_FABRIC_NODE_ID>(); + group = i_target->getAttr<ATTR_FABRIC_NODE_ID>(); chip = i_target->getAttr<ATTR_FABRIC_CHIP_ID>(); size_t scom_len = sizeof(uint64_t); @@ -900,7 +901,7 @@ errlHndl_t IntrRp::initIRSCReg(TARGETING::Target * i_target) PSIHB_ISRN_REG_t reg; PIR_t pir(0); - pir.nodeId = node; + pir.groupId = group; pir.chipId = chip; // IRSN must be unique for each processor chip reg.irsn = makeXISR(pir,0); @@ -1112,7 +1113,7 @@ errlHndl_t IntrRp::registerInterruptISN(msg_q_t i_msgQ, chip = (*target_itr)->getAttr<ATTR_FABRIC_CHIP_ID>(); PIR_t pir(0); - pir.nodeId = node; + pir.groupId = node; pir.chipId = chip; uint32_t l_irsn = makeXISR(pir, i_intr_type); @@ -1186,7 +1187,7 @@ msg_q_t IntrRp::unregisterInterruptISN(ISNvalue_t i_intr_type) chip = (*target_itr)->getAttr<ATTR_FABRIC_CHIP_ID>(); PIR_t pir(0); - pir.nodeId = node; + pir.groupId = node; pir.chipId = chip; uint32_t l_irsn = makeXISR(pir, i_intr_type); @@ -1247,7 +1248,7 @@ void IntrRp::initInterruptPresenter(const PIR_t i_pir) const LinkReg_t linkReg; linkReg.word = 0; linkReg.loopTrip = 1; // needed? - linkReg.node = iv_masterCpu.nodeId; + linkReg.node = iv_masterCpu.groupId; linkReg.pchip= iv_masterCpu.chipId; linkReg.pcore= iv_masterCpu.coreId; linkReg.tspec= iv_masterCpu.threadId; @@ -1684,7 +1685,7 @@ errlHndl_t IntrRp::blindIssueEOIs(TARGETING::Target * i_proc) (*core)->getAttr<TARGETING::ATTR_CHIP_UNIT>(); PIR_t pir(0); - pir.nodeId = node; + pir.groupId = node; pir.chipId = chip; pir.coreId = coreId; @@ -1900,7 +1901,7 @@ void IntrRp::allowAllInterrupts(TARGETING::Target* i_core) CHIP_UNIT_ATTR coreId = i_core->getAttr<TARGETING::ATTR_CHIP_UNIT>(); PIR_t pir(0); - pir.nodeId = node; + pir.groupId = node; pir.chipId = chip; pir.coreId = coreId; @@ -1924,7 +1925,7 @@ void IntrRp::disableAllInterrupts(TARGETING::Target* i_core) CHIP_UNIT_ATTR coreId = i_core->getAttr<TARGETING::ATTR_CHIP_UNIT>(); PIR_t pir(0); - pir.nodeId = node; + pir.groupId = node; pir.chipId = chip; pir.coreId = coreId; @@ -1960,7 +1961,7 @@ void IntrRp::drainMpIplInterrupts(TARGETING::TargetHandleList & i_cores) (*core)->getAttr<TARGETING::ATTR_CHIP_UNIT>(); PIR_t pir(0); - pir.nodeId = node; + pir.groupId = node; pir.chipId = chip; pir.coreId = coreId; @@ -2193,7 +2194,7 @@ errlHndl_t IntrRp::syncNodes(intr_mpipl_sync_t i_sync_type) uint64_t hrmorBase = KernelIpc::ipc_data_area.hrmor_base; void * node_info_ptr = - reinterpret_cast<void *>((iv_masterCpu.nodeId * hrmorBase) + + reinterpret_cast<void *>((iv_masterCpu.groupId * hrmorBase) + VMM_INTERNODE_PRESERVED_MEMORY_ADDR); internode_info_t * this_node_info = @@ -2224,7 +2225,7 @@ errlHndl_t IntrRp::syncNodes(intr_mpipl_sync_t i_sync_type) for(uint64_t node = 0; node < MAX_NODES_PER_SYS; ++node) { - if (node == iv_masterCpu.nodeId) + if (node == iv_masterCpu.groupId) { vaddr[node] = this_node_info; } @@ -2296,7 +2297,7 @@ errlHndl_t IntrRp::syncNodes(intr_mpipl_sync_t i_sync_type) { // We are still using this_node_info area // so unmap it later. - if(node != iv_masterCpu.nodeId) + if(node != iv_masterCpu.groupId) { mm_block_unmap(vaddr[node]); } @@ -2316,7 +2317,7 @@ errlHndl_t IntrRp::initializeMpiplSyncArea() errlHndl_t err = NULL; uint64_t hrmorBase = KernelIpc::ipc_data_area.hrmor_base; void * node_info_ptr = - reinterpret_cast<void *>((iv_masterCpu.nodeId * hrmorBase) + + reinterpret_cast<void *>((iv_masterCpu.groupId * hrmorBase) + VMM_INTERNODE_PRESERVED_MEMORY_ADDR); internode_info_t * this_node_info = @@ -2335,7 +2336,7 @@ errlHndl_t IntrRp::initializeMpiplSyncArea() this_node_info->mpipl_intr_sync = INTR_MPIPL_SYNC_CLEAR; for(uint64_t node = 0; node < MAX_NODES_PER_SYS; ++node) { - if(iv_masterCpu.nodeId == node) + if(iv_masterCpu.groupId == node) { this_node_info->exist[node] = true; } @@ -2376,7 +2377,7 @@ errlHndl_t IntrRp::addHbNodeToMpiplSyncArea(uint64_t i_hbNode) errlHndl_t err = NULL; uint64_t hrmorBase = KernelIpc::ipc_data_area.hrmor_base; void * node_info_ptr = - reinterpret_cast<void *>((iv_masterCpu.nodeId * hrmorBase) + + reinterpret_cast<void *>((iv_masterCpu.groupId * hrmorBase) + VMM_INTERNODE_PRESERVED_MEMORY_ADDR); internode_info_t * this_node_info = @@ -2426,7 +2427,7 @@ errlHndl_t IntrRp::extractHbNodeInfo(void) uint64_t hrmorBase = KernelIpc::ipc_data_area.hrmor_base; TARGETING::ATTR_HB_EXISTING_IMAGE_type hb_existing_image = 0; void * node_info_ptr = - reinterpret_cast<void *>((iv_masterCpu.nodeId * hrmorBase) + + reinterpret_cast<void *>((iv_masterCpu.groupId * hrmorBase) + VMM_INTERNODE_PRESERVED_MEMORY_ADDR); internode_info_t * this_node_info = @@ -2715,7 +2716,7 @@ uint64_t INTR::getIntpAddr(const TARGETING::Target * i_ex, uint8_t i_thread) uint64_t l_intB =l_proc->getAttr<TARGETING::ATTR_INTP_BASE_ADDR>(); PIR_t pir(0); - pir.nodeId = l_proc->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>(); + pir.groupId = l_proc->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>(); pir.chipId = l_proc->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>(); pir.coreId = i_ex->getAttr<TARGETING::ATTR_CHIP_UNIT>(); pir.threadId = i_thread; diff --git a/src/usr/intr/intrrp.H b/src/usr/intr/intrrp.H index 35268215f..ca0fa83aa 100644 --- a/src/usr/intr/intrrp.H +++ b/src/usr/intr/intrrp.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2015 */ +/* Contributors Listed Below - COPYRIGHT 2011,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -37,6 +37,7 @@ #include <intr/interrupt.H> #include <map> #include <algorithm> +#include <arch/pirformat.H> struct msg_t; @@ -61,7 +62,7 @@ namespace INTR r.u32 = 0; r.isn = i_isn; r.chip = i_pir.chipId; - r.node = i_pir.nodeId; + r.node = i_pir.groupId; r.intrproc = 1; // not interproc intr return r.u32; } @@ -176,7 +177,7 @@ namespace INTR // [0] last // [1] LoopTrip // [2:18] Reserved - // [19:21] NodeId + // [19:21] GroupId // [22:24] ChipId // [25:28] PCore // [29:31] TSpec diff --git a/src/usr/isteps/istep10/call_proc_build_smp.C b/src/usr/isteps/istep10/call_proc_build_smp.C index 24323255d..0d3cf18b2 100644 --- a/src/usr/isteps/istep10/call_proc_build_smp.C +++ b/src/usr/isteps/istep10/call_proc_build_smp.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -159,9 +159,9 @@ void* call_proc_build_smp (void *io_pArgs) (const_cast<TARGETING::Target*>(l_itr->second))); l_procEntry.f0_node_id = static_cast<proc_fab_smp_node_id>( - l_pTarget->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>()); + l_pTarget->getAttr<TARGETING::ATTR_FABRIC_GROUP_ID>()); l_procEntry.f1_node_id = static_cast<proc_fab_smp_node_id>( - l_pParent->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>()); + l_pParent->getAttr<TARGETING::ATTR_FABRIC_GROUP_ID>()); } // Get X-BUS diff --git a/src/usr/isteps/istep14/call_proc_exit_cache_contained.C b/src/usr/isteps/istep14/call_proc_exit_cache_contained.C index d517b6979..a3a11e59e 100644 --- a/src/usr/isteps/istep14/call_proc_exit_cache_contained.C +++ b/src/usr/isteps/istep14/call_proc_exit_cache_contained.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -36,7 +36,7 @@ #include <targeting/common/utilFilter.H> #include <sys/mm.h> -#include <intr/interrupt.H> +#include <arch/pirformat.H> #include <isteps/hwpf_reasoncodes.H> // @TODO RTC:134082 remove below block @@ -103,11 +103,11 @@ void* call_proc_exit_cache_contained (void *io_pArgs) l_sys->getAttr<TARGETING::ATTR_MIRROR_BASE_ADDRESS>(); // For single-node systems, the non-master processors can be - // in a different logical (powerbus) node. + // in a different logical (powerbus) group. // Need to migrate task to master. task_affinity_pin(); task_affinity_migrate_to_master(); - uint64_t this_node = INTR::PIR_t(task_getcpuid()).nodeId; + uint64_t this_node = PIR_t(task_getcpuid()).groupId; task_affinity_unpin(); l_mirrorBaseAddr += (this_node * hrmor_base)/2; diff --git a/src/usr/isteps/istep16/call_host_activate_slave_cores.C b/src/usr/isteps/istep16/call_host_activate_slave_cores.C index 88e8f025e..ebb51482c 100644 --- a/src/usr/isteps/istep16/call_host_activate_slave_cores.C +++ b/src/usr/isteps/istep16/call_host_activate_slave_cores.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -38,7 +38,7 @@ #include <isteps/hwpisteperror.H> #include <errl/errludtarget.H> -#include <intr/interrupt.H> +#include <arch/pirformat.H> #include <console/consoleif.H> // targeting support @@ -88,8 +88,8 @@ void* call_host_activate_slave_cores (void *io_pArgs) CHIP_UNIT_ATTR l_coreId = (*l_core)->getAttr<TARGETING::ATTR_CHIP_UNIT>(); - FABRIC_NODE_ID_ATTR l_logicalNodeId = - l_processor->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>(); + FABRIC_GROUP_ID_ATTR l_logicalNodeId = + l_processor->getAttr<TARGETING::ATTR_FABRIC_GROUP_ID>(); FABRIC_CHIP_ID_ATTR l_chipId = l_processor->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>(); TARGETING::Target* sys = NULL; @@ -97,7 +97,7 @@ void* call_host_activate_slave_cores (void *io_pArgs) assert( sys != NULL ); uint64_t en_threads = sys->getAttr<ATTR_ENABLED_THREADS>(); - uint64_t pir = INTR::PIR_t(l_logicalNodeId, l_chipId, l_coreId).word; + uint64_t pir = PIR_t(l_logicalNodeId, l_chipId, l_coreId).word; if (pir != l_masterCoreID) { diff --git a/src/usr/isteps/istep21/call_host_start_payload.C b/src/usr/isteps/istep21/call_host_start_payload.C index f3760ede6..a57ccd01b 100644 --- a/src/usr/isteps/istep21/call_host_start_payload.C +++ b/src/usr/isteps/istep21/call_host_start_payload.C @@ -31,7 +31,6 @@ #include <initservice/initserviceif.H> #include <initservice/istepdispatcherif.H> #include <sys/task.h> -#include <intr/interrupt.H> #include <initservice/extinitserviceif.H> #include <hbotcompid.H> #include <sys/misc.h> @@ -43,9 +42,8 @@ #include <devtree/devtreeif.H> #include <kernel/ipc.H> // for internode data areas #include <mbox/ipc_msg_types.H> - #include <devicefw/userif.H> - +#include <arch/pirformat.H> @@ -195,11 +193,11 @@ void* call_host_start_payload (void *io_pArgs) "call_host_start_payload entry" ); // For single-node systems, the non-master processors can be in a - // different logical (powerbus) node. Need to migrate task to master. + // different logical (powerbus) group. Need to migrate task to master. task_affinity_pin(); task_affinity_migrate_to_master(); - uint64_t this_node = INTR::PIR_t(task_getcpuid()).nodeId; + uint64_t this_node = PIR_t(task_getcpuid()).groupId; task_affinity_unpin(); diff --git a/src/usr/mbox/mailboxsp.C b/src/usr/mbox/mailboxsp.C index 49fae3bdc..9f8a90d24 100644 --- a/src/usr/mbox/mailboxsp.C +++ b/src/usr/mbox/mailboxsp.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2015 */ +/* Contributors Listed Below - COPYRIGHT 2012,2016 */ /* [+] Google Inc. */ /* [+] International Business Machines Corp. */ /* */ @@ -47,6 +47,7 @@ #include <errl/errludprintk.H> #include <errno.h> #include <sys/time.h> +#include <arch/pirformat.H> // Local functions namespace MBOX @@ -1951,8 +1952,8 @@ errlHndl_t MBOX::send(queue_id_t i_q_id, msg_t * i_msg,int i_node) i_msg->extra_data); // node means Hb instance number in this context - INTR::PIR_t my_pir (KernelIpc::ipc_data_area.pir); - if( (my_pir.nodeId == i_node) + PIR_t my_pir (KernelIpc::ipc_data_area.pir); + if( (my_pir.groupId == i_node) && (MBOX::HB_TEST_MSGQ != i_q_id) ) //use IPC for tests { // Message is to this node - don't use IPC path diff --git a/src/usr/runtime/test/runtimeattrstest.H b/src/usr/runtime/test/runtimeattrstest.H index 9236225bd..478f405ea 100644 --- a/src/usr/runtime/test/runtimeattrstest.H +++ b/src/usr/runtime/test/runtimeattrstest.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2015 */ +/* Contributors Listed Below - COPYRIGHT 2012,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -473,11 +473,11 @@ class RuntimeAttrsTest: public CxxTest::TestSuite TARGETING::Target* proc_target = NULL; for( size_t p = 0; p < all_procs.size(); p++ ) { - uint64_t node_id = - all_procs[p]->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>(); - uint64_t CHIP_UNIT_POS = + uint64_t group_id = + all_procs[p]->getAttr<TARGETING::ATTR_FABRIC_GROUP_ID>(); + uint64_t chip_pos = all_procs[p]->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>(); - uint32_t procid = (node_id << 3) | (CHIP_UNIT_POS); //NNNCCC + uint32_t procid = createChipId( node_id, chip_pos ); if( procid == i_procid ) { proc_target = all_procs[p]; diff --git a/src/usr/targeting/common/Targets.pm b/src/usr/targeting/common/Targets.pm index dffb5fa8b..102b9a025 100644 --- a/src/usr/targeting/common/Targets.pm +++ b/src/usr/targeting/common/Targets.pm @@ -5,7 +5,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2015 +# Contributors Listed Below - COPYRIGHT 2015,2016 # [+] International Business Machines Corp. # # @@ -464,8 +464,8 @@ sub buildAffinity $self->setAttribute($target, "PHYS_PATH", $parent_physical); $self->setAttribute($target, "POSITION", $proc); $self->setAttribute($target, "ENTITY_INSTANCE",$proc); - $self->setAttribute($target, "FABRIC_NODE_ID", - $self->getAttribute($socket,"FABRIC_NODE_ID")); + $self->setAttribute($target, "FABRIC_GROUP_ID", + $self->getAttribute($socket,"FABRIC_GROUP_ID")); $self->setAttribute($target, "FABRIC_CHIP_ID", $self->getAttribute($socket,"FABRIC_CHIP_ID")); diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl index 894a6483a..5f46030a0 100755 --- a/src/usr/targeting/common/genHwsvMrwXml.pl +++ b/src/usr/targeting/common/genHwsvMrwXml.pl @@ -3155,7 +3155,7 @@ sub generate_proc <default>instance:$ipath</default> </compileAttribute> <attribute> - <id>FABRIC_NODE_ID</id> + <id>FABRIC_GROUP_ID</id> <default>$lognode</default> </attribute> <attribute> diff --git a/src/usr/targeting/common/processMrw.pl b/src/usr/targeting/common/processMrw.pl index 4f877377d..9d21ec101 100644 --- a/src/usr/targeting/common/processMrw.pl +++ b/src/usr/targeting/common/processMrw.pl @@ -125,7 +125,7 @@ foreach my $n (keys %{$targetObj->{TOPOLOGY}}) { foreach my $p (keys %{$targetObj->{TOPOLOGY}->{$n}}) { if ($targetObj->{TOPOLOGY}->{$n}->{$p} > 1) { print "ERROR: Fabric topology invalid. 2 targets have same ". - "FABRIC_NODE_ID,FABRIC_CHIP_ID ($n,$p)\n"; + "FABRIC_GROUP_ID,FABRIC_CHIP_ID ($n,$p)\n"; $targetObj->myExit(3); } } @@ -614,9 +614,9 @@ sub setupBars #-------------------------------------------------- ## Setup BARs - my $node = $targetObj->getAttribute($target, "FABRIC_NODE_ID"); + my $group = $targetObj->getAttribute($target, "FABRIC_GROUP_ID"); my $proc = $targetObj->getAttribute($target, "FABRIC_CHIP_ID"); - $targetObj->{TOPOLOGY}->{$node}->{$proc}++; + $targetObj->{TOPOLOGY}->{$group}->{$proc}++; my @bars=("FSP_BASE_ADDR","PSI_BRIDGE_BASE_ADDR", "INTP_BASE_ADDR","PHB_MMIO_ADDRS_64","PHB_MMIO_ADDRS_32", @@ -636,10 +636,10 @@ sub setupBars foreach my $bar (@bars) { - my ($num,$base,$node_offset,$proc_offset,$offset) = split(/,/, + my ($num,$base,$group_offset,$proc_offset,$offset) = split(/,/, $targetObj->getAttribute($target,$bar)); my $i_base = Math::BigInt->new($base); - my $i_node_offset = Math::BigInt->new($node_offset); + my $i_node_offset = Math::BigInt->new($group_offset); my $i_proc_offset = Math::BigInt->new($proc_offset); my $i_offset = Math::BigInt->new($offset); @@ -654,7 +654,7 @@ sub setupBars { #Note: Hex convert method avoids overflow on 32bit machine my $b=sprintf("0x%016s",substr(( - $i_base+$i_node_offset*$node+ + $i_base+$i_node_offset*$group+ $i_proc_offset*$proc+$i_offset*$i)->as_hex(),2)); my $sep=","; if ($i==$num-1) @@ -677,20 +677,20 @@ sub processMcs my $target = shift; my $parentTarget = shift; - my $node = $targetObj->getAttribute($parentTarget, "FABRIC_NODE_ID"); + my $group = $targetObj->getAttribute($parentTarget, "FABRIC_GROUP_ID"); my $proc = $targetObj->getAttribute($parentTarget, "FABRIC_CHIP_ID"); - my ($base,$node_offset,$proc_offset,$offset) = split(/,/, + my ($base,$group_offset,$proc_offset,$offset) = split(/,/, $targetObj->getAttribute($target,"IBSCOM_MCS_BASE_ADDR")); my $i_base = Math::BigInt->new($base); - my $i_node_offset = Math::BigInt->new($node_offset); + my $i_node_offset = Math::BigInt->new($group_offset); my $i_proc_offset = Math::BigInt->new($proc_offset); my $i_offset = Math::BigInt->new($offset); my $mcs = $targetObj->getAttribute($target, "MCS_NUM"); #Note: Hex convert method avoids overflow on 32bit machines my $mcsStr=sprintf("0x%016s",substr(( - $i_base+$i_node_offset*$node+ + $i_base+$i_node_offset*$group+ $i_proc_offset*$proc+$i_offset*$mcs)->as_hex(),2)); $targetObj->setAttribute($target, "IBSCOM_MCS_BASE_ADDR", $mcsStr); } @@ -1071,16 +1071,16 @@ sub processMembufVpdAssociation "VPD_REC_NUM",$targetObj->{vpd_num}); } } - my $node_assocs=$targetObj->findConnections($vpd->{DEST_PARENT}, + my $group_assocs=$targetObj->findConnections($vpd->{DEST_PARENT}, "LOGICAL_ASSOCIATION","CARD"); - if ($node_assocs ne "") { - foreach my $node_assoc (@{$node_assocs->{CONN}}) { - my $mb_target = $node_assoc->{DEST_PARENT}; - my $node_target = $targetObj->getTargetParent($mb_target); + if ($group_assocs ne "") { + foreach my $group_assoc (@{$group_assocs->{CONN}}) { + my $mb_target = $group_assoc->{DEST_PARENT}; + my $group_target = $targetObj->getTargetParent($mb_target); setEepromAttributes($targetObj, - "EEPROM_VPD_PRIMARY_INFO",$node_target,$vpd); - $targetObj->setAttribute($node_target, + "EEPROM_VPD_PRIMARY_INFO",$group_target,$vpd); + $targetObj->setAttribute($group_target, "VPD_REC_NUM",$targetObj->{vpd_num}); } } diff --git a/src/usr/targeting/common/targetservice.C b/src/usr/targeting/common/targetservice.C index cd3870ded..a89a1fd9b 100644 --- a/src/usr/targeting/common/targetservice.C +++ b/src/usr/targeting/common/targetservice.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2014 */ +/* Contributors Listed Below - COPYRIGHT 2012,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -683,16 +683,16 @@ errlHndl_t TargetService::queryMasterProcChipTargetHandle( targetService().end(), &actingMasterProcFilter); - TARGETING::ATTR_FABRIC_NODE_ID_type minFabricNodeId = - TARGETING::FABRIC_NODE_ID_NOT_FOUND; + TARGETING::ATTR_FABRIC_GROUP_ID_type minFabricGroupId = + TARGETING::FABRIC_GROUP_ID_NOT_FOUND; for(; blueprintProcs; ++blueprintProcs) { - TARGETING::ATTR_FABRIC_NODE_ID_type fabricNodeId = + TARGETING::ATTR_FABRIC_GROUP_ID_type fabricGroupId = blueprintProcs->getAttr< - TARGETING::ATTR_FABRIC_NODE_ID>(); - if(fabricNodeId < minFabricNodeId) + TARGETING::ATTR_FABRIC_GROUP_ID>(); + if(fabricGroupId < minFabricGroupId) { - minFabricNodeId = fabricNodeId; + minFabricGroupId = fabricGroupId; pMasterProc = *blueprintProcs; } } @@ -1018,11 +1018,11 @@ void TargetService::dump() const TARG_INF("XSCOM Base Address = 0x%016llX",l_xscomBaseAddr); } - uint8_t l_Node_Id = 0; + uint8_t l_Group_Id = 0; if ( l_allTargets->tryGetAttr< - ATTR_FABRIC_NODE_ID>(l_Node_Id)) + ATTR_FABRIC_GROUP_ID>(l_Group_Id)) { - TARG_INF("XSCOM Node ID = 0x%X",l_Node_Id); + TARG_INF("XSCOM Node ID = 0x%X",l_Group_Id); } uint8_t l_Chip_Id = 0; diff --git a/src/usr/targeting/common/util.C b/src/usr/targeting/common/util.C index dd4a7082d..1fbb563f7 100644 --- a/src/usr/targeting/common/util.C +++ b/src/usr/targeting/common/util.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2015 */ +/* Contributors Listed Below - COPYRIGHT 2012,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -298,16 +298,16 @@ uint64_t get_bottom_mem_addr(void) bool orderByNodeAndPosition( Target* i_firstProc, Target* i_secondProc) { - uint8_t nodeId0 = i_firstProc->getAttr<ATTR_FABRIC_NODE_ID>(); - uint8_t nodeId1 = i_secondProc->getAttr<ATTR_FABRIC_NODE_ID>(); + uint8_t groupId0 = i_firstProc->getAttr<ATTR_FABRIC_GROUP_ID>(); + uint8_t groupId1 = i_secondProc->getAttr<ATTR_FABRIC_GROUP_ID>(); uint8_t fabpos0 = i_firstProc->getAttr<ATTR_FABRIC_CHIP_ID>(); uint8_t fabpos1 = i_secondProc->getAttr<ATTR_FABRIC_CHIP_ID>(); - if (nodeId0 == nodeId1) + if (groupId0 == groupId1) { return fabpos0 < fabpos1; } - return nodeId0 < nodeId1; + return groupId0 < groupId1; } uint8_t is_fused_mode( ) diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index 813204720..a0228b446 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -2323,6 +2323,7 @@ <attribute> <id>FABRIC_NODE_ID</id> <description> + DEPRECATED!!!! Chip attribute. Logical fabric node the chip belongs to. Provided by the Machine Readable Workbook. @@ -2340,6 +2341,25 @@ </attribute> <attribute> + <id>FABRIC_GROUP_ID</id> + <description> + Chip attribute. + Logical fabric group the chip belongs to. + Provided by the Machine Readable Workbook. + Can vary across drawers. + </description> + <simpleType><uint8_t> + <default>0</default> + </uint8_t></simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_FABRIC_GROUP_ID</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> <id>FABRIC_CHIP_ID</id> <description> Chip attribute. diff --git a/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml b/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml index 5c13545bc..8b8f680d0 100644 --- a/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml @@ -188,7 +188,7 @@ </attribute> <!-- End FSI connections --> <attribute> - <id>FABRIC_NODE_ID</id> + <id>FABRIC_GROUP_ID</id> <default>0</default> </attribute> <attribute> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index d6bff1c84..9cf860eaa 100755 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -390,7 +390,8 @@ <id>FSI_GP_REG_SCOM_ACCESS</id> <default>1</default> </attribute> - <attribute><id>FABRIC_NODE_ID</id></attribute> + <attribute><id>FABRIC_NODE_ID</id></attribute><!-- DEPRECATED --> + <attribute><id>FABRIC_GROUP_ID</id></attribute> <attribute><id>FABRIC_CHIP_ID</id></attribute> <attribute> <!-- Processor chips have an SBE --> diff --git a/src/usr/targeting/namedtarget.C b/src/usr/targeting/namedtarget.C index 22144bcea..6b247f4d8 100644 --- a/src/usr/targeting/namedtarget.C +++ b/src/usr/targeting/namedtarget.C @@ -5,7 +5,9 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* COPYRIGHT International Business Machines Corp. 2012,2014 */ +/* Contributors Listed Below - COPYRIGHT 2012,2016 */ +/* [+] International Business Machines Corp. */ +/* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ @@ -62,8 +64,8 @@ const TARGETING::Target * getMasterCore( ) TARGETING::Target * l_processor = NULL; (void)TARGETING::targetService().masterProcChipTargetHandle( l_processor ); - FABRIC_NODE_ID_ATTR l_logicalNodeId = - l_processor->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>(); + FABRIC_GROUP_ID_ATTR l_logicalGroupId = + l_processor->getAttr<TARGETING::ATTR_FABRIC_GROUP_ID>(); FABRIC_CHIP_ID_ATTR l_chipId = l_processor->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>(); @@ -89,7 +91,7 @@ const TARGETING::Target * getMasterCore( ) uint64_t pir = l_coreId << 3; pir |= l_chipId << 7; - pir |= l_logicalNodeId << 10; + pir |= l_logicalGroupId << 10; if (pir == l_masterCoreID){ TRACFCOMP( g_trac_targeting, diff --git a/src/usr/targeting/runtime/rt_targeting.C b/src/usr/targeting/runtime/rt_targeting.C index 4707d63e9..707be836d 100644 --- a/src/usr/targeting/runtime/rt_targeting.C +++ b/src/usr/targeting/runtime/rt_targeting.C @@ -5,7 +5,9 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* COPYRIGHT International Business Machines Corp. 2014 */ +/* Contributors Listed Below - COPYRIGHT 2014,2016 */ +/* [+] International Business Machines Corp. */ +/* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ @@ -32,6 +34,7 @@ #include <targeting/common/utilFilter.H> #include <targeting/common/trace.H> #include <targeting/common/targreasoncodes.H> +#include <arch/pirformat.H> #include <runtime/rt_targeting.H> @@ -89,20 +92,19 @@ errlHndl_t getRtTarget(const TARGETING::Target* i_target, if(target_type == TARGETING::TYPE_PROC) { - // use 0b0000.0000.0000.0000.0000.0000.00NN.NCCC: uint32_t fabId = - i_target->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>(); + i_target->getAttr<TARGETING::ATTR_FABRIC_GROUP_ID>(); uint32_t procPos = i_target->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>(); - o_chipId = (fabId << CHIPID_NODE_SHIFT) + procPos; + o_chipId = PIR_t::createChipId( fabId, procPos ); } else if( target_type == TARGETING::TYPE_MEMBUF) { //MEMBUF - // 0b1000.0000.0000.0000.0000.00NN.NCCC.MMMM - // where NNN id node, CCC is chip, MMMM is memory channel + // 0b1000.0000.0000.0000.0000.0GGG.GCCC.MMMM + // where GGGG is group, CCC is chip, MMMM is memory channel // TARGETING::TargetHandleList targetList; @@ -163,16 +165,15 @@ errlHndl_t getRtTarget(const TARGETING::Target* i_target, break; } - o_chipId = (o_chipId << UNIT_ID_SHIFT); + o_chipId = (o_chipId << MEMBUF_ID_SHIFT); o_chipId += pos; - o_chipId |= MEMBUF_ID_TYPE; + o_chipId |= MEMBUF_TYPE; } - else if(target_type == TARGETING::TYPE_EX || - target_type == TARGETING::TYPE_CORE) + else if(target_type == TARGETING::TYPE_CORE) { - // EX/CORE - // 0b0100.0000.0000.0000.0000.00NN.NCCC.PPPP - // NNN is node, CCC is chip, PPPP is core + // CORE + // 0b0100.0000.0000.0000.0000.GGGG.CCCP.PPPP + // GGGG is group, CCC is chip, PPPPP is core uint32_t pos = i_target->getAttr<TARGETING::ATTR_CHIP_UNIT>(); const TARGETING::Target * proc_target = getParentChip(i_target); @@ -188,9 +189,8 @@ errlHndl_t getRtTarget(const TARGETING::Target* i_target, break; } - o_chipId = (o_chipId << UNIT_ID_SHIFT); - o_chipId += pos; - o_chipId |= CORE_ID_TYPE; + o_chipId = PIR_t::createCoreId(o_chipId,pos); + o_chipId |= CORE_TYPE; } else { @@ -234,18 +234,18 @@ errlHndl_t getHbTarget(rtChipId_t i_rt_chip_id, do { - uint64_t idType = i_rt_chip_id & CHIPID_ID_MASK; + uint64_t idType = i_rt_chip_id & CHIPID_TYPE_MASK; - if(0 != (idType == MEMBUF_ID_TYPE)) + if(0 != (idType == MEMBUF_TYPE)) { //membuf - uint64_t chip_id = i_rt_chip_id & UNIT_ID_MASK; - uint32_t unitPos = chip_id & 0x0000000f; - chip_id >>= UNIT_ID_SHIFT; + uint64_t proc_chip_id = i_rt_chip_id & ~CHIPID_TYPE_MASK; + uint32_t unitPos = proc_chip_id & MEMBUF_ID_MASK; + proc_chip_id >>= MEMBUF_ID_SHIFT; TARGETING::Target * proc = NULL; TARGETING::Target * msc = NULL; - err = getHbTarget(chip_id, proc); + err = getHbTarget(proc_chip_id, proc); if(err) { break; @@ -308,13 +308,11 @@ errlHndl_t getHbTarget(rtChipId_t i_rt_chip_id, } } - else if(0 != (idType == CORE_ID_TYPE)) + else if(0 != (idType == CORE_TYPE)) { - // core/ex will alway return EX chiplet as there is no concept - // (yet) of a core in fapi - uint64_t chip_id = i_rt_chip_id & UNIT_ID_MASK; - uint32_t unitPos = chip_id & 0x0000000f; - chip_id >>= UNIT_ID_SHIFT; + uint64_t core_id = i_rt_chip_id & ~CHIPID_TYPE_MASK; + uint32_t unitPos = PIR_t::coreFromCoreId(core_id); + uint64_t chip_id = PIR_t::chipFromCoreId(core_id); TARGETING::Target * proc = NULL; err = getHbTarget(chip_id, proc); @@ -323,7 +321,7 @@ errlHndl_t getHbTarget(rtChipId_t i_rt_chip_id, break; } - PredicateCTM exFilter(CLASS_UNIT, TYPE_EX); + PredicateCTM exFilter(CLASS_UNIT, TYPE_CORE); PredicateAttrVal<ATTR_CHIP_UNIT> unitAttr(unitPos); PredicatePostfixExpr exUnitFilter; exUnitFilter.push(&exFilter).push(&unitAttr).And(); @@ -343,15 +341,14 @@ errlHndl_t getHbTarget(rtChipId_t i_rt_chip_id, } // o_target not found caught below.. } - else if( idType == PROC_ID_TYPE) + else if( idType == PROC_TYPE) { // assume processor chip - // chip_id = 'NNNCCC'b - uint32_t fabId = i_rt_chip_id >> CHIPID_NODE_SHIFT; - uint32_t procPos = i_rt_chip_id & 0x7; + uint32_t fabId = PIR_t::groupFromChipId(i_rt_chip_id); + uint32_t procPos = PIR_t::chipFromChipId(i_rt_chip_id); PredicateCTM procFilter(CLASS_CHIP, TYPE_PROC); - PredicateAttrVal<ATTR_FABRIC_NODE_ID> nodeFilter(fabId); + PredicateAttrVal<ATTR_FABRIC_GROUP_ID> nodeFilter(fabId); PredicateAttrVal<ATTR_FABRIC_CHIP_ID> chipFilter(procPos); PredicatePostfixExpr theProc, theAttrs; diff --git a/src/usr/xscom/xscom.C b/src/usr/xscom/xscom.C index a3d8e28dc..5eaad2237 100644 --- a/src/usr/xscom/xscom.C +++ b/src/usr/xscom/xscom.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2015 */ +/* Contributors Listed Below - COPYRIGHT 2011,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -46,6 +46,7 @@ #include <assert.h> #include <errl/errludlogregister.H> #include <xscom/piberror.H> +#include <arch/pirformat.H> // Trace definition trace_desc_t* g_trac_xscom = NULL; @@ -347,7 +348,7 @@ errlHndl_t getTargetVirtualAddress(TARGETING::Target* i_target, // Get the target Node Id xscomNodeId = - i_target->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>(); + i_target->getAttr<TARGETING::ATTR_FABRIC_GROUP_ID>(); // Get the target Chip Id xscomChipId = @@ -548,12 +549,7 @@ uint64_t* getCpuIdVirtualAddress() uint64_t* o_virtAddr = 0; // Get the CPU core this thread is running on - uint32_t cpuid = task_getcpuid(); - - //NNNCCCPPPPTTT format fot the cpuid.. - // N = node, C = chip, P = proc, T = thread - uint32_t chipId = (cpuid & 0x0380)>>7; - uint32_t nodeId = (cpuid & 0x1C00)>>10; + PIR_t cpuid = task_getcpuid(); // Can change the above hardcoded values to either a macro or use // the info below to do the masking and shifting. @@ -566,8 +562,8 @@ uint64_t* getCpuIdVirtualAddress() // Target's XSCOM Base address XSComBase_t l_XSComBaseAddr = l_systemBaseAddr + - ( ( (g_xscomMaxChipsPerNode * nodeId) + - chipId ) * THIRTYTWO_GB); + ( ( (g_xscomMaxChipsPerNode * cpuid.groupId) + + cpuid.chipId ) * THIRTYTWO_GB); // Target's virtual address o_virtAddr = static_cast<uint64_t*> |
