diff options
| -rw-r--r-- | src/build/citest/etc/bbuild | 2 | ||||
| -rwxr-xr-x | src/build/citest/etc/workarounds.postsimsetup | 8 | ||||
| -rwxr-xr-x | src/build/citest/etc/workarounds.presimsetup | 44 | ||||
| -rwxr-xr-x | src/build/simics/post_model_hook.simics | 4 | ||||
| -rw-r--r-- | src/include/usr/xscom/xscomreasoncodes.H | 1 | ||||
| -rw-r--r-- | src/usr/fsi/test/fsiddtest.H | 23 | ||||
| -rw-r--r-- | src/usr/fsi/test/fsiprestest.H | 9 | ||||
| -rw-r--r-- | src/usr/xscom/test/xscomtest.H | 127 |
8 files changed, 145 insertions, 73 deletions
diff --git a/src/build/citest/etc/bbuild b/src/build/citest/etc/bbuild index b07fd0e76..f832afe05 100644 --- a/src/build/citest/etc/bbuild +++ b/src/build/citest/etc/bbuild @@ -1 +1 @@ -/esw/fips810/Builds/b0409a_1213.810 +/esw/fips810/Builds/b0419a_1215.810 diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup index 629ad7392..9d27730f7 100755 --- a/src/build/citest/etc/workarounds.postsimsetup +++ b/src/build/citest/etc/workarounds.postsimsetup @@ -27,7 +27,7 @@ ## to setup the sandbox ## -echo "+++ FIXME Temporarily copying cec-chip.so to eliminate verbose errors" -rm $sb/../simics/amd64-linux/lib/cec-chip.so -cp /afs/rch/usr8/dsanner/public/quiet.cecchip/cec-chip.so $sb/../simics/amd64-linux/lib/ - +echo "+++ Point Simics to our base image +++" +#ln -sf $sb/../img/hbicore.bin $sb/../simics/hostboot.bin +mkdir -p $sb/../images/ppc/lab/flash/ +ln -sf $sb/../img/hbicore.bin $sb/../images/ppc/lab/flash/hostboot.bin diff --git a/src/build/citest/etc/workarounds.presimsetup b/src/build/citest/etc/workarounds.presimsetup index 7a312090c..ba1618e70 100755 --- a/src/build/citest/etc/workarounds.presimsetup +++ b/src/build/citest/etc/workarounds.presimsetup @@ -27,51 +27,21 @@ ## to setup the sandbox ## -echo "+++ Copy desired VENICE config file to sandbox and modify L3 to 8MB." -mkdir -p $sb/simu/configs -cp --update $BACKING_BUILD/src/simu/configs/P8_VENICE.config $sb/simu/configs -sed -i -e's/SETENV GFW_P8_VENICE_L3_MB_SIZE.*/SETENV GFW_P8_VENICE_L3_MB_SIZE 8/' $sb/simu/configs/P8_VENICE.config -# Backing build already contains 910431. Leave this workaround here for future scomdef files -#sed -i -e's/SETENV GFW_P8_VENICE_MODEL_EC.*/SETENV GFW_P8_VENICE_MODEL_EC 910431/' $sb/simu/configs/P8_VENICE.config - -echo "+++ Copy desired MURANO config file to sandbox and modify L3 to 8MB." -mkdir -p $sb/simu/configs -cp --update $BACKING_BUILD/src/simu/configs/P8_MURANO.config $sb/simu/configs -sed -i -e's/SETENV GFW_P8_MURANO_L3_MB_SIZE.*/SETENV GFW_P8_MURANO_L3_MB_SIZE 8/' $sb/simu/configs/P8_MURANO.config -# Backing build already contains 910431. Leave this workaround here for future scomdef files -#sed -i -e's/SETENV GFW_P8_MURANO_MODEL_EC.*/SETENV GFW_P8_MURANO_MODEL_EC 910431/' $sb/simu/configs/P8_MURANO.config - -echo "+++ Enable P8 Mambo and 8-threads." -sed -i -e's/SETENV GFW_P8_VENICE_ENABLE_P8_PROC.*/SETENV GFW_P8_VENICE_ENABLE_P8_PROC yes/' $sb/simu/configs/P8_VENICE.config +echo "+++ Enable 8-threads." sed -i -e's/SETENV GFW_SIMICS_ENV_THREADS_PER_CORE.*/SETENV GFW_SIMICS_ENV_THREADS_PER_CORE 8/' $sb/simu/configs/P8_VENICE.config -sed -i -e's/SETENV GFW_P8_MURANO_ENABLE_P8_PROC.*/SETENV GFW_P8_MURANO_ENABLE_P8_PROC yes/' $sb/simu/configs/P8_MURANO.config sed -i -e's/SETENV GFW_SIMICS_ENV_THREADS_PER_CORE.*/SETENV GFW_SIMICS_ENV_THREADS_PER_CORE 8/' $sb/simu/configs/P8_MURANO.config -#Remove this with Task 39902 -echo "+++ Temporarily disabling multiple Centaurs (Simics bug)." -sed -i -e's/SETENV GFW_P8_VENICE_CENTAURS_PER_PROC.*/SETENV GFW_P8_VENICE_CENTAURS_PER_PROC 1/' $sb/simu/configs/P8_VENICE.config -sed -i -e's/SETENV GFW_P8_MURANO_CENTAURS_PER_PROC.*/SETENV GFW_P8_MURANO_CENTAURS_PER_PROC 1/' $sb/simu/configs/P8_MURANO.config +#Remove with RTC:40975 +echo "+++ Update to new phyp level for XSCOM fixes." +mkdir -p $sb/simu/data +cp --update $BACKING_BUILD/src/simu/data/simicsInfo $sb/simu/data/simicsInfo +sed -i -e's/^WSALIAS DEFAULT PHYPLEVEL.*/WSALIAS DEFAULT PHYPLEVEL env\/phypb\/simics-4.2.0\/simics-4.2.85\/ph120424b700.42/' $sb/simu/data/simicsInfo -#Remove this with Task 40101 -echo "+++ Copy new centaur.act, p8.act, and p8murano.ali" -mkdir -p $sb/simu/data/cec-chip/ -cp $HOSTBOOTROOT/src/build/citest/etc/patches/centaur.act $sb/simu/data/cec-chip/centaur.act -cp $HOSTBOOTROOT/src/build/citest/etc/patches/p8.act $sb/simu/data/cec-chip/p8.act -cp $HOSTBOOTROOT/src/build/citest/etc/patches/p8murano.ali $sb/simu/data/cec-chip/p8murano.ali -#Note: Leave this here as an example +#### Examples #### #echo "+++ Some message about why you need to do this." #mkdir -p $sb/simu/data #egrep -v "WSALIAS HOSTBOOT_LEVEL FIPSLEVEL|WSALIAS HOSTBOOT_LEVEL SIMICSLEVEL" $BACKING_BUILD/src/simu/data/simicsInfo > $sb/simu/data/simicsInfo #echo "WSALIAS HOSTBOOT_LEVEL FIPSLEVEL env/gfwb/simics-4.2.0/simics-4.2.83/fips/fld36/fi120201a700.42" >> $sb/simu/data/simicsInfo #echo "WSALIAS HOSTBOOT_LEVEL SIMICSLEVEL env/vtechb/simics-4.2.0/simics-4.2.83/bin" >> $sb/simu/data/simicsInfo -# Leaving this here as an example for the future -echo "+++ Update to new phyp and mambo level." -mkdir -p $sb/simu/data -cp --update $BACKING_BUILD/src/simu/data/simicsInfo $sb/simu/data/simicsInfo -#sed -i -e's/^WSALIAS HOSTBOOT_LEVEL MAMBOLEVEL.*/WSALIAS HOSTBOOT_LEVEL MAMBOLEVEL env\/mamboa\/2011_11_10__4.2/' $sb/simu/data/simicsInfo -# RTC task 39991 - update bbuild and remove this when it gets into a build -sed -i -e's/^WSALIAS DEFAULT FIPSLEVEL.*/WSALIAS DEFAULT FIPSLEVEL env\/gfwb\/simics-4.2.0\/simics-4.2.85\/fips\/fld36\/fi120327b700.42/' $sb/simu/data/simicsInfo -sed -i -e's/^WSALIAS DEFAULT PHYPLEVEL.*/WSALIAS DEFAULT PHYPLEVEL env\/phypa\/simics-4.2.0\/simics-4.2.85\/ph120319a700.42/' $sb/simu/data/simicsInfo -sed -i -e's/^WSALIAS DEFAULT PHYP_PATCH_LEVEL.*/WSALIAS DEFAULT PHYP_PATCH_LEVEL env\/phypa\/simics-4.2.0\/simics-4.2.85\/patches\/ph120319a700.42/' $sb/simu/data/simicsInfo diff --git a/src/build/simics/post_model_hook.simics b/src/build/simics/post_model_hook.simics index c555a0e46..57dc9a117 100755 --- a/src/build/simics/post_model_hook.simics +++ b/src/build/simics/post_model_hook.simics @@ -46,3 +46,7 @@ venice_cec_chip_cmp0.psi_hb->psihb_xivr_fsi=0x0140000000 #02010917 venice_cec_chip_cmp0.psi_hb->psihb_irsn=0x00030000FFFF0000 #0201091b p8Proc0.proc_fsi2host_mbox->responder_enable=1 +#@fixme - Remove with RTC:41070 +#Get the OCC scoms to work correctly +p8Proc0.occ_scom_bridge->occ_pib=p8Proc0.OccComplexSlot.OccSimpleSlot.pcb_space +p8Proc0.OccComplexSlot.OccSimpleSlot.ocb->trusted_boot=FALSE diff --git a/src/include/usr/xscom/xscomreasoncodes.H b/src/include/usr/xscom/xscomreasoncodes.H index 09fdb5d30..9706d9295 100644 --- a/src/include/usr/xscom/xscomreasoncodes.H +++ b/src/include/usr/xscom/xscomreasoncodes.H @@ -33,6 +33,7 @@ namespace XSCOM XSCOM_SANITY_CHECK = 0x01, XSCOM_TEST_XSCOM1 = 0x02, XSCOM_GET_TARGET_VIRT_ADDR = 0x03, + XSCOM_TEST_XSCOM2 = 0x04, }; enum xscomReasonCode diff --git a/src/usr/fsi/test/fsiddtest.H b/src/usr/fsi/test/fsiddtest.H index e98a896a4..3078e4261 100644 --- a/src/usr/fsi/test/fsiddtest.H +++ b/src/usr/fsi/test/fsiddtest.H @@ -114,15 +114,6 @@ class FsiDDTest : public CxxTest::TestSuite */ void test_readWrite(void) { - //@todo - Issue 35803 - //@VBU workaround - Disable test case - //Temporarily disable this test case in VBU because of - //an MFSI/CFSI XSCOM hardware bug. - if( TARGETING::is_vpo() ) - { - return; - } - TRACFCOMP( g_trac_fsi, "FsiDDTest::test_readWrite> Start" ); uint64_t fails = 0; uint64_t total = 0; @@ -221,8 +212,7 @@ class FsiDDTest : public CxxTest::TestSuite { PROC2, 0x001028, 0x120EA049, false, false }, //CHIPID from FSI2PIB off MFSI-2 //** Slave Regs - { CENTAUR0, 0x000000, 0xC0010E9C, false, false }, //Config Table entry for slave0 off cMFSI-0 - //@fixme - should be 0xC0010E95 but Simics is wrong + { CENTAUR0, 0x000000, 0xC0010E95, false, false }, //Config Table entry for slave0 off cMFSI-0 { CENTAUR0, 0x001028, 0x160E9049, false, false }, //CHIPID from FSI2PIB off cMFSI-0 { CENTAUR0, 0x000C08, 0x12344321, true, false }, //FEL from SHIFT off cMFSI-0 @@ -400,17 +390,6 @@ class FsiDDTest : public CxxTest::TestSuite */ void test_badTargets(void) { - - //@todo - Issue 35803 - //@VBU workaround - Disable test case - //Temporarily disable this test case in VBU because of - //an MFSI/CFSI XSCOM hardware bug. - if( TARGETING::is_vpo() ) - { - return; - } - - TRACFCOMP( g_trac_fsi, "FsiDDTest::test_badTargets> Start" ); uint64_t fails = 0; uint64_t total = 0; diff --git a/src/usr/fsi/test/fsiprestest.H b/src/usr/fsi/test/fsiprestest.H index f2787466f..5797e3b3d 100644 --- a/src/usr/fsi/test/fsiprestest.H +++ b/src/usr/fsi/test/fsiprestest.H @@ -53,15 +53,6 @@ class FSIPresTest : public CxxTest::TestSuite */ void testPresence() { - //@todo - Issue 35803 - //@VBU workaround - Disable test case - //Temporarily disable this test case in VBU because of - //an MFSI/CFSI XSCOM hardware bug. - if( TARGETING::is_vpo() ) - { - return; - } - Target* l_masterChip = NULL; targetService().masterProcChipTargetHandle(l_masterChip); diff --git a/src/usr/xscom/test/xscomtest.H b/src/usr/xscom/test/xscomtest.H index b5bd1c705..187eeaf74 100644 --- a/src/usr/xscom/test/xscomtest.H +++ b/src/usr/xscom/test/xscomtest.H @@ -179,6 +179,133 @@ public: } return; } + + + /** + * @brief XSCOM test #2 + * Write value and read back to verify + */ + void testXscom2(void) + { + + TARGETING::TargetService& l_targetService = TARGETING::targetService(); + TARGETING::Target* l_testTarget = NULL; + l_targetService.masterProcChipTargetHandle( l_testTarget ); + assert(l_testTarget != NULL); + + size_t l_size = sizeof(uint64_t); + + uint64_t l_readData = 0; + uint64_t l_writeData[g_xscomAddrTableSz]; + uint64_t l_savedData[g_xscomAddrTableSz]; + + // Loop thru table to do initial write + errlHndl_t l_err = NULL; + for( uint32_t l_num=0; l_num < g_xscomAddrTableSz; l_num++) + { + testXscomAddrData l_testEntry = g_xscomAddrTable[l_num]; + + // Perform XSComOM read + l_err = deviceRead(l_testTarget, + &l_readData, + l_size, + DEVICE_SCOM_ADDRESS(l_testEntry.addr)); + if (l_err) + { + TS_FAIL("testXscom2: XSCom read: deviceRead() fails! Error committed."); + break; + } + else + { + TS_TRACE("testXscom2: XSCom read, Address 0x%.8X, Data %llx", + l_testEntry.addr, + (long long unsigned)l_readData); + } + + // Perform an XSCom write + l_savedData[l_num] = l_readData; + l_writeData[l_num] = (l_readData | l_testEntry.data); + l_err = deviceWrite(l_testTarget, + &l_writeData[l_num], + l_size, + DeviceFW::SCOM, + l_testEntry.addr); + + if (l_err) + { + TS_FAIL("testXscom2: XSCom write: deviceWrite() fails!"); + break; + } + else + { + TS_TRACE("testXscom2: XSCom write, Address 0x%.8X, Data %llx", + l_testEntry.addr, + (long long unsigned)l_writeData); + } + } + + // Loop through table to do the read and verify + for( uint32_t l_num=0; l_num < g_xscomAddrTableSz; l_num++) + { + testXscomAddrData l_testEntry = g_xscomAddrTable[l_num]; + + // Read back + l_readData = 0; + l_err = deviceRead(l_testTarget, + &l_readData, + l_size, + DEVICE_SCOM_ADDRESS(l_testEntry.addr)); + if (l_err) + { + TS_FAIL("testXscom2: XSCom read back: deviceRead() fails!"); + break; + } + + if( l_readData != l_writeData[l_num] ) + { + TS_FAIL("testXscom2: XSCom read back doesn't match write!"); + /*@ + * @errortype + * @moduleid XSCOM_TEST_XSCOM2 + * @reasoncode XSCOM_DATA_UNMATCHED + * @userdata1 Write value + * @userdata2 Read back value + * @devdesc Read back value doesn't match write + */ + l_err = new ERRORLOG::ErrlEntry( + ERRORLOG::ERRL_SEV_INFORMATIONAL, + XSCOM::XSCOM_TEST_XSCOM1, + XSCOM::XSCOM_DATA_UNMATCHED, + l_writeData[l_num], + l_readData); + break; + } + + // Write back original value + l_err = deviceWrite(l_testTarget, + &l_savedData[l_num], + l_size, + DeviceFW::SCOM, + l_testEntry.addr); + + if (l_err) + { + TS_FAIL("testXscom2: XSCom write back original fails!"); + break; + } + } + + if (l_err) + { + TS_FAIL("testXscom2 failed! Error committed."); + errlCommit(l_err,XSCOM_COMP_ID); + } + else + { + TS_TRACE("testXscom2 runs successfully!"); + } + return; + } }; #endif |
