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| author | Dan Crowell <dcrowell@us.ibm.com> | 2013-09-25 10:03:56 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2013-09-27 08:36:33 -0500 |
| commit | f27bc3697954b533d4ce6eaec260d250cda527de (patch) | |
| tree | 7ab5d4c425f6e23ae576cda788a1696c8b04d781 /src | |
| parent | bae38bba69c6987650a40b789126be23c90be3ea (diff) | |
| download | blackbird-hostboot-f27bc3697954b533d4ce6eaec260d250cda527de.tar.gz blackbird-hostboot-f27bc3697954b533d4ce6eaec260d250cda527de.zip | |
Unmask some OCC SRAM CEs during AVP IPL
Change-Id: I1a1c6bce849b02dd38361fdcb40ef42b131308b3
CQ: SW225677
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6345
Tested-by: Jenkins Server
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r--[-rwxr-xr-x] | src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.C | 10 | ||||
| -rw-r--r-- | src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.C | 6 |
2 files changed, 8 insertions, 8 deletions
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.C index e1bf73ffd..5355cd822 100755..100644 --- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.C +++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_pm_firinit.C,v 1.11 2013/08/02 19:06:46 stillgs Exp $ +// $Id: p8_pm_firinit.C,v 1.12 2013-09-25 21:26:09 dcrowell Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_firinit.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -197,7 +197,7 @@ p8_pm_firinit(const fapi::Target &i_target , uint32_t i_mode) // PBA // ****************************************************************** ; - FAPI_EXEC_HWP(rc, p8_pm_pba_firinit , i_target , PM_RESET ); + FAPI_EXEC_HWP(rc, p8_pm_pba_firinit , i_target , i_mode ); if (rc) { FAPI_ERR("ERROR: p8_pm_pba_firinit detected failed result"); @@ -208,7 +208,7 @@ p8_pm_firinit(const fapi::Target &i_target , uint32_t i_mode) // OHA // ****************************************************************** - FAPI_EXEC_HWP(rc, p8_pm_oha_firinit , i_target , PM_RESET ); + FAPI_EXEC_HWP(rc, p8_pm_oha_firinit , i_target , i_mode ); if (rc) { FAPI_ERR("ERROR: p8_pm_oha_firinit detected failed result"); @@ -219,7 +219,7 @@ p8_pm_firinit(const fapi::Target &i_target , uint32_t i_mode) // PCBS // ****************************************************************** - FAPI_EXEC_HWP(rc, p8_pm_pcbs_firinit , i_target , PM_RESET ); + FAPI_EXEC_HWP(rc, p8_pm_pcbs_firinit , i_target , i_mode ); if (rc) { FAPI_ERR("ERROR: p8_pm_pcbs_firinit detected failed result"); @@ -230,7 +230,7 @@ p8_pm_firinit(const fapi::Target &i_target , uint32_t i_mode) // OCC // ****************************************************************** - FAPI_EXEC_HWP(rc, p8_pm_occ_firinit , i_target , PM_RESET ); + FAPI_EXEC_HWP(rc, p8_pm_occ_firinit , i_target , i_mode ); if (rc) { FAPI_ERR("ERROR: p8_pm_occ_firinit detected failed result"); diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.C index 8f19b88e3..b0a5812ba 100644 --- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.C +++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_pm_occ_firinit.C,v 1.13 2013/08/06 18:07:35 jimyac Exp $ +// $Id: p8_pm_occ_firinit.C,v 1.14 2013/09/20 19:04:51 jimyac Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_occ_firinit.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -151,7 +151,7 @@ p8_pm_occ_firinit(const fapi::Target& i_target , uint32_t mode) SET_RECOV_ATTN(7); SET_FIR_MASKED(7); // 7 = pore_gpe1_fatal_err SET_RECOV_ATTN(8); SET_FIR_MASKED(8); // 8 = ocb_error SET_RECOV_ATTN(9); // 9 = srt_ue - SET_RECOV_ATTN(10); SET_FIR_MASKED(10); // 10 = srt_ce + SET_RECOV_ATTN(10); // 10 = srt_ce SET_RECOV_ATTN(11); // 11 = srt_read_error SET_RECOV_ATTN(12); // 12 = srt_write_error SET_RECOV_ATTN(13); // 13 = srt_dataout_perr @@ -180,7 +180,7 @@ p8_pm_occ_firinit(const fapi::Target& i_target , uint32_t mode) SET_RECOV_ATTN(36); SET_FIR_MASKED(36); // 36 = jtagacc_err SET_RECOV_ATTN(37); SET_FIR_MASKED(37); // 37 = spare_err_37 SET_RECOV_ATTN(38); // 38 = c405_ecc_ue - SET_RECOV_ATTN(39); SET_FIR_MASKED(39); // 39 = c405_ecc_ce + SET_RECOV_ATTN(39); // 39 = c405_ecc_ce SET_RECOV_ATTN(40); SET_FIR_MASKED(40); // 40 = c405_oci_machinecheck SET_RECOV_ATTN(41); // 41 = sram_spare_direct_error0 SET_RECOV_ATTN(42); // 42 = sram_spare_direct_error1 |
