diff options
author | Dan Crowell <dcrowell@us.ibm.com> | 2015-01-23 11:23:25 -0600 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2015-01-30 13:05:34 -0600 |
commit | a1812e8fd135ad8abd80f35e83a6d7a2c88a6170 (patch) | |
tree | 4a9e2ee89d59801b0eeb5ae2e113de8fe4eb0672 /src | |
parent | 9a44d77296981912a412d741f3198c6a761ac5c0 (diff) | |
download | blackbird-hostboot-a1812e8fd135ad8abd80f35e83a6d7a2c88a6170.tar.gz blackbird-hostboot-a1812e8fd135ad8abd80f35e83a6d7a2c88a6170.zip |
Add support for OPT_MEMMAP_GROUP_POLICY attribute
This is pre-support for SW274292 to help avoid co-reqs with
the FSP code. Changes under that defect will add the
complete MRW parsing path.
Change-Id: Ia86982c06f4cac393782d36d873bf3ff9be306da
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15300
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src')
7 files changed, 50 insertions, 4 deletions
diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl index 42a98c0a4..e3176c443 100755 --- a/src/usr/targeting/common/genHwsvMrwXml.pl +++ b/src/usr/targeting/common/genHwsvMrwXml.pl @@ -262,6 +262,16 @@ push @systemAttr, "MNFG_TH_CEN_L4_CACHE_CES", $reqPol->{'mnfg_th_cen_l4_cache_ces'}, ]; +#@todo RTC:122741 - Get this from MRW for real +if ($sysname =~ /alpine/) +{ + push @systemAttr, ["OPT_MEMMAP_GROUP_POLICY", 0x01]; +} +else +{ + push @systemAttr, ["OPT_MEMMAP_GROUP_POLICY", 0x00]; +} + if ($reqPol->{'mba_cacheline_interleave_mode_control'} eq 'required') { push @systemAttr, ["MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL", 1]; diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index dfaba53a9..e0be06ad9 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -15108,6 +15108,25 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript </attribute> <attribute> + <id>OPT_MEMMAP_GROUP_POLICY</id> + <description> + Controls scope of grouping performed in memory map calculations + Possible values defined in FAPI ATTR_OPT_MEMMAP_GROUP_POLICY + </description> + <simpleType> + <uint8_t><default>0x00</default></uint8_t><!-- CHIP_AS_GROUP --> + </simpleType> + <readable/> + <persistency>non-volatile</persistency> +<!-- @todo: enable with CQ:SW274292 + <hwpfToHbAttrMap> + <id>ATTR_OPT_MEMMAP_GROUP_POLICY</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +--> +</attribute> + +<attribute> <id>MFG_TRACE_ENABLE</id> <description> Override this to a non-zero value to have the FAPI manufacturing diff --git a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml index c17e7dcb5..f5c85185b 100644 --- a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml @@ -5,7 +5,7 @@ <!-- --> <!-- OpenPOWER HostBoot Project --> <!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2012,2014 --> +<!-- Contributors Listed Below - COPYRIGHT 2012,2015 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -387,6 +387,10 @@ <id>APSS_GPIO_PORT_PINS</id> <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> </attribute> + <attribute> + <id>OPT_MEMMAP_GROUP_POLICY</id> + <default>0x00</default> + </attribute> </targetInstance> <!-- System node 0 --> diff --git a/src/usr/targeting/common/xmltohb/simics_NAPLES.system.xml b/src/usr/targeting/common/xmltohb/simics_NAPLES.system.xml index 8facd237f..95dcfa026 100644 --- a/src/usr/targeting/common/xmltohb/simics_NAPLES.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_NAPLES.system.xml @@ -5,7 +5,7 @@ <!-- --> <!-- OpenPOWER HostBoot Project --> <!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2014 --> +<!-- Contributors Listed Below - COPYRIGHT 2014,2015 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -344,6 +344,10 @@ <id>MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL</id> <default>1</default> </attribute> + <attribute> + <id>OPT_MEMMAP_GROUP_POLICY</id> + <default>0x00</default> + </attribute> </targetInstance> <!-- System node 0 --> diff --git a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml index 9b81815fa..51f9ec778 100644 --- a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml @@ -5,7 +5,7 @@ <!-- --> <!-- OpenPOWER HostBoot Project --> <!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2012,2014 --> +<!-- Contributors Listed Below - COPYRIGHT 2012,2015 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -391,6 +391,10 @@ <id>APSS_GPIO_PORT_PINS</id> <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> </attribute> + <attribute> + <id>OPT_MEMMAP_GROUP_POLICY</id> + <default>0x00</default> + </attribute> </targetInstance> <!-- System node 0 --> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index c9e5c92ce..9c6c43e73 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -305,6 +305,7 @@ <attribute><id>MNFG_TH_CEN_MBA_IPL_SOFT_CE_TH_ALGO</id></attribute> <attribute><id>MNFG_TH_CEN_MBA_RT_RCE_PER_RANK</id></attribute> <attribute><id>MNFG_TH_CEN_L4_CACHE_CES</id></attribute> + <attribute><id>OPT_MEMMAP_GROUP_POLICY</id></attribute> </targetType> <targetType> diff --git a/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml b/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml index f38711daf..3f8d55510 100644 --- a/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml +++ b/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml @@ -5,7 +5,7 @@ <!-- --> <!-- OpenPOWER HostBoot Project --> <!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2013,2014 --> +<!-- Contributors Listed Below - COPYRIGHT 2013,2015 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -327,6 +327,10 @@ <id>MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL</id> <default>1</default> </attribute> + <attribute> + <id>OPT_MEMMAP_GROUP_POLICY</id> + <default>0x00</default> + </attribute> </targetInstance> <!-- System node 0 --> |