diff options
| author | vanlee <vanlee@us.ibm.com> | 2013-01-03 08:37:28 -0600 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-01-14 13:15:48 -0600 |
| commit | 8f5691c57fc23091e58089e457719991d12cc090 (patch) | |
| tree | 5d603970b2d8b14e034cc0b2f119d287042f6d3c /src | |
| parent | a84e7bc7992030e3866bc04b2e4d335b621f636d (diff) | |
| download | blackbird-hostboot-8f5691c57fc23091e58089e457719991d12cc090.tar.gz blackbird-hostboot-8f5691c57fc23091e58089e457719991d12cc090.zip | |
Update p8_xip_customize HWP
Change-Id: If08b9d2cedafb895947e5205c66b51010bb93974
RTC: 60670
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2859
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src')
14 files changed, 1926 insertions, 420 deletions
diff --git a/src/usr/hwpf/hwp/build_winkle_images/makefile b/src/usr/hwpf/hwp/build_winkle_images/makefile index eeeb761d8..5a7682500 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/makefile +++ b/src/usr/hwpf/hwp/build_winkle_images/makefile @@ -63,6 +63,7 @@ OBJS = build_winkle_images.o \ p8_xip_customize.o \ p8_ring_identification.o \ p8_slw_build.o \ + p8_image_help_base.o \ p8_pfet_init.o ## NOTE: add a new directory onto the vpaths when you add a new HWP diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_delta_scan_rw.h b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_delta_scan_rw.h index 5a75f0290..fef7ac200 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_delta_scan_rw.h +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_delta_scan_rw.h @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2012 */ +/* COPYRIGHT International Business Machines Corp. 2012,2013 */ /* */ /* p1 */ /* */ @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_delta_scan_rw.h,v 1.27 2012/12/14 19:44:53 cmolsen Exp $ +// $Id: p8_delta_scan_rw.h,v 1.29 2013/01/02 03:03:10 cmolsen Exp $ #define OVERRIDE_OFFSET 8 // Byte offset of forward pointer's addr relative // to base forward pointer's addr. #define SIZE_IMAGE_BUF_MAX 5000000 // Max ~50MB image buffer size. @@ -33,8 +33,11 @@ /***** Xip customize support ****/ #define COMBINED_GOOD_VECTORS_TOC_NAME "combined_good_vectors" -#define PERV_PIB_REPR_VECTOR_TOC_NAME "proc_sbe_pibmem_repair_vector" +#define PROC_PIB_REPR_VECTOR_TOC_NAME "proc_sbe_pibmem_repair_vector" #define NEST_SKEWADJUST_VECTOR_TOC_NAME "proc_sbe_nest_skewadjust_vector" +#define MAX_PLL_RING_SIZE 128 // Bytes +#define PERV_BNDY_PLL_RING_TOC_NAME "perv_bndy_pll_ring" +#define PERV_BNDY_PLL_RING_ALT_TOC_NAME "perv_bndy_pll_ring_alt" /***** Scan setting *****/ #define OPCG_SCAN_RATIO 4 @@ -81,6 +84,8 @@ #define IMGBUILD_IMAGE_SIZE_MISMATCH 11 // Mismatch between image sizes. #define IMGBUILD_ERR_PORE_INLINE 20 // Pore inline error. #define IMGBUILD_ERR_PORE_INLINE_ASM 21 // Err assoc w/inline assembler. +#define IMGBUILD_ERR_WF_CREATE 45 // Err assoc w/create_wiggle_flip_prg. +#define IMGBUILD_ERR_RING_WRITE_TO_IMAGE 46 // Err assoc w/wr_ring_block_to_img. #define IMGBUILD_ERR_GET_SECTION 49 // Err assoc w/getting section ID. #define IMGBUILD_ERR_SECTION_DELETE 50 // Err assoc w/deleting ELF section. #define IMGBUILD_ERR_APPEND 51 // Err assoc w/appending to ELF section. @@ -209,40 +214,33 @@ typedef struct { char data[]; } MetaData; -/* -// RS4 specific layout. -typedef struct { - uint64_t entryOffset; - uint64_t backItemPtr; - uint32_t sizeOfThis; - uint32_t sizeOfMeta; // Exact size of meta data. Arbitrary size. Not null terminated. - uint32_t ddLevel; - uint8_t sysPhase; - uint8_t override; - uint8_t reserved1; - uint8_t reserved2; -} Rs4RingLayout; -*/ - -int p8_centaur_build( void *i_imageIn, - uint32_t i_ddLevel, - void *i_imageOut, - uint32_t i_sizeImageOutMax); - -int p8_ipl_build( void *i_imageIn, - uint32_t i_ddLevel, - void *i_imageOut, - uint32_t i_sizeImageOutMax); - -int get_ring_layout_from_image2( const void *i_imageIn, - uint32_t i_ddLevel, - uint8_t i_sysPhase, - DeltaRingLayout **o_rs4RingLayout, - void **nextRing); - -int write_ring_block_to_image( void *io_image, - DeltaRingLayout *i_ringBlock, - uint32_t i_sizeImageMax); +int p8_centaur_build( + void *i_imageIn, + uint32_t i_ddLevel, + void *i_imageOut, + uint32_t i_sizeImageOutMax); + +int p8_ipl_build( + void *i_imageIn, + uint32_t i_ddLevel, + void *i_imageOut, + uint32_t i_sizeImageOutMax); + +int get_ring_layout_from_image2( + const void *i_imageIn, + uint32_t i_ddLevel, + uint8_t i_sysPhase, + DeltaRingLayout **o_rs4RingLayout, + void **nextRing); + +int write_ring_block_to_image( + void *io_image, + const char *i_ringName, // NULL if no name. + DeltaRingLayout *i_ringBlock, + const uint8_t i_idxVector, // [0-15] - Ignored if ringName==NULL + const uint8_t i_override, // [0,1] - Ignored if ringName==NULL + const uint8_t i_overridable, // [0,1] - Ignored if ringName==NULL + const uint32_t i_sizeImageMax); int gen_ring_delta_state( uint32_t bitLen, @@ -251,15 +249,12 @@ int gen_ring_delta_state( uint32_t *o_delta, uint32_t verbose); -//int write_delta_ring_to_image( -// char *i_fnImage, -// CompressedScanData *i_RS4, -// uint32_t i_ddLevel, -// uint8_t i_sysPhase, -// uint8_t i_override, -// char *i_varName, -// char *i_fnMetaData, -// uint32_t verbose); +int calc_ring_delta_state( + const uint32_t *i_init, + const uint32_t *i_alter, + uint32_t *o_delta, + const uint32_t i_ringLen); + int write_rs4_ring_to_ref_image( char *i_fnImage, CompressedScanData *i_RS4, @@ -339,6 +334,10 @@ int initialize_slw_section( int update_runtime_scom_pointer( void *io_image); +uint64_t calc_ring_layout_entry_offset( + uint8_t i_typeRingLayout, + uint32_t i_sizeMetaData); + void cleanup( void *buf1=NULL, void *buf2=NULL, diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C index 555dfc3cb..0a5b21c7d 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2012 */ +/* COPYRIGHT International Business Machines Corp. 2012,2013 */ /* */ /* p1 */ /* */ @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_image_help.C,v 1.32 2012/11/14 12:33:45 cmolsen Exp $ +// $Id: p8_image_help.C,v 1.35 2013/01/02 23:00:00 cmolsen Exp $ // /*------------------------------------------------------------------------------*/ /* *! TITLE : p8_image_help.C */ @@ -229,12 +229,6 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s maxWfInlineLenInWords = *o_wfInlineLenInWords; -/* 2012-11-13: CMO- Commented out since both slw_build and centaur_build now pass - preallocated buffers. - if (*o_wfInline==NULL) - *o_wfInline = (uint32_t*)malloc(maxWfInlineLenInWords); -*/ - pore_inline_context_create(&ctx, *o_wfInline, maxWfInlineLenInWords * 4, 0, 0); // Get chiplet and Ring Addr info. @@ -438,7 +432,7 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s return ctx.error; } #else - scanRing_poreAddr=scanRing_baseAddr | rotateLen; + scanRing_poreAddr = scanRing_baseAddr | rotateLen; pore_LD(&ctx, D0, scanRing_poreAddr, P1); if (ctx.error > 0) { MY_ERR("***LD D0 rc = %d", ctx.error); @@ -1179,13 +1173,12 @@ int update_runtime_scom_pointer( void *io_image) } - // write_vpd_ring_to_ipl_image() // - For VPD rings, there is no notion of a base and override ring. There can only be // one ring. Thus, for core ID specific rings, their vector locations are updated only // by 8-bytes, unlike 16-bytes for non-VPD rings which have base+override. // - Any ring, including ex_ rings, that have a chipletId==0xFF will get stored at its -// "top" or base position, i.e. as if it was coreId=0, or chipletId=0x10. +// zero-offset position, i.e. as if it was coreId=0, or chipletId=0x10. // - For IPL images, #R/G must be accessible through .fixed_toc since .toc is removed. // and same is true for proc_sbe_decompress_scan_chiplet_address (for RS4 launch.) // Notes: @@ -1193,30 +1186,25 @@ int update_runtime_scom_pointer( void *io_image) // Consider merging the two codes. int write_vpd_ring_to_ipl_image(void *io_image, uint32_t &io_sizeImageOut, - CompressedScanData *i_bufRs4Ring, + CompressedScanData *i_bufRs4Ring, // HB buf1 uint32_t i_ddLevel, uint8_t i_sysPhase, char *i_ringName, - void *i_bufTmp, + void *i_bufTmp, // HB buf2 uint32_t i_sizeBufTmp) { uint32_t rc=0, bufLC; - uint8_t chipletId, coreId; + uint8_t chipletId, idxVector=0; uint32_t sizeRs4Launch, sizeRs4Ring; - uint32_t sizeImageIn, sizeImageOut, sizeImageOutEst, sizeNewDataBlock; + uint32_t sizeImageIn; PoreInlineContext ctx; uint32_t asmInitLC=0; uint32_t asmBuffer[ASM_RS4_LAUNCH_BUF_SIZE/4]; - void *ringsBuffer=NULL; uint64_t scanChipletAddress=0; - Rs4RingLayout rs4RingLayout, rs4RingLayoutBE; - uint32_t ringsDataBlockOffset=0; - uint64_t ringsDataBlockPoreAddr=0, addrOfFwdPtr=0; - SbeXipItem tocItem; SBE_XIP_ERROR_STRINGS(errorStrings); - MY_INF("i_ringName=%s", i_ringName); + MY_INF("i_ringName=%s; \n", i_ringName); if (i_bufTmp == NULL) { MY_ERR("\tTemporary ring buffer passed by caller points to NULL and is invalid.\n"); @@ -1225,6 +1213,8 @@ int write_vpd_ring_to_ipl_image(void *io_image, sbe_xip_image_size( io_image, &sizeImageIn); + chipletId = i_bufRs4Ring->iv_chipletId; + // Create RS4 launcher and store in asmBuffer. // rc = sbe_xip_get_scalar( io_image, "proc_sbe_decompress_scan_chiplet_address", &scanChipletAddress); @@ -1279,214 +1269,287 @@ int write_vpd_ring_to_ipl_image(void *io_image, return IMGBUILD_ERR_CHECK_CODE; } - // Obtain the back pointer to the .data item, i.e. the location of the ptr associated - // with the ring name in the -> .fixed_toc <- (since .toc is removed in IPL images.) + // Populate ring header and put ring header and Rs4 ring into + // proper spots in pre-allocated bufRs4RingBlock buffer (HB buf2). // - rc = sbe_xip_find( io_image, i_ringName, &tocItem); - if (rc) { - MY_ERR("\tWARNING: sbe_xip_find() failed: %s\n", SBE_XIP_ERROR_STRING(errorStrings, rc)); - if (rc==SBE_XIP_ITEM_NOT_FOUND) { - MY_ERR("\tProbable cause:\n"); - MY_ERR("\t\tThe variable name supplied (=%s) is not a valid key word in the image. (No .fixed_toc record.)\n", - i_ringName); - return IMGBUILD_ERR_KEYWORD_NOT_FOUND; - } - else { - MY_ERR("\tUnknown cause.\n"); - return IMGBUILD_ERR_XIP_UNKNOWN; - } - } - - // Store the forward pointer at the ring's vector: - // - For VPD rings, there is no notion of a base and override ring. There can only be - // one ring. Thus, for core ID specific rings, their vector locations are updated in - // 8-byte increments, unlike 16-bytes for non-VPD rings which have base+override. - // 2012-11-12: According to Jeshua, #G might have overrides! - // - Any ring, including ex_ rings, that have a chipletId==0xFF will get stored at its - // zero-offset position. - chipletId = i_bufRs4Ring->iv_chipletId; - if (chipletId>=0x10 && chipletId<0x20) { - coreId = chipletId - 0x10; - addrOfFwdPtr = tocItem.iv_address + 8*coreId; - } - else - addrOfFwdPtr = tocItem.iv_address; - MY_INF("Addr of forward ptr = 0x%016llx\n", addrOfFwdPtr); - - // Populate the local ring layout structure - // - rs4RingLayout.entryOffset = (uint64_t)( - sizeof(rs4RingLayout.entryOffset) + - sizeof(rs4RingLayout.backItemPtr) + - sizeof(rs4RingLayout.sizeOfThis) + - sizeof(rs4RingLayout.sizeOfMeta) + - sizeof(rs4RingLayout.ddLevel) + - sizeof(rs4RingLayout.sysPhase) + - sizeof(rs4RingLayout.override) + - sizeof(rs4RingLayout.reserved1) + - sizeof(rs4RingLayout.reserved2) + - 0 ); // No meta data => automatic 8-byte align of RS4 launch. - rs4RingLayout.backItemPtr = addrOfFwdPtr; - rs4RingLayout.sizeOfThis = rs4RingLayout.entryOffset + // Must be 8-byte aligned. - sizeRs4Launch + // Must be 8-byte aligned. - sizeRs4Ring; // Must be 8-byte aligned. - rs4RingLayout.sizeOfMeta = 0; - rs4RingLayout.ddLevel = i_ddLevel; - rs4RingLayout.sysPhase = i_sysPhase; - rs4RingLayout.override = 0; // Doesn't apply for VPD ring. Always "base". - rs4RingLayout.reserved1 = 0; - rs4RingLayout.reserved2 = 0; + DeltaRingLayout *bufRs4RingBlock; + uint64_t entryOffsetRs4RingBlock; + uint32_t sizeRs4RingBlock, sizeRs4RingBlockMax; - if (rs4RingLayout.entryOffset%8) { - MY_ERR("\tRS4 launch code entry not 8-byte aligned.\n\trs4RingLayout.entryOffset=%i", - (uint32_t)rs4RingLayout.entryOffset); - return IMGBUILD_ERR_CHECK_CODE; + bufRs4RingBlock = (DeltaRingLayout*)i_bufTmp; //HB buf2. + sizeRs4RingBlockMax = i_sizeBufTmp; + entryOffsetRs4RingBlock = calc_ring_layout_entry_offset( 0, 0); + bufRs4RingBlock->entryOffset = myRev64(entryOffsetRs4RingBlock); + bufRs4RingBlock->backItemPtr = 0; // Will be updated later. + sizeRs4RingBlock = entryOffsetRs4RingBlock + // Must be 8-byte aligned. + sizeRs4Launch + // Must be 8-byte aligned. + sizeRs4Ring; // Must be 8-byte aligned. + // Quick check to see if final ring block size will fit in HB buffer. + if (sizeRs4RingBlock>sizeRs4RingBlockMax) { + MY_ERR("RS4 ring block size (=%i) exceeds HB buf2 size (=%i).", + sizeRs4RingBlock, sizeRs4RingBlockMax); + return IMGBUILD_ERR_RING_TOO_LARGE; } - if (rs4RingLayout.sizeOfThis%8) { - MY_ERR("\tRS4 ring layout not 8-byte aligned.\n\trs4RingLayout.sizeOfThis=%i\n", - rs4RingLayout.sizeOfThis); - return IMGBUILD_ERR_CHECK_CODE; + // Populate RS4 ring block members. + bufRs4RingBlock->sizeOfThis = myRev32(sizeRs4RingBlock); + bufRs4RingBlock->sizeOfMeta = 0; + bufRs4RingBlock->ddLevel = myRev32(i_ddLevel); + bufRs4RingBlock->sysPhase = i_sysPhase; + bufRs4RingBlock->override = 0; + bufRs4RingBlock->reserved1 = 0; + bufRs4RingBlock->reserved2 = 0; + // Add the RS4 launch code and RS4 ring data... + bufLC = (uint32_t)entryOffsetRs4RingBlock; + // Copy over meta data which is zero, so nothing to do in this case! + // Copy over RS4 launch code which is already 8-byte aligned. + memcpy( (uint8_t*)bufRs4RingBlock+bufLC, (uint8_t*)asmBuffer, (size_t)sizeRs4Launch); + bufLC = bufLC + sizeRs4Launch; + // Copy over RS4 delta ring which is already BE formatted. + memcpy( (uint8_t*)bufRs4RingBlock+bufLC, (uint8_t*)i_bufRs4Ring, (size_t)sizeRs4Ring); + + // Now, some post-sanity checks on alignments. + if ( entryOffsetRs4RingBlock%8 || + sizeRs4RingBlock%8) { + MY_ERR("Member(s) of RS4 ring block are not 8-byte aligned; \n"); + MY_ERR(" Entry offset = %i; \n", (uint32_t)entryOffsetRs4RingBlock); + MY_ERR(" Size of ring block = %i; \n", sizeRs4RingBlock); + return IMGBUILD_ERR_MISALIGNED_RING_LAYOUT; } - - // Calc the size of the data section we're adding and the resulting output image's - // max size (needed for sbe_xip_append() ).. - // - sizeNewDataBlock = rs4RingLayout.sizeOfThis; - sizeImageOutEst = sizeImageIn + sizeNewDataBlock + SBE_XIP_MAX_SECTION_ALIGNMENT; - if (sizeImageOutEst>io_sizeImageOut) { - MY_ERR("Estimated new image size (=%i) would exceed max allowed image size (=%i).", - sizeImageOutEst, io_sizeImageOut); - io_sizeImageOut = sizeImageOutEst; - return IMGBUILD_ERR_IMAGE_TOO_LARGE; + + // Calculate any vector offset, i.e., in case of ex_ chiplet common ring name. + if (chipletId>=CID_EX_LOW && chipletId<=CID_EX_HIGH) + idxVector = chipletId - CID_EX_LOW; + else + idxVector = 0; + + // Write ring block to image. + rc = write_ring_block_to_image(io_image, + i_ringName, + bufRs4RingBlock, + idxVector, + 0, + 0, + io_sizeImageOut); + if (rc) { + MY_ERR("write_ring_block_to_image() failed w/rc=%i",rc); + MY_ERR("Check p8_delta_scan_rw.h for meaning of IMGBUILD_xyz rc code."); + return IMGBUILD_ERR_RING_WRITE_TO_IMAGE; } - - MY_INF("\tInput image size\t\t= %6i\n\tNew initf data block size\t= %6i\n\tOutput image size (max)\t\t= %6i\n", - sizeImageIn, sizeNewDataBlock, sizeImageOutEst); - MY_INF("\tentryOffset = %i\n\tsizeOfThis = %i\n", - (uint32_t)rs4RingLayout.entryOffset, rs4RingLayout.sizeOfThis); - MY_INF("\tRS4 launch size = %i\n\tRS4 delta size = %i\n", sizeRs4Launch, sizeRs4Ring); - MY_INF("\tBack item ptr = 0x%016llx\n", rs4RingLayout.backItemPtr); - MY_INF("\tDD level = %i\n\tSys phase = %i\n\tOverride = %i\n", - rs4RingLayout.ddLevel, rs4RingLayout.sysPhase, rs4RingLayout.override); - - // Combine rs4RingLayout members into a unified buffer (ringsBuffer). - // - if (sizeNewDataBlock>i_sizeBufTmp) { - MY_ERR("New ring data block size (=%i) would exceed max allowed size (=%i).", - sizeNewDataBlock, i_sizeBufTmp); - return IMGBUILD_ERR_RING_TOO_LARGE; - } - ringsBuffer = i_bufTmp; - // ... and copy the rs4 ring layout data into ringsBuffer in BIG-ENDIAN format. - bufLC = 0; - rs4RingLayoutBE.entryOffset = myRev64(rs4RingLayout.entryOffset); - memcpy( (uint8_t*)ringsBuffer+bufLC, &rs4RingLayoutBE.entryOffset, sizeof(rs4RingLayoutBE.entryOffset)); - - bufLC = bufLC + sizeof(rs4RingLayoutBE.entryOffset); - rs4RingLayoutBE.backItemPtr = myRev64(rs4RingLayout.backItemPtr); - memcpy( (uint8_t*)ringsBuffer+bufLC, &rs4RingLayoutBE.backItemPtr, sizeof(rs4RingLayoutBE.backItemPtr)); - - bufLC = bufLC + sizeof(rs4RingLayoutBE.backItemPtr); - rs4RingLayoutBE.sizeOfThis = myRev32(rs4RingLayout.sizeOfThis); - memcpy( (uint8_t*)ringsBuffer+bufLC, &rs4RingLayoutBE.sizeOfThis, sizeof(rs4RingLayoutBE.sizeOfThis)); - - bufLC = bufLC + sizeof(rs4RingLayoutBE.sizeOfThis); - rs4RingLayoutBE.sizeOfMeta = myRev32(rs4RingLayout.sizeOfMeta); - memcpy( (uint8_t*)ringsBuffer+bufLC, &rs4RingLayoutBE.sizeOfMeta, sizeof(rs4RingLayoutBE.sizeOfMeta)); - - bufLC = bufLC + sizeof(rs4RingLayoutBE.sizeOfMeta); - rs4RingLayoutBE.ddLevel = myRev32(rs4RingLayout.ddLevel); - memcpy( (uint8_t*)ringsBuffer+bufLC, &rs4RingLayoutBE.ddLevel, sizeof(rs4RingLayoutBE.ddLevel)); - - bufLC = bufLC + sizeof(rs4RingLayoutBE.ddLevel); - rs4RingLayoutBE.sysPhase = myRev32(rs4RingLayout.sysPhase); - memcpy( (uint8_t*)ringsBuffer+bufLC, &rs4RingLayout.sysPhase, sizeof(rs4RingLayoutBE.sysPhase)); - - bufLC = bufLC + sizeof(rs4RingLayoutBE.sysPhase); - rs4RingLayoutBE.override = myRev32(rs4RingLayout.override); - memcpy( (uint8_t*)ringsBuffer+bufLC, &rs4RingLayout.override, sizeof(rs4RingLayoutBE.override)); - - bufLC = bufLC + sizeof(rs4RingLayoutBE.override); - rs4RingLayoutBE.reserved1 = myRev32(rs4RingLayout.reserved1); - memcpy( (uint8_t*)ringsBuffer+bufLC, &rs4RingLayout.reserved1, sizeof(rs4RingLayoutBE.reserved1)); - - bufLC = bufLC + sizeof(rs4RingLayoutBE.reserved1); - rs4RingLayoutBE.reserved2 = myRev32(rs4RingLayout.reserved2); - memcpy( (uint8_t*)ringsBuffer+bufLC, &rs4RingLayout.reserved2, sizeof(rs4RingLayoutBE.reserved2)); + + MY_INF("\tSuccessful IPL image update; \n"); + + return rc; +} + + +// write_vpd_ring_to_slw_image() +// - For VPD rings, there is no notion of a base and override ring. There can only be +// one ring. Thus, for core ID specific rings, their vector locations are updated only +// by 8-bytes, unlike 16-bytes for non-VPD rings which have base+override. +// - Any ring, including ex_ rings, that have a chipletId==0xFF will get stored at its +// "top" or base position, i.e. as if it was coreId=0, or chipletId=0x10. +// - For IPL images, #R/G must be accessible through .fixed_toc since .toc is removed. +// and same is true for proc_sbe_decompress_scan_chiplet_address (for RS4 launch.) +// Notes: +int write_vpd_ring_to_slw_image(void *io_image, + uint32_t &io_sizeImageOut, + CompressedScanData *i_bufRs4Ring, // HB buf1 + uint32_t i_ddLevel, + uint8_t i_sysPhase, + char *i_ringName, + void *i_bufTmp, // HB buf2 + uint32_t i_sizeBufTmp) +{ + uint32_t rc=0, bufLC; + uint8_t chipletId, idxVector=0; + uint32_t sizeRingRaw=0, sizeRingRawChk; + uint32_t sizeImageIn; + uint32_t *wfInline=NULL; + uint32_t wfInlineLenInWords; + uint64_t scanMaxRotate=SCAN_ROTATE_DEFAULT; - bufLC = bufLC + sizeof(rs4RingLayoutBE.reserved2); + MY_INF("i_ringName=%s; \n", i_ringName); + + if (i_bufTmp == NULL) { + MY_ERR("Temporary ring buffer passed by caller points to NULL and is invalid.\n"); + return IMGBUILD_ERR_MEMORY; + } + + sbe_xip_image_size( io_image, &sizeImageIn); - if (bufLC!=(uint32_t)rs4RingLayout.entryOffset) { - MY_ERR("Inconsistent calculations of entryOffset to RS4 launch code.\n"); - return IMGBUILD_ERR_CHECK_CODE; + chipletId = i_bufRs4Ring->iv_chipletId; + + // Decompress RS4 VPD ring. + // + sizeRingRaw = myRev32(i_bufRs4Ring->iv_length); + if ((sizeRingRaw+7)/8 > i_sizeBufTmp) { + MY_ERR("Decompressed byte size of VPD ring (=%i) exceeds size of buffer (=%i).", + (sizeRingRaw+7)/8, i_sizeBufTmp); + return IMGBUILD_ERR_RING_TOO_LARGE; + } + rc = _rs4_decompress((uint8_t*)i_bufTmp, + i_sizeBufTmp, + &sizeRingRawChk, // Uncompressed raw ring size in bits. + i_bufRs4Ring); + if (rc) { + MY_ERR("_rs4_decompress() failed w/rc=%i; ",rc); + return IMGBUILD_ERR_RS4_DECOMPRESS; + } + if (sizeRingRaw != sizeRingRawChk) { + MY_ERR("Ring size from RS4 container (=%i) differs from ring size returned by _rs4_decompress (=%i).", + sizeRingRaw, sizeRingRawChk); + return IMGBUILD_ERR_RS4_DECOMPRESS; } - // RS4 launch buffer alread BE formatted. - memcpy( (uint8_t*)ringsBuffer+bufLC, (uint8_t*)asmBuffer, (size_t)sizeRs4Launch); + // Create wiggle-flip program. + // + rc = sbe_xip_get_scalar( io_image, SCAN_MAX_ROTATE_38XXX_NAME, &scanMaxRotate); + if (rc) { + MY_ERR("Strange error from sbe_xip_get_scalar(SCAN_MAX_ROTATE_38XXX_NAME) w/rc=%i; ",rc); + MY_ERR("Already retrieved SCAN_MAX_ROTATE_38XXX_NAME in slw_build() w/o trouble; "); + return IMGBUILD_ERR_XIP_MISC; + } + if (scanMaxRotate<0x20 || scanMaxRotate>SCAN_MAX_ROTATE) { + MY_INF("WARNING: Value of key word SCAN_MAX_ROTATE_38XXX_NAME=0x%llx is not permitted; ",scanMaxRotate); + scanMaxRotate = SCAN_ROTATE_DEFAULT; + MY_INF("scanMaxRotate set to 0x%llx; ", scanMaxRotate); + MY_INF("Continuing...; "); + } + wfInline = (uint32_t*)i_bufRs4Ring; // Reuse this buffer (HB buf1) for wiggle-flip prg. + wfInlineLenInWords = i_sizeBufTmp/4; // Assuming same size of both HB buf1 and buf2. + rc = create_wiggle_flip_prg((uint32_t*)i_bufTmp, + sizeRingRaw, + myRev32(i_bufRs4Ring->iv_scanSelect), + (uint32_t)i_bufRs4Ring->iv_chipletId, + &wfInline, + &wfInlineLenInWords, // Is 8-byte aligned on return. + (uint32_t)scanMaxRotate); + if (rc) { + MY_ERR("create_wiggle_flip_prg() failed w/rc=%i; ",rc); + return IMGBUILD_ERR_WF_CREATE; + } - bufLC = bufLC + sizeRs4Launch; // This is [already] 8-byte aligned. - if (bufLC%8) { - MY_ERR("\tRS4 ring layout (during buffer copy) is not 8-byte aligned.\n\tbufLC=%i\n", - bufLC); - return IMGBUILD_ERR_CHECK_CODE; + // Populate ring header and put ring header and Wf ring into + // proper spots in pre-allocated bufWfRingBlock buffer (HB buf2). + // + DeltaRingLayout *bufWfRingBlock; + uint64_t entryOffsetWfRingBlock; + uint32_t sizeWfRingBlock, sizeWfRingBlockMax; + + bufWfRingBlock = (DeltaRingLayout*)i_bufTmp; // Reuse this buffer (HB buf2) for WF ring block. + sizeWfRingBlockMax = i_sizeBufTmp; + entryOffsetWfRingBlock = calc_ring_layout_entry_offset( 1, 0); + bufWfRingBlock->entryOffset = myRev64(entryOffsetWfRingBlock); + bufWfRingBlock->backItemPtr = 0; // Will be updated below, as we don't know yet. + sizeWfRingBlock = entryOffsetWfRingBlock + // Must be 8-byte aligned. + wfInlineLenInWords*4; // Must be 8-byte aligned. + // Quick check to see if final ring block size will fit in HB buffer. + if (sizeWfRingBlock>sizeWfRingBlockMax) { + MY_ERR("WF ring block size (=%i) exceeds HB buf2 size (=%i).", + sizeWfRingBlock, sizeWfRingBlockMax); + return IMGBUILD_ERR_RING_TOO_LARGE; + } + bufWfRingBlock->sizeOfThis = myRev32(sizeWfRingBlock); + bufWfRingBlock->sizeOfMeta = 0; + bufLC = (uint32_t)entryOffsetWfRingBlock; + // Copy over meta data which is zero, so nothing to do in this case! + // Copy over WF ring prg which is already 8-byte aligned. + memcpy( (uint8_t*)bufWfRingBlock+bufLC, wfInline, (size_t)wfInlineLenInWords*4); + + // Now, some post-sanity checks on alignments. + if ( entryOffsetWfRingBlock%8 || + sizeWfRingBlock%8) { + MY_ERR("Member(s) of WF ring block are not 8-byte aligned:"); + MY_ERR(" Entry offset = %i", (uint32_t)entryOffsetWfRingBlock); + MY_ERR(" Size of ring block = %i", sizeWfRingBlock); + return IMGBUILD_ERR_MISALIGNED_RING_LAYOUT; } - // RS4 delta ring already BE formatted. - memcpy( (uint8_t*)ringsBuffer+bufLC, (uint8_t*)i_bufRs4Ring, (size_t)sizeRs4Ring); - - // Append rs4DeltaLayout to .rings section of in-memory input image. - // Note! All rs4DeltaLayout members should already be 8-byte aligned. - // - ringsDataBlockOffset = 0; - rc = sbe_xip_append( io_image, - SBE_XIP_SECTION_RINGS, - (void*)ringsBuffer, - sizeNewDataBlock, - sizeImageOutEst, - &ringsDataBlockOffset); - MY_INF("\tringsDataBlockOffset=0x%08x\n",ringsDataBlockOffset); - if (rc) { - MY_ERR("\tsbe_xip_append() failed: %s\n", SBE_XIP_ERROR_STRING(errorStrings, rc)); - return IMGBUILD_ERR_XIP_MISC; - } - // ...test if successful update. - sbe_xip_image_size(io_image, &sizeImageOut); - io_sizeImageOut = sizeImageOut; - rc = sbe_xip_validate(io_image, sizeImageOut); - if (rc) { - MY_ERR("\tsbe_xip_validate() of output image copy failed: %s\n", SBE_XIP_ERROR_STRING(errorStrings, rc)); - return IMGBUILD_ERR_XIP_MISC; + // Calculate any vector offset, i.e., in case of ex_ chiplet common ring name. + if (chipletId>=CID_EX_LOW && chipletId<=CID_EX_HIGH) + idxVector = chipletId - CID_EX_LOW; + else + idxVector = 0; + + // Write ring block to image. + rc = write_ring_block_to_image(io_image, + i_ringName, + bufWfRingBlock, + idxVector, + 0, + 0, + io_sizeImageOut); + if (rc) { + MY_ERR("write_ring_block_to_image() failed w/rc=%i; \n",rc); + MY_ERR("Check p8_delta_scan_rw.h for meaning of IMGBUILD_xyz rc code; \n"); + return IMGBUILD_ERR_RING_WRITE_TO_IMAGE; } - MY_INF("\tSuccessful append of RS4 ring to .rings... Next, update variable name ptr...\n"); - // ...convert rings section offset to a PORE address - rc = sbe_xip_section2pore( io_image, SBE_XIP_SECTION_RINGS, ringsDataBlockOffset, &ringsDataBlockPoreAddr); - MY_INF("\tringsDataBlockPoreAddr=0x%016llx\n", ringsDataBlockPoreAddr); - if (rc) { - MY_ERR("\tsbe_xip_section2pore() failed: %s\n", SBE_XIP_ERROR_STRING(errorStrings, rc)); - return IMGBUILD_ERR_XIP_MISC; + + MY_INF("Successful SLW image update; \n"); + + return rc; +} + + +// calc_ring_delta_state() parms: +// i_init - init (flush) ring state +// i_alter - altered (desired) ring state +// o_delta - ring delta state, caller allocates buffer +// i_ringLen - length of ring in bits +int calc_ring_delta_state( const uint32_t *i_init, + const uint32_t *i_alter, + uint32_t *o_delta, + const uint32_t i_ringLen ) +{ + int i=0, count=0, bit=0, remainder=0, remainingBits=0; + uint32_t init, alter; + uint32_t mask=0; + + // Do some checking of input parms + if ( (i_init==NULL) || (i_alter==NULL) || (o_delta==NULL) || (i_ringLen==0) ) { + MY_ERR("Bad input arguments.\n"); + return IMGBUILD_BAD_ARGS; } - // ...and lastly, associate PORE addr with ringName. - rc = sbe_xip_set_scalar( io_image, i_ringName, ringsDataBlockPoreAddr); - if (rc) { - MY_ERR("\tsbe_xip_set_scalar() failed: %s\n", SBE_XIP_ERROR_STRING(errorStrings, rc)); - if (rc==SBE_XIP_ITEM_NOT_FOUND) { - MY_ERR("\tProbable cause:\n"); - MY_ERR("\t\tThe variable name supplied (=%s) is not a valid key word in the image. (No TOC record.)\n", - i_ringName); - return IMGBUILD_ERR_KEYWORD_NOT_FOUND; - } - if (rc==SBE_XIP_BUG) { - MY_ERR("\tProbable cause:\n"); - MY_ERR("\t\tThe variable name supplied (=%s) is a valid key word but cannot be updated with a scalar value.\n", - i_ringName); - return IMGBUILD_ERR_XIP_MISC; + + // Check how many 32-bit shift ops are needed and if we need final shift of remaining bit. + count = i_ringLen/32; + remainder = i_ringLen%32; + if (remainder>0) + count = count + 1; + remainingBits = i_ringLen; + MY_DBG("count=%i rem=%i remBits=%i\n",count,remainder,remainingBits); + + // XOR flush and init values 32 bits at a time. Store result in o_delta buffer. + for (i=0; i<count; i++) { + + if (remainingBits<=0) { + MY_ERR("remaingBits can not be negative.\n"); + return IMGBUILD_ERR_CHECK_CODE; } - return IMGBUILD_ERR_XIP_UNKNOWN; - } - MY_INF("\tSuccessful in-memory image update...\n"); + init = i_init[i]; + alter = i_alter[i]; + + if (remainingBits>=32) + remainingBits = remainingBits-32; + else { //If remaining bits are less than 32 bits, mask unused bits + mask = 0; + for (bit=0; bit<(32-remainingBits); bit++) { + mask = mask << 1; + mask = mask + 1; + } + MY_DBG("remainingBits=%i<32. Padding w/zeros. True bit length unaltered. (@word count=%i)\n",remainingBits,count); + mask = ~mask; + init = init & mask; + alter = alter & mask; + remainingBits = 0; + } + + // Do the XORing. + o_delta[i] = init ^ alter; + } - return rc; + return IMGBUILD_SUCCESS; } diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help_base.C b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help_base.C new file mode 100644 index 000000000..7c60726b0 --- /dev/null +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help_base.C @@ -0,0 +1,362 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help_base.C $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2013 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: p8_image_help_base.C,v 1.6 2013/01/02 03:01:28 cmolsen Exp $ +/*------------------------------------------------------------------------------*/ +/* *! TITLE : p8_image_help_base.c */ +/* *! DESCRIPTION : Basic helper functions for building and extracting */ +// information from SBE-XIP images. +/* *! OWNER NAME : Michael Olsen cmolsen@us.ibm.com */ +// +/* *! EXTENDED DESCRIPTION : */ +// +/* *! USAGE : */ +// +/* *! ASSUMPTIONS : */ +// +/* *! COMMENTS : */ +// +/*------------------------------------------------------------------------------*/ + +#include <p8_delta_scan_rw.h> + +#ifdef __FAPI +#include <fapi.H> +#endif +extern "C" { + + +// get_ring_layout_from_image2() +// - This is a simplified version of get_ring_layout_from_image(): +// - It returns a pointer to the ring layout structure in the input image. +// - It DOES NOT populate members of the ring layout structure! +// - Don't attempt to populate members either or it will bomb since there is +// no real structure being allocated. It's merely a pointer of type +// DeltaRingLayout, so you can use the non-ptr members to point to values +// in the image. +// +int get_ring_layout_from_image2( const void *i_imageIn, + uint32_t i_ddLevel, + uint8_t i_sysPhase, + DeltaRingLayout **o_rs4RingLayout, + void **nextRing) +{ + uint32_t rc=0, rcLoc=0; + uint8_t bRingFound=0, bRingEOS=0; + DeltaRingLayout *thisRingLayout, *nextRingLayout; //Pointers into memory mapped image. DO NOT CHANGE MEMBERS! + uint32_t sizeInitf; + SbeXipSection hostSection; + void *initfHostAddress0; + + SBE_XIP_ERROR_STRINGS(g_errorStrings); + + // Always first get the .initf stats from the TOC: + // - .initf host address offset and + // - .initf size + // + rc = sbe_xip_get_section( i_imageIn, SBE_XIP_SECTION_RINGS, &hostSection); + if (rc) { + MY_INF("ERROR : sbe_xip_get_section() failed: %s", SBE_XIP_ERROR_STRING(g_errorStrings, rc)); + MY_INF("Probable cause:"); + MY_INF("\tThe section (=SBE_XIP_SECTION_RINGS=%i) was not found.",SBE_XIP_SECTION_RINGS); + return IMGBUILD_ERR_KEYWORD_NOT_FOUND; + } + if (hostSection.iv_offset==0) { + MY_INF("INFO : No ring data exists for the section ID = SBE_XIP_SECTION_RINGS (ID=%i).",SBE_XIP_SECTION_RINGS); + return DSLWB_RING_SEARCH_NO_MATCH; // Implies exhaust search as well. + } + initfHostAddress0 = (void*)((uintptr_t)i_imageIn + hostSection.iv_offset); + sizeInitf = hostSection.iv_size; + + // On first call, get the base offset to the .initf section. + // On subsequent calls, we're into the search for ddLevel and sysPhase, so use nextRing instead. + // + if (*nextRing==NULL) + nextRingLayout = (DeltaRingLayout*)initfHostAddress0; + else + nextRingLayout = (DeltaRingLayout*)*nextRing; + + MY_DBG("initfHostAddress0 = 0x%016llx",(uint64_t)initfHostAddress0); + MY_DBG("sizeInitf = %i", sizeInitf); + MY_DBG("nextRingLayout = 0x%016llx",(uint64_t)nextRingLayout); + + // Populate the output RS4 ring BE layout structure as well as local structure in host LE format where needed. + // Note! Entire memory content is in BE format. So we do LE conversions where needed. + // + bRingFound = 0; + bRingEOS = 0; + + // SEARCH loop: Parse ring blocks successively until we find a ring that matches: + // ddLevel == i_ddLevel + // sysPhase == i_sysPhase + // + while (!bRingFound && !bRingEOS) { + thisRingLayout = nextRingLayout; + MY_DBG("Next backItemPtr = 0x%016llx",myRev64(thisRingLayout->backItemPtr)); + MY_DBG("Next ddLevel = 0x%02x",myRev32(thisRingLayout->ddLevel)); + MY_DBG("Next sysPhase = %i",thisRingLayout->sysPhase); + MY_DBG("Next override = %i",thisRingLayout->override); + MY_DBG("Next reserved1 = %i",thisRingLayout->reserved1); + MY_DBG("Next reserved2 = %i",thisRingLayout->reserved2); + + if (myRev32(thisRingLayout->ddLevel)==i_ddLevel) { // Is there a non-specific DD level, like for sys phase? + if ((thisRingLayout->sysPhase==0 && i_sysPhase==0) || + (thisRingLayout->sysPhase==1 && i_sysPhase==1) || + (thisRingLayout->sysPhase==2 && (i_sysPhase==0 || i_sysPhase==1))) { + bRingFound = 1; + MY_DBG("\tRing match found!"); + } + } + nextRingLayout = (DeltaRingLayout*)((uintptr_t)thisRingLayout + myRev32(thisRingLayout->sizeOfThis)); + *nextRing = (void*)nextRingLayout; + if (nextRingLayout>=(DeltaRingLayout*)((uintptr_t)initfHostAddress0+sizeInitf)) { + bRingEOS = 1; + *nextRing = NULL; + MY_DBG("\tRing search exhausted!"); + } + + } // End of SEARCH. + + if (bRingFound) { + if (bRingEOS) + rcLoc = DSLWB_RING_SEARCH_EXHAUST_MATCH; + else + rcLoc = DSLWB_RING_SEARCH_MATCH; + } + else { + *nextRing = NULL; + if (bRingEOS) + return DSLWB_RING_SEARCH_NO_MATCH; // Implies exhaust search as well. + else { + MY_INF("Messed up ring search. Check code and .rings content. Returning nothing."); + return DSLWB_RING_SEARCH_MESS; + } + } + + *o_rs4RingLayout = thisRingLayout; + + // Check that the ring layout structure in the memory is 8-byte aligned. This must be so because: + // - The entryOffset address must be on an 8-byte boundary because the start of the .initf ELF section must + // be 8-byte aligned AND because the rs4Delta member is the last member and which must itself be 8-byte aligned. + // - These two things together means that both the beginning and end of the delta ring layout must be 8-byte + // aligned, and thus the whole block,i.e. sizeOfThis, must be 8-byte aligned. + // Also check that the RS4 delta ring is 8-byte aligned. + // Also check that the RS4 launcher is 8-byte aligned. + // + if (((uintptr_t)thisRingLayout-(uintptr_t)i_imageIn)%8 || + myRev32(thisRingLayout->sizeOfThis)%8 || + myRev64(thisRingLayout->entryOffset)%8 ) { + MY_INF("Ring block or ring code section is not 8-byte aligned:"); + MY_INF(" thisRingLayout-imageIn = %i",(uintptr_t)thisRingLayout-(uintptr_t)i_imageIn); + MY_INF(" thisRingLayout->sizeOfThis = %i",myRev32(thisRingLayout->sizeOfThis)); + MY_INF(" thisRingLayout->entryOffset = %i",(uint32_t)myRev64(thisRingLayout->entryOffset)); + return IMGBUILD_ERR_MISALIGNED_RING_LAYOUT; + } + + if (*nextRing > (void*)((uintptr_t)initfHostAddress0 + sizeInitf)) { + MY_INF("Book keeping got messed up during .initf search. Initf section does not appear aligned."); + MY_INF("initfHostAddress0+sizeInitf = 0x%016llx",(uint64_t)initfHostAddress0+sizeInitf); + MY_INF("nextRing = %i",*(uint32_t*)nextRing); + MY_INF("Continuing..."); + } + + return rcLoc; +} + + + +// Function: write_ring_block_to_image() +// Comments: +// - Appends an RS4 or WF ring block to the .rings section. It doesn't care +// what type of ring it is. The only data that might be updated in the ring +// block is the back pointer which is shared between both types of rings. +// - If ringName=NULL: Assumes fwd ptr already exists in .ipl_data or .data +// section. Back pointer in ring block is unchanged. +// - If ringName!=NULL: Adds fwd ptr to .ipl_data or .data section. Updates back +// pointer in input ring block. +// - idxVector: Contains the index number of a vector array. This is pretty much +// limited for ex_ chiplet IDs. It is ignored if ringName==NULL. +// - override: Indicates if the ring is an override ring. It is ignored if +// ringName==NULL. +// - overridable: Indicates if a ring can be overridden. It is ignored if +// ringName==NULL. +// - Assumes ring block is in BE format. +int write_ring_block_to_image( void *io_image, + const char *i_ringName, + DeltaRingLayout *i_ringBlock, + const uint8_t i_idxVector, + const uint8_t i_override, + const uint8_t i_overridable, + const uint32_t i_sizeImageMax) +{ + uint32_t rc=0; + SbeXipItem tocItem; + uint32_t offsetRingBlock=1; // Initialize to anything but zero. + uint32_t sizeImage=0; + uint64_t ringPoreAddress=0,backPtr=0,fwdPtrCheck; + + SBE_XIP_ERROR_STRINGS(g_errorStrings); + + if (myRev64(i_ringBlock->entryOffset)%8) { + MY_INF("Ring code section is not 8-byte aligned."); + return IMGBUILD_ERR_MISALIGNED_RING_LAYOUT; + } + + if (i_ringName) { + // Obtain the back pointer to the .data item, i.e. the location of the ptr associated with the + // ring/var name in the TOC. + // + rc = sbe_xip_find( io_image, i_ringName, &tocItem); + if (rc) { + MY_ERR("sbe_xip_find() failed w/rc=%i", rc); + MY_ERR("Probable cause: Ring name (=%s) not found in image.", i_ringName); + return IMGBUILD_ERR_KEYWORD_NOT_FOUND; + } + i_ringBlock->backItemPtr = myRev64( tocItem.iv_address + + i_idxVector*8*(1+i_overridable) + + 8*i_override*i_overridable ); + } + + // Append ring block to .rings section. + // + rc = sbe_xip_append(io_image, + SBE_XIP_SECTION_RINGS, + (void*)i_ringBlock, + myRev32(i_ringBlock->sizeOfThis), + i_sizeImageMax, + &offsetRingBlock); + if (rc) { + MY_INF("sbe_xip_append() failed: %s", SBE_XIP_ERROR_STRING(g_errorStrings, rc)); + return IMGBUILD_ERR_APPEND; + } + // ...get new image size and test if successful update. + rc = sbe_xip_image_size( io_image, &sizeImage); + MY_DBG("Updated image size (after append): %i",sizeImage); + if (rc) { + MY_INF("sbe_xip_image_size() of output image failed: %s", SBE_XIP_ERROR_STRING(g_errorStrings, rc)); + return IMGBUILD_ERR_XIP_MISC; + } + rc = sbe_xip_validate( io_image, sizeImage); + if (rc) { + MY_INF("sbe_xip_validate() of output image failed: %s", SBE_XIP_ERROR_STRING(g_errorStrings, rc)); + return IMGBUILD_ERR_XIP_MISC; + } + + // Update forward pointer associated with the ring/var name + any override offset. + // + // Convert the ring offset (wrt .rings address) to an PORE address + rc = sbe_xip_section2pore(io_image, SBE_XIP_SECTION_RINGS, offsetRingBlock, &ringPoreAddress); + MY_DBG("fwdPtr=0x%016llx", ringPoreAddress); + if (rc) { + MY_INF("sbe_xip_section2pore() failed: %s", SBE_XIP_ERROR_STRING(g_errorStrings, rc)); + return IMGBUILD_ERR_XIP_MISC; + } + + // Now, update the forward pointer. + // + // First, retrieve the ring block's backPtr which tells us where the fwd ptr + // is located. + // + // Note that the fwd ptr's addr is the old variable/ring name's pointer location + // from the ref image. DO NOT add an 8-byte offset if override ring. The + // backItemPtr in the input ring block already has this from the ref image, + // and it shouldn't have changed after having been ported over to an + // IPL/Seeprom image. + backPtr = myRev64(i_ringBlock->backItemPtr); + MY_DBG("backPtr = 0x%016llx", backPtr); + // Second, put the ring's Pore addr into the location pointed to by the back ptr. + rc = sbe_xip_write_uint64( io_image, + backPtr, + ringPoreAddress); + // Third, let's read it back to make sure we're OK a little further down. + rc = rc+sbe_xip_read_uint64(io_image, + backPtr, + &fwdPtrCheck); + if (rc) { + MY_INF("sbe_xip_[write,read]_uint64() failed: %s", SBE_XIP_ERROR_STRING(g_errorStrings, rc)); + return IMGBUILD_ERR_XIP_MISC; + } + + // Check for pointer mess. + if (fwdPtrCheck!=ringPoreAddress || backPtr!=myRev64(i_ringBlock->backItemPtr)) { + MY_INF("Forward or backward pointer mess. Check code."); + MY_INF("fwdPtr =0x%016llx",ringPoreAddress); + MY_INF("fwdPtrCheck =0x%016llx",fwdPtrCheck); + MY_INF("layout bckPtr=0x%016llx",myRev64(i_ringBlock->backItemPtr)); + MY_INF("backPtr =0x%016llx",backPtr); + return IMGBUILD_ERR_FWD_BACK_PTR_MESS; + } + // ...test if successful update. + rc = sbe_xip_validate( io_image, sizeImage); + if (rc) { + MY_INF("sbe_xip_validate() of output image failed: %s", SBE_XIP_ERROR_STRING(g_errorStrings, rc)); + MY_INF("Probable cause: sbe_xip_write_uint64() updated at the wrong address (=0x%016llx)", + myRev64(i_ringBlock->backItemPtr)); + return IMGBUILD_ERR_XIP_MISC; + } + + return IMGBUILD_SUCCESS; +} + + +// calc_ring_layout_entry_offset() +// - Calculates the entry offset from the beginning of the ring block to the +// first line of inline Pore code. +// +uint64_t calc_ring_layout_entry_offset( + uint8_t i_typeRingLayout, // 0: RS4 1: WF + uint32_t i_sizeMetaData ) // Meta data size. +{ + DeltaRingLayout ringBlock; + if (i_typeRingLayout==0) { + // RS4 ring block. + ringBlock.entryOffset = (uint64_t)( + sizeof(ringBlock.entryOffset) + + sizeof(ringBlock.backItemPtr) + + sizeof(ringBlock.sizeOfThis) + + sizeof(ringBlock.sizeOfMeta) + + sizeof(ringBlock.ddLevel) + + sizeof(ringBlock.sysPhase) + + sizeof(ringBlock.override) + + sizeof(ringBlock.reserved1) + + sizeof(ringBlock.reserved2) + + myByteAlign(8, i_sizeMetaData) ); // 8-byte align RS4 launch. + } + else + if (i_typeRingLayout==1) { + // Wiggle-flip ring block. + ringBlock.entryOffset = (uint64_t)( + sizeof(ringBlock.entryOffset) + + sizeof(ringBlock.backItemPtr) + + sizeof(ringBlock.sizeOfThis) + + sizeof(ringBlock.sizeOfMeta) + + myByteAlign(8, i_sizeMetaData) ); // 8-byte align WF prg. + } + else + return MAX_UINT64_T; + + return ringBlock.entryOffset; +} + + + +} diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help_base.H b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help_base.H index 8dcffd76f..2829e2270 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help_base.H +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help_base.H @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2012 */ +/* COPYRIGHT International Business Machines Corp. 2012,2013 */ /* */ /* p1 */ /* */ @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_image_help_base.H,v 1.8 2012/11/13 16:40:53 cmolsen Exp $ +// $Id: p8_image_help_base.H,v 1.9 2012/12/18 05:24:00 cmolsen Exp $ //------------------------------------------------------------------------------ // Title: p8_image_help_base.H // Description: Contains the most basic structures and defines needed for @@ -35,7 +35,8 @@ const uint8_t CHIPLET_ID_MIN = 0x00; const uint8_t CHIPLET_ID_MAX = 0x1F; const uint8_t MAX_CHIPLETS = CHIPLET_ID_MAX-CHIPLET_ID_MIN+1; const uint32_t ASM_RS4_LAUNCH_BUF_SIZE = 24; // Byte size of RS4 launch buffer. -#define LISTING_STRING_SIZE (2*PORE_INLINE_DISASSEMBLER_STRING_SIZE) +const uint32_t LISTING_STRING_SIZE = 256; +const uint64_t MAX_UINT64_T = (uint64_t)0xFFFFFFFF<<32 | (uint64_t)0xFFFFFFFF; // Base (shared) ring layout for both RS4 and Wiggle-flip layouts. typedef struct { diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_ring_identification.c b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_ring_identification.c index 05eeddc2e..3923c5d59 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_ring_identification.c +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_ring_identification.c @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2012 */ +/* COPYRIGHT International Business Machines Corp. 2012,2013 */ /* */ /* p1 */ /* */ @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_ring_identification.c,v 1.12 2012/12/16 02:06:13 cmolsen Exp $ +// $Id: p8_ring_identification.c,v 1.14 2012/12/19 12:49:27 cmolsen Exp $ /*------------------------------------------------------------------------------*/ /* *! (C) Copyright International Business Machines Corp. 2012 */ /* *! All Rights Reserved -- Property of IBM */ @@ -49,35 +49,33 @@ const RingIdList RING_ID_LIST_PG[] = { { "ex_time_core", 0xAB, 0x10, 0x1F, "ex_time_core_ring", VPD_KEYWORD_PDG }, //Chiplet specfc { "ex_time_eco", 0xAC, 0x10, 0x1F, "ex_time_eco_ring", VPD_KEYWORD_PDG }, //Chiplet specfc { "pb_gptr_dmipll", 0xAD, 0x02, 0x02, "pb_gptr_dmipll_ring", VPD_KEYWORD_PDG }, - { "pb_gptr_mcl", 0xAE, 0x02, 0x02, "pb_gptr_mcl_ring", VPD_KEYWORD_PDG }, - { "pb_gptr_mcr", 0xAF, 0x02, 0x02, "pb_gptr_mcr_ring", VPD_KEYWORD_PDG }, - { "pb_gptr_nest", 0xB0, 0x02, 0x02, "pb_gptr_nest_ring", VPD_KEYWORD_PDG }, - { "pb_gptr_nx", 0xB1, 0x02, 0x02, "pb_gptr_nx_ring", VPD_KEYWORD_PDG }, - { "pb_gptr_pcis", 0xB2, 0x02, 0x02, "pb_gptr_pcis_ring", VPD_KEYWORD_PDG }, - { "pb_gptr_perv", 0xB3, 0x02, 0x02, "pb_gptr_perv_ring", VPD_KEYWORD_PDG }, - { "pb_time", 0xB4, 0x02, 0x02, "pb_time_ring", VPD_KEYWORD_PDG }, - { "pb_time_mcl", 0xB5, 0x02, 0x02, "pb_time_mcl_ring", VPD_KEYWORD_PDG }, - { "pb_time_mcr", 0xB5, 0x02, 0x02, "pb_time_mcr_ring", VPD_KEYWORD_PDG }, - { "pb_time_nx", 0xB6, 0x02, 0x02, "pb_time_nx_ring", VPD_KEYWORD_PDG }, - { "pci_gptr_iopci", 0xB7, 0x09, 0x09, "pci_gptr_iopci_ring", VPD_KEYWORD_PDG }, - { "pci_gptr_pbf", 0xB8, 0x09, 0x09, "pci_gptr_pbf_ring", VPD_KEYWORD_PDG }, - { "pci_gptr_pci0", 0xB9, 0x09, 0x09, "pci_gptr_pci0_ring", VPD_KEYWORD_PDG }, - { "pci_gptr_pci1", 0xBA, 0x09, 0x09, "pci_gptr_pci1_ring", VPD_KEYWORD_PDG }, - { "pci_gptr_pci2", 0xBB, 0x09, 0x09, "pci_gptr_pci2_ring", VPD_KEYWORD_PDG }, - { "pci_gptr_perv", 0xBC, 0x09, 0x09, "pci_gptr_perv_ring", VPD_KEYWORD_PDG }, - { "pci_gptr_pll", 0xBD, 0x09, 0x09, "pci_gptr_pll_ring", VPD_KEYWORD_PDG }, - { "pci_time", 0xBE, 0x09, 0x09, "pci_time_ring", VPD_KEYWORD_PDG }, - { "perv_gptr_net", 0xBF, 0x00, 0x00, "perv_gptr_net_ring", VPD_KEYWORD_PDG }, - { "perv_gptr_occ", 0xC0, 0x00, 0x00, "perv_gptr_occ_ring", VPD_KEYWORD_PDG }, - { "perv_gptr_perv", 0xC1, 0x00, 0x00, "perv_gptr_perv_ring", VPD_KEYWORD_PDG }, - { "perv_gptr_pib", 0xC2, 0x00, 0x00, "perv_gptr_pib_ring", VPD_KEYWORD_PDG }, - { "perv_gptr_pll", 0xC3, 0x00, 0x00, "perv_gptr_pll_ring", VPD_KEYWORD_PDG }, - { "perv_time", 0xC4, 0x00, 0x00, "perv_time_ring", VPD_KEYWORD_PDG }, - { "xb_gptr_iox", 0xC5, 0x04, 0x04, "xb_gptr_iox_ring", VPD_KEYWORD_PDG }, - { "xb_gptr_iopci", 0xC6, 0x04, 0x04, "xb_gptr_iopci_ring", VPD_KEYWORD_PDG }, - { "xb_gptr_pben", 0xC7, 0x04, 0x04, "xb_gptr_pben_ring", VPD_KEYWORD_PDG }, - { "xb_gptr_perv", 0xC8, 0x04, 0x04, "xb_gptr_perv_ring", VPD_KEYWORD_PDG }, - { "xb_time", 0xC9, 0x04, 0x04, "xb_time_ring", VPD_KEYWORD_PDG }, + { "pb_gptr_mcr", 0xAE, 0x02, 0x02, "pb_gptr_mcr_ring", VPD_KEYWORD_PDG }, + { "pb_gptr_nest", 0xAF, 0x02, 0x02, "pb_gptr_nest_ring", VPD_KEYWORD_PDG }, + { "pb_gptr_nx", 0xB0, 0x02, 0x02, "pb_gptr_nx_ring", VPD_KEYWORD_PDG }, + { "pb_gptr_pcis", 0xB1, 0x02, 0x02, "pb_gptr_pcis_ring", VPD_KEYWORD_PDG }, + { "pb_gptr_perv", 0xB2, 0x02, 0x02, "pb_gptr_perv_ring", VPD_KEYWORD_PDG }, + { "pb_time", 0xB3, 0x02, 0x02, "pb_time_ring", VPD_KEYWORD_PDG }, + { "pb_time_mcr", 0xB4, 0x02, 0x02, "pb_time_mcr_ring", VPD_KEYWORD_PDG }, + { "pb_time_nx", 0xB5, 0x02, 0x02, "pb_time_nx_ring", VPD_KEYWORD_PDG }, + { "pci_gptr_iopci", 0xB6, 0x09, 0x09, "pci_gptr_iopci_ring", VPD_KEYWORD_PDG }, + { "pci_gptr_pbf", 0xB7, 0x09, 0x09, "pci_gptr_pbf_ring", VPD_KEYWORD_PDG }, + { "pci_gptr_pci0", 0xB8, 0x09, 0x09, "pci_gptr_pci0_ring", VPD_KEYWORD_PDG }, + { "pci_gptr_pci1", 0xB9, 0x09, 0x09, "pci_gptr_pci1_ring", VPD_KEYWORD_PDG }, + { "pci_gptr_pci2", 0xBA, 0x09, 0x09, "pci_gptr_pci2_ring", VPD_KEYWORD_PDG }, + { "pci_gptr_perv", 0xBB, 0x09, 0x09, "pci_gptr_perv_ring", VPD_KEYWORD_PDG }, + { "pci_gptr_pll", 0xBC, 0x09, 0x09, "pci_gptr_pll_ring", VPD_KEYWORD_PDG }, + { "pci_time", 0xBD, 0x09, 0x09, "pci_time_ring", VPD_KEYWORD_PDG }, + { "perv_gptr_net", 0xBE, 0x00, 0x00, "perv_gptr_net_ring", VPD_KEYWORD_PDG }, + { "perv_gptr_occ", 0xBF, 0x00, 0x00, "perv_gptr_occ_ring", VPD_KEYWORD_PDG }, + { "perv_gptr_perv", 0xC0, 0x00, 0x00, "perv_gptr_perv_ring", VPD_KEYWORD_PDG }, + { "perv_gptr_pib", 0xC1, 0x00, 0x00, "perv_gptr_pib_ring", VPD_KEYWORD_PDG }, + { "perv_gptr_pll", 0xC2, 0x00, 0x00, "perv_gptr_pll_ring", VPD_KEYWORD_PDG }, + { "perv_time", 0xC3, 0x00, 0x00, "perv_time_ring", VPD_KEYWORD_PDG }, + { "xb_gptr_iox", 0xC4, 0x04, 0x04, "xb_gptr_iox_ring", VPD_KEYWORD_PDG }, + { "xb_gptr_iopci", 0xC5, 0x04, 0x04, "xb_gptr_iopci_ring", VPD_KEYWORD_PDG }, + { "xb_gptr_pben", 0xC6, 0x04, 0x04, "xb_gptr_pben_ring", VPD_KEYWORD_PDG }, + { "xb_gptr_perv", 0xC7, 0x04, 0x04, "xb_gptr_perv_ring", VPD_KEYWORD_PDG }, + { "xb_time", 0xC8, 0x04, 0x04, "xb_time_ring", VPD_KEYWORD_PDG }, }; const RingIdList RING_ID_LIST_PR[] = { @@ -86,14 +84,13 @@ const RingIdList RING_ID_LIST_PR[] = { { "ex_repr_core", 0xE1, 0x10, 0x1F, "ex_repr_core_ring", VPD_KEYWORD_PDR }, { "ex_repr_eco", 0xE2, 0x10, 0x1F, "ex_repr_eco_ring", VPD_KEYWORD_PDR }, { "pb_repr", 0xE3, 0x02, 0x02, "pb_repr_ring", VPD_KEYWORD_PDR }, - { "pb_repr_mcl", 0xE4, 0x02, 0x02, "pb_repr_mcl_ring", VPD_KEYWORD_PDR }, - { "pb_repr_mcr", 0xE5, 0x02, 0x02, "pb_repr_mcr_ring", VPD_KEYWORD_PDR }, - { "pb_repr_nx", 0xE6, 0x02, 0x02, "pb_repr_nx_ring", VPD_KEYWORD_PDR }, - { "pci_repr", 0xE7, 0x09, 0x09, "pci_repr_ring", VPD_KEYWORD_PDR }, - { "perv_repr", 0xE8, 0x00, 0x00, "perv_repr_ring", VPD_KEYWORD_PDR }, - { "perv_repr_net", 0xE9, 0x00, 0x00, "perv_repr_net_ring", VPD_KEYWORD_PDR }, - { "perv_repr_pib", 0xEA, 0x00, 0x00, "perv_repr_pib_ring", VPD_KEYWORD_PDR }, - { "xb_repr", 0xEB, 0x04, 0x04, "xb_repr_ring", VPD_KEYWORD_PDR }, + { "pb_repr_mcr", 0xE4, 0x02, 0x02, "pb_repr_mcr_ring", VPD_KEYWORD_PDR }, + { "pb_repr_nx", 0xE5, 0x02, 0x02, "pb_repr_nx_ring", VPD_KEYWORD_PDR }, + { "pci_repr", 0xE6, 0x09, 0x09, "pci_repr_ring", VPD_KEYWORD_PDR }, + { "perv_repr", 0xE7, 0x00, 0x00, "perv_repr_ring", VPD_KEYWORD_PDR }, + { "perv_repr_net", 0xE8, 0x00, 0x00, "perv_repr_net_ring", VPD_KEYWORD_PDR }, + { "perv_repr_pib", 0xE9, 0x00, 0x00, "perv_repr_pib_ring", VPD_KEYWORD_PDR }, + { "xb_repr", 0xEA, 0x04, 0x04, "xb_repr_ring", VPD_KEYWORD_PDR }, }; const uint32_t RING_ID_LIST_PG_SIZE = sizeof(RING_ID_LIST_PG)/sizeof(RING_ID_LIST_PG[0]); @@ -106,14 +103,13 @@ const RingIdList RING_ID_LIST[] = { { "ex_repr_core", 0xE1, 0x10, 0x1F, "ex_repr_core_ring", VPD_KEYWORD_PDR }, { "ex_repr_eco", 0xE2, 0x10, 0x1F, "ex_repr_eco_ring", VPD_KEYWORD_PDR }, { "pb_repr", 0xE3, 0x02, 0x02, "pb_repr_ring", VPD_KEYWORD_PDR }, - { "pb_repr_mcl", 0xE4, 0x02, 0x02, "pb_repr_mcl_ring", VPD_KEYWORD_PDR }, - { "pb_repr_mcr", 0xE5, 0x02, 0x02, "pb_repr_mcr_ring", VPD_KEYWORD_PDR }, - { "pb_repr_nx", 0xE6, 0x02, 0x02, "pb_repr_nx_ring", VPD_KEYWORD_PDR }, - { "pci_repr", 0xE7, 0x09, 0x09, "pci_repr_ring", VPD_KEYWORD_PDR }, - { "perv_repr", 0xE8, 0x00, 0x00, "perv_repr_ring", VPD_KEYWORD_PDR }, - { "perv_repr_net", 0xE9, 0x00, 0x00, "perv_repr_net_ring", VPD_KEYWORD_PDR }, - { "perv_repr_pib", 0xEA, 0x00, 0x00, "perv_repr_pib_ring", VPD_KEYWORD_PDR }, - { "xb_repr", 0xEB, 0x04, 0x04, "xb_repr_ring", VPD_KEYWORD_PDR }, + { "pb_repr_mcr", 0xE4, 0x02, 0x02, "pb_repr_mcr_ring", VPD_KEYWORD_PDR }, + { "pb_repr_nx", 0xE5, 0x02, 0x02, "pb_repr_nx_ring", VPD_KEYWORD_PDR }, + { "pci_repr", 0xE6, 0x09, 0x09, "pci_repr_ring", VPD_KEYWORD_PDR }, + { "perv_repr", 0xE7, 0x00, 0x00, "perv_repr_ring", VPD_KEYWORD_PDR }, + { "perv_repr_net", 0xE8, 0x00, 0x00, "perv_repr_net_ring", VPD_KEYWORD_PDR }, + { "perv_repr_pib", 0xE9, 0x00, 0x00, "perv_repr_pib_ring", VPD_KEYWORD_PDR }, + { "xb_repr", 0xEA, 0x04, 0x04, "xb_repr_ring", VPD_KEYWORD_PDR }, }; const uint32_t RING_ID_LIST_SIZE = sizeof(RING_ID_LIST)/sizeof(RING_ID_LIST[0]); diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build.C b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build.C index f74280b55..fe3429609 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_slw_build.C @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2012 */ +/* COPYRIGHT International Business Machines Corp. 2012,2013 */ /* */ /* p1 */ /* */ @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_slw_build.C,v 1.7 2012/11/27 18:44:03 cmolsen Exp $ +// $Id: p8_slw_build.C,v 1.9 2013/01/02 02:54:19 cmolsen Exp $ /*------------------------------------------------------------------------------*/ /* *! TITLE : p8_slw_build */ /* *! DESCRIPTION : Extracts and decompresses delta ring states from EPROM */ @@ -32,9 +32,9 @@ /* *! EXTENDED DESCRIPTION : */ // /* *! USAGE : To build (for Hostboot) - */ -// buildfapiprcd -C "p8_image_help.C,p8_scan_compression.C" -c "sbe_xip_image.c,pore_inline_assembler.c" -e "../../xml/error_info/p8_slw_build_errors.xml" p8_slw_build.C +// buildfapiprcd -C "p8_image_help.C,p8_image_help_base.C,p8_scan_compression.C" -c "sbe_xip_image.c,pore_inline_assembler.c" -e "../../xml/error_info/p8_slw_build_errors.xml" p8_slw_build.C // To build (for command-line) - -// buildfapiprcd -r ver-13-0 -C "p8_image_help.C,p8_scan_compression.C" -c "sbe_xip_image.c,pore_inline_assembler.c" -e "../../xml/error_info/p8_slw_build_errors.xml" -u "SLW_COMMAND_LINE,IMGBUILD_PPD_IGNORE_XIPC" p8_slw_build.C +// buildfapiprcd -r ver-13-0 -C "p8_image_help.C,p8_image_help_base.C,p8_scan_compression.C" -c "sbe_xip_image.c,pore_inline_assembler.c" -e "../../xml/error_info/p8_slw_build_errors.xml" -u "SLW_COMMAND_LINE,IMGBUILD_PPD_IGNORE_XIPC" p8_slw_build.C // Other Pre-Processor Directive (PPD) options - // To debug WF programs: // -u "IMGBUILD_PPD_DEBUG_WF" @@ -65,10 +65,6 @@ // sysPhase value, incl sysPhase=2, will cause no rings to be found. // /*------------------------------------------------------------------------------*/ -// The IMGBUILD_PPD_IGNORE_XIPC is defined to temporarily disable the call of -// p8_xip_customize HWP. -// @Todo: RTC 60670 will remove the macro to re-enable the HWP. -#define IMGBUILD_PPD_IGNORE_XIPC #include <p8_pore_api_custom.h> #include <HvPlicModule.H> @@ -308,6 +304,7 @@ ReturnCode p8_slw_build( const fapi::Target &i_target, sizeBuf2); free(buf1); free(buf2); + buf1 = buf2 = NULL; if (rc!=FAPI_RC_SUCCESS) { FAPI_ERR("Xip customization failed."); return rc; @@ -342,8 +339,6 @@ ReturnCode p8_slw_build( const fapi::Target &i_target, // Report final size. sbe_xip_image_size( i_imageOut, io_sizeImageOut); FAPI_INF("Final SLW image size: %i", *io_sizeImageOut); - if (buf1) free(buf1); - if (buf2) free(buf2); return FAPI_RC_SUCCESS; } @@ -442,8 +437,8 @@ ReturnCode p8_slw_build( const fapi::Target &i_target, if (rcLoc) { FAPI_ERR("create_wiggle_flip_prg() failed w/rcLoc=%i",rcLoc); //if (deltaRingDxed) free(deltaRingDxed); + if (buf1) free(buf1); if (buf2) free(buf2); - if (wfInline) free(wfInline); uint32_t & RC_LOCAL=rcLoc; FAPI_SET_HWP_ERROR(rc, RC_PROC_SLWB_WF_CREATION_ERROR); return rc; @@ -464,8 +459,8 @@ ReturnCode p8_slw_build( const fapi::Target &i_target, if (rcLoc) { FAPI_ERR("write_wiggle_flip_to_image() failed w/rcLoc=%i",rcLoc); //if (deltaRingDxed) free(deltaRingDxed); + if (buf1) free(buf1); if (buf2) free(buf2); - if (wfInline) free(wfInline); if (rcLoc==IMGBUILD_ERR_IMAGE_TOO_LARGE) { uint32_t & DATA_IMG_SIZE_OLD=sizeImageOld; uint32_t & DATA_IMG_SIZE_EST=sizeImageTmp; @@ -523,6 +518,7 @@ ReturnCode p8_slw_build( const fapi::Target &i_target, sizeBuf2); free(buf1); free(buf2); + buf1 = buf2 = NULL; if (rc!=FAPI_RC_SUCCESS) { FAPI_ERR("Xip customization failed."); return rc; @@ -546,9 +542,9 @@ ReturnCode p8_slw_build( const fapi::Target &i_target, } return rc; } - FAPI_INF("SLW section allocated for Ramming and Scomming tables."); + FAPI_INF("SLW section initialized for Ramming and Scomming tables."); // Update host_runtime_scom pointer to point to sub_slw_runtime_scom - rcLoc = update_runtime_scom_pointer( i_imageOut); + rcLoc = update_runtime_scom_pointer(i_imageOut); if (rcLoc==IMGBUILD_ERR_KEYWORD_NOT_FOUND) { uint32_t &RC_LOCAL=rcLoc; FAPI_SET_HWP_ERROR(rc, RC_PROC_SLWB_KEYWORD_NOT_FOUND_ERROR); @@ -557,8 +553,6 @@ ReturnCode p8_slw_build( const fapi::Target &i_target, // Report final size. sbe_xip_image_size( i_imageOut, io_sizeImageOut); FAPI_INF("Final SLW image size: %i", *io_sizeImageOut); - if (buf1) free(buf1); - if (buf2) free(buf2); return FAPI_RC_SUCCESS; } diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize.C b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize.C index 7187efe45..9b3a30746 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize.C @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2012 */ +/* COPYRIGHT International Business Machines Corp. 2012,2013 */ /* */ /* p1 */ /* */ @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_xip_customize.C,v 1.12 2012/12/07 18:22:32 cmolsen Exp $ +// $Id: p8_xip_customize.C,v 1.20 2013/01/04 18:50:27 cmolsen Exp $ /*------------------------------------------------------------------------------*/ /* *! TITLE : p8_xip_customize */ /* *! DESCRIPTION : Obtains repair rings from VPD and adds them to either */ @@ -30,12 +30,12 @@ /* *! EXTENDED DESCRIPTION : */ // /* *! USAGE : To build (for Hostboot) - */ -// buildfapiprcd -c "sbe_xip_image.c,pore_inline_assembler.c,p8_ring_identification.c" -C "p8_image_help.C" -e "$PROC_PATH/../../xml/error_info/p8_xip_customize_errors.xml,../../../../../../hwpf/hwp/xml/attribute_info/chip_attributes.xml,../../../../../../hwpf/hwp/xml/error_info/mvpd_errors.xml" p8_xip_customize.C +// buildfapiprcd -c "sbe_xip_image.c,pore_inline_assembler.c,p8_ring_identification.c" -C "p8_image_help.C,p8_image_help_base.C,p8_scan_compression.C" -e "$PROC_PATH/../../xml/error_info/p8_xip_customize_errors.xml,../../../../../../hwpf/hwp/xml/attribute_info/chip_attributes.xml,../../../../../../hwpf/hwp/xml/error_info/mvpd_errors.xml" p8_xip_customize.C // To build (for VBU/command-line) - assuming getMvpdRing_x86.so already exist. -// buildfapiprcd -r ver-13-0 -c "sbe_xip_image.c,pore_inline_assembler.c,p8_ring_identification.c" -C "p8_image_help.C" -e "../../xml/error_info/p8_xip_customize_errors.xml,../../../../../../hwpf/hwp/xml/attribute_info/chip_attributes.xml,../../../../../../hwpf/hwp/xml/error_info/mvpd_errors.xml" -u "XIPC_COMMAND_LINE" p8_xip_customize.C +// buildfapiprcd -r ver-13-0 -c "sbe_xip_image.c,pore_inline_assembler.c,p8_ring_identification.c" -C "p8_image_help.C,p8_image_help_base.C,p8_scan_compression.C" -e "../../xml/error_info/p8_xip_customize_errors.xml,../../../../../../hwpf/hwp/xml/attribute_info/chip_attributes.xml,../../../../../../hwpf/hwp/xml/error_info/mvpd_errors.xml" -u "XIPC_COMMAND_LINE" p8_xip_customize.C // To build (for VBU/command-line) - incorporating getMvpdRing etc into build: // (NB! Not recommended - it's a mess - the following is incoomplete) -// buildfapiprcd -r ver-13-0 -c "sbe_xip_image.c,pore_inline_assembler.c,p8_ring_identification.c" -C "p8_image_help.C,getMvpdRing.C" -e "../../xml/error_info/p8_xip_customize_errors.xml,../../../../../../hwpf/hwp/xml/error_info/mvpd_errors.xml,../../../../../../hwpf/hwp/xml/attribute_info/chip_attributes.xml,../../../../../../hwpf/hwp/xml/error_info/mvpd_errors.xml" -u "XIPC_COMMAND_LINE" p8_xip_customize.C +// buildfapiprcd -r ver-13-0 -c "sbe_xip_image.c,pore_inline_assembler.c,p8_ring_identification.c" -C "p8_image_help.C,p8_image_help_base.C,p8_scan_compression.C,getMvpdRing.C" -e "../../xml/error_info/p8_xip_customize_errors.xml,../../../../../../hwpf/hwp/xml/error_info/mvpd_errors.xml,../../../../../../hwpf/hwp/xml/attribute_info/chip_attributes.xml" -u "XIPC_COMMAND_LINE" p8_xip_customize.C // Other usages - // using "IMGBUILD_PPD_IGNORE_VPD" will ignore adding MVPD rings. // using "IMGBUILD_PPD_IGNORE_VPD_FIELD" will ignore using fapiGetMvpdField. @@ -46,11 +46,6 @@ /* *! COMMENTS : */ // /*------------------------------------------------------------------------------*/ -// The IMGBUILD_PPD_IGNORE_PLL_UPDATE macro is defined to temporarily disable -// the call usage of attributes which are not yet supported. -// @Todo: RTC 60670 will remove the macro when the attributes are supported. -#define IMGBUILD_PPD_IGNORE_PLL_UPDATE - #include <p8_pore_api_custom.h> #include <HvPlicModule.H> #include <getMvpdRing.H> @@ -87,7 +82,7 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, fapi::ReturnCode rcFapi, rc=FAPI_RC_SUCCESS; uint32_t rcLoc=0; void *imageOut; - uint32_t sizeImage, sizeImageIn, sizeImageOut, sizeImageOutMax; + uint32_t sizeImage, sizeImageIn, sizeImageOutMax; SBE_XIP_ERROR_STRINGS(errorStrings); @@ -99,8 +94,8 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, // // First, check supplied size and validation of input EPROM image. // - sbe_xip_image_size((void*)i_imageIn, &sizeImageIn); - rcLoc = sbe_xip_validate((void*)i_imageIn, sizeImageIn); + sbe_xip_image_size(i_imageIn, &sizeImageIn); + rcLoc = sbe_xip_validate(i_imageIn, sizeImageIn); if (rcLoc) { FAPI_ERR("xip_validate() failed w/rcLoc=%i",rcLoc); uint32_t & RC_LOCAL = rcLoc; @@ -111,7 +106,7 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, // Second, if IPL phase, copy input image to supplied mainstore location. // if (i_sysPhase==0) { - imageOut = (void*)i_imageOut; + imageOut = i_imageOut; memcpy( imageOut, i_imageIn, sizeImageIn); sbe_xip_image_size(imageOut, &sizeImage); rcLoc = sbe_xip_validate(imageOut, sizeImage); @@ -129,9 +124,11 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_MS_IMAGE_SIZE_MISMATCH); return rc; } + FAPI_DBG("IPL phase: Input image (w/location=0x%016llx) copied to output image and validated w/size=%i bytes and location=0x%016llx", + (uint64_t)i_imageIn, sizeImageIn, (uint64_t)imageOut); } else // Output image is same as input image in SLW case (even for an SRAM build). - imageOut = (void*)i_imageIn; + imageOut = i_imageIn; // Customization defines. // @@ -167,15 +164,16 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, sbe_xip_pore2host( imageOut, xipTocItem.iv_address, &hostCombGoodVec); FAPI_DBG("Dumping [initial] global variable content of combined_good_vectors, then the updated value:\n"); for (iVec=0; iVec<MAX_CHIPLETS; iVec++) { - FAPI_INF("combined_good_vectors[%2i]: Before=0x%16llX",iVec,*((uint64_t*)hostCombGoodVec+iVec)); + FAPI_INF("combined_good_vectors[%2i]: Before=0x%016llX",iVec,*((uint64_t*)hostCombGoodVec+iVec)); *((uint64_t*)hostCombGoodVec+iVec) = myRev64(attrCombGoodVec[iVec]); - FAPI_INF(" After=0x%16llX\n",*((uint64_t*)hostCombGoodVec+iVec)); + FAPI_INF(" After=0x%016llX\n",*((uint64_t*)hostCombGoodVec+iVec)); } #ifndef IMGBUILD_PPD_IGNORE_VPD_FIELD void *hostPibmemRepairVec, *hostNestSkewAdjVec; uint8_t *bufVpdField; uint32_t sizeVpdField=0; + uint8_t *byteField, *byteVector; // -------------------------------------------------------------------------- // CUSTOMIZE item: Update 20 swizzled bits for PIB repair vector. // Retrieval method: MVPD field. @@ -184,9 +182,8 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, if (i_sysPhase==0) { bufVpdField = (uint8_t*)i_buf1; sizeVpdField = i_sizeBuf1; // We have to use fixed and max size buffer. - FAPI_EXEC_HWP(rcFapi, fapiGetMvpdField, - MVPD_RECORD_CP00, - MVPD_KEYWORD_PB, // Use _PR temporarily. Should be _PB. + rcFapi = fapiGetMvpdField( MVPD_RECORD_CP00, + MVPD_KEYWORD_PB, i_target, bufVpdField, sizeVpdField); @@ -194,26 +191,40 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, FAPI_ERR("fapiGetMvpdField() w/keyword=PB returned error."); return rcFapi; } - rcLoc = sbe_xip_find( imageOut, PERV_PIB_REPR_VECTOR_TOC_NAME, &xipTocItem); + rcLoc = sbe_xip_find( imageOut, PROC_PIB_REPR_VECTOR_TOC_NAME, &xipTocItem); if (rcLoc) { FAPI_ERR("sbe_xip_find() failed w/rc=%i and %s", rcLoc, SBE_XIP_ERROR_STRING(errorStrings, rcLoc)); FAPI_ERR("Probable cause:"); - FAPI_ERR("\tThe keyword (=%s) was not found.",PERV_PIB_REPR_VECTOR_TOC_NAME); + FAPI_ERR("\tThe keyword (=%s) was not found.",PROC_PIB_REPR_VECTOR_TOC_NAME); uint32_t & RC_LOCAL = rcLoc; FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_KEYWORD_NOT_FOUND_ERROR); return rc; } - if (sizeVpdField!=4) { - FAPI_ERR("fapiGetMvpdField() w/keyword=PB returned sizeVpdField=%i but expected size=4.",sizeVpdField); + if (sizeVpdField!=5) { + if (sizeVpdField==4) { + FAPI_INF("fapiGetMvpdField() w/keyword=PB returned sizeVpdField=%i but we expected size=5.",sizeVpdField); + FAPI_INF("This is a temporary inconsistency. We will continue for now even though unreliable operation may ensue."); + } + else { + FAPI_ERR("fapiGetMvpdField() w/keyword=PB returned sizeVpdField=%i but we expected size=5.",sizeVpdField); uint32_t & DATA_SIZE_VPD_FIELD = sizeVpdField; FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_UNEXPECTED_FIELD_SIZE); return rc; + } } FAPI_DBG("Dumping global variable content of pibmem_repair_vector:\n"); sbe_xip_pore2host( imageOut, xipTocItem.iv_address, &hostPibmemRepairVec); - FAPI_INF("pibmem_repair_vector:Before=0x%16llX\n",*((uint64_t*)hostPibmemRepairVec)); - *(uint64_t*)hostPibmemRepairVec = myRev64(((uint64_t)(*(uint32_t*)bufVpdField))<<32); - FAPI_INF(" After=0x%16llX\n",*((uint64_t*)hostPibmemRepairVec)); + FAPI_INF("pibmem_repair_vector:Before (in BE)=0x%016llX\n",*(uint64_t*)hostPibmemRepairVec); + byteField = (uint8_t*)bufVpdField; + byteVector = (uint8_t*)hostPibmemRepairVec; + // Copy the bytes over one by one, skipping first byte (version indicator). + *(byteVector+0) = *(byteField+1); + *(byteVector+1) = *(byteField+2); + *(byteVector+2) = *(byteField+3); + if (sizeVpdField==5) // Eventually remove this if-line. + *(byteVector+3) = *(byteField+4); + FAPI_INF(" After (in BE)=0x%016llX\n",*(uint64_t*)hostPibmemRepairVec); + FAPI_INF("VPD field value (unalterd & in BE))=0x%016llX\n",*(uint64_t*)bufVpdField); } // -------------------------------------------------------------------------- @@ -224,9 +235,8 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, if (i_sysPhase==0) { bufVpdField = (uint8_t*)i_buf1; sizeVpdField = i_sizeBuf1; // We have to use fixed and max size buffer. - FAPI_EXEC_HWP(rcFapi, fapiGetMvpdField, - MVPD_RECORD_CP00, - MVPD_KEYWORD_MK, // Use _PR temporarily. Should be _MK. + rcFapi = fapiGetMvpdField( MVPD_RECORD_CP00, + MVPD_KEYWORD_MK, i_target, bufVpdField, sizeVpdField); @@ -243,49 +253,292 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_KEYWORD_NOT_FOUND_ERROR); return rc; } - if (sizeVpdField!=4) { - FAPI_ERR("fapiGetMvpdField() w/keyword=MK returned sizeVpdField=%i but expected size=4.",sizeVpdField); + if (sizeVpdField!=5) { + FAPI_ERR("fapiGetMvpdField() w/keyword=MK returned sizeVpdField=%i but expected size=5.",sizeVpdField); uint32_t & DATA_SIZE_VPD_FIELD = sizeVpdField; FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_UNEXPECTED_FIELD_SIZE); return rc; } FAPI_DBG("Dumping global variable content of nest_skewadjust_vector:\n"); sbe_xip_pore2host( imageOut, xipTocItem.iv_address, &hostNestSkewAdjVec); - FAPI_INF("nest_skewadjust_vector: Before=0x%16llX\n",*((uint64_t*)hostNestSkewAdjVec)); - *(uint64_t*)hostNestSkewAdjVec = myRev64(((uint64_t)(*(uint32_t*)bufVpdField))<<32); - FAPI_INF(" After=0x%16llX\n",*((uint64_t*)hostNestSkewAdjVec)); + FAPI_INF("nest_skewadjust_vector: Before (in BE)=0x%016llX\n",*((uint64_t*)hostNestSkewAdjVec)); + byteField = (uint8_t*)bufVpdField; + byteVector = (uint8_t*)hostNestSkewAdjVec; + // Copy the bytes over one by one, skipping first byte (version indicator). + *(byteVector+0) = *(byteField+1); + *(byteVector+1) = *(byteField+2); + *(byteVector+2) = *(byteField+3); + *(byteVector+3) = *(byteField+4); + FAPI_INF(" After (in BE)=0x%016llX\n",*(uint64_t*)hostNestSkewAdjVec); + FAPI_INF("VPD field value (unaltered & in BE) =0x%016llX\n",*(uint64_t*)bufVpdField); } #endif + +#ifndef IMGBUILD_PPD_IGNORE_PLL_UPDATE // -------------------------------------------------------------------------- - // CUSTOMIZE item: Update PLL ring (perv_bndy_pll_ring). + // CUSTOMIZE item: Update PLL ring (perv_bndy_pll_ring_alt). // Retrieval method: Attribute. // System phase: IPL sysPhase. // -------------------------------------------------------------------------- -#ifndef IMGBUILD_PPD_IGNORE_PLL_UPDATE -#define MAX_PLL_RING_SIZE 256 - uint8_t attrRingData[MAX_PLL_RING_SIZE] = { 0 }; - uint32_t attrRingDataSize=0; + if (i_sysPhase==0) { - rc = FAPI_ATTR_GET(ATTR_RING_DATA_SIZE, $i_target, attrRingDataSize); + uint32_t tmp32Const1, tmp32Const2; + uint8_t attrRingFlush[MAX_PLL_RING_SIZE]={0}; + uint8_t attrRingData[MAX_PLL_RING_SIZE]={0}; + uint8_t attrChipletId=0; + uint32_t attrScanSelect=0; + uint8_t attrDdLevel=0; + uint32_t attrRingDataSize=0; // Ring bit size + uint32_t sizeDeltaPllRingAlt=0; + uint32_t sizeRs4Launch=0; + uint8_t *bufDeltaPllRingAlt; +// uint64_t xipPllRingBlock; +// void *hostPllRingBlock; +// CompressedScanData *hostPllRingRs4; + CompressedScanData *bufPllRingAltRs4; + uint32_t sizePllRingAltRs4Max, sizePllRingAltRs4, sizePllRingAltBlockMax; + DeltaRingLayout *bufPllRingAltBlock; + uint32_t bufLC=0; + + // + // Retrieve the raw PLL rings state from attributes. + // + FAPI_INF("XIPC: PLL update: Retrieve the raw PLL ring state from attributes."); + // Get ring size. + rc = FAPI_ATTR_GET(ATTR_PROC_PERV_BNDY_PLL_LENGTH, &i_target, attrRingDataSize); // This better be in bits. + FAPI_DBG("XIPC: PLL update: PLL ring length (bits) = %i",attrRingDataSize); + FAPI_DBG("XIPC: PLL update: Size of buf1, i_sizeBuf1 (bytes) = %i",i_sizeBuf1); if (rc) { - FAPI_ERR("FAPI_ATTR_GET(ATTR_RING_DATA_SIZE) returned error.\n"); + FAPI_ERR("FAPI_ATTR_GET(ATTR_PROC_PERV_BNDY_PLL_LENGTH) returned error."); + return rc; + } + if (attrRingDataSize>MAX_PLL_RING_SIZE*8 || attrRingDataSize>i_sizeBuf1*8) { + FAPI_ERR("FAPI_ATTR_GET(ATTR_PROC_PERV_BNDY_PLL_LENGTH) returned ring size =%i bits.\n", + attrRingDataSize); + FAPI_ERR("But that exceeds either:\n"); + FAPI_ERR(" the max pll ring size =%i bits, or\n",MAX_PLL_RING_SIZE*8); + FAPI_ERR(" the size of the pre-allocated buf1 =%i bits.", i_sizeBuf1*8); + uint32_t &DATA_ATTRIBUTE_RING_SIZE=attrRingDataSize; + tmp32Const1=8*MAX_PLL_RING_SIZE; + tmp32Const2=8*(uint32_t)i_sizeBuf1; + uint32_t &DATA_MAX_PLL_RING_SIZE=tmp32Const1; + uint32_t &DATA_SIZE_OF_BUF1=tmp32Const2; + FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_PLL_RING_SIZE_TOO_LARGE); return rc; } - if (attrRingDataSize>MAX_PLL_RING_SIZE) { - FAPI_ERR("FAPI_ATTR_GET(ATTR_RING_DATA_SIZE) returned ring size=%i > max pll ring size=%i bytes.\n", - attrRingDataSize,MAX_PLL_RING_SIZE); + sizeDeltaPllRingAlt = attrRingDataSize; + // Get flush and alter (desired) ring state data. + rc = FAPI_ATTR_GET(ATTR_PROC_PERV_BNDY_PLL_FLUSH, &i_target, attrRingFlush); + if (rc) { + FAPI_ERR("FAPI_ATTR_GET(ATTR_PROC_PERV_BNDY_PLL_FLUSH) returned error."); return rc; } - rc = FAPI_ATTR_GET(ATTR_RING_DATA, &i_target, attrRingData); + rc = FAPI_ATTR_GET(ATTR_PROC_PERV_BNDY_PLL_DATA, &i_target, attrRingData); if (rc) { - FAPI_ERR("FAPI_ATTR_GET(ATTR_RING_DATA) returned error.\n"); + FAPI_ERR("FAPI_ATTR_GET(ATTR_PROC_PERV_BNDY_PLL_DATA) returned error."); return rc; } + rc = FAPI_ATTR_GET(ATTR_PROC_PERV_BNDY_PLL_CHIPLET_ID, &i_target, attrChipletId); + if (rc) { + FAPI_ERR("FAPI_ATTR_GET(ATTR_PROC_PERV_BNDY_PLL_CHIPLET_ID) returned error."); +// return rc; + FAPI_ERR("...but in all likelyhood, it's because the data isn't in Cronus yet."); + FAPI_ERR("So, hardcoding chipletId to =0xFF for now...and continuing."); + attrChipletId = 0xFF; + } + rc = FAPI_ATTR_GET(ATTR_PROC_PERV_BNDY_PLL_SCAN_SELECT, &i_target, attrScanSelect); + if (rc) { + FAPI_ERR("FAPI_ATTR_GET(ATTR_PROC_PERV_BNDY_PLL_SCAN_SELECT) returned error."); +// return rc; + FAPI_ERR("...but in all likelyhood, it's because the data isn't in Cronus yet."); + FAPI_ERR("So, hardcoding scanSelect to =0x00100008 for now...and continuing."); + attrScanSelect = 0x00100008; + } + + // + // Calculate the delta scan ring. + // + FAPI_INF("XIPC: PLL update: Calculate the delta scan ring."); + bufDeltaPllRingAlt = (uint8_t*)i_buf1; + rcLoc = calc_ring_delta_state( (uint32_t*)attrRingFlush, + (uint32_t*)attrRingData, + (uint32_t*)bufDeltaPllRingAlt, // Pre-allocated buffer. + sizeDeltaPllRingAlt ); + if (rcLoc) { + FAPI_ERR("calc_ring_delta_state() returned error w/rc=%i",rcLoc); + FAPI_ERR("Check p8_delta_scan_rw.h for meaning of IMGBUILD_xyz rc code."); + uint32_t &RC_LOCAL=rcLoc; + FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_IMGBUILD_ERROR); + return rc; + } + + // + // RS4 compress the delta scan ring. + // + FAPI_INF("XIPC: PLL update: RS4 compressing the delta scan ring."); + bufPllRingAltRs4 = (CompressedScanData*)i_buf2; + sizePllRingAltRs4Max = i_sizeBuf2; // Always supply max buffer space for ring. + rcLoc = _rs4_compress(bufPllRingAltRs4, // Contains PLL _alt RS4 ring on return. + sizePllRingAltRs4Max, // Max size of buffer. + &sizePllRingAltRs4, // Returned final size of RS4 ring + container. + bufDeltaPllRingAlt, // Input delta scan ring. + sizeDeltaPllRingAlt, // Input delta scan ring size. + (uint64_t)attrScanSelect<<32, + 0, + attrChipletId, + 0 ); + if (rcLoc) { + FAPI_ERR("_rs4_compress() failed w/rc=%i",rcLoc); + uint32_t &RC_LOCAL=rcLoc; + FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_RS4_COMPRESS_ERROR); + return rc; + } + else + if (sizePllRingAltRs4!=myRev32(bufPllRingAltRs4->iv_size)) { + FAPI_ERR("_rs4_compress() problem with size of RS4 ring (incl container)."); + FAPI_ERR("Returned size = %i", sizePllRingAltRs4); + FAPI_ERR("Size from container = %i", myRev32(bufPllRingAltRs4->iv_size)); + uint32_t &DATA_SIZE_RS4_COMPRESS_RETURN=sizePllRingAltRs4; + tmp32Const1=myRev32(bufPllRingAltRs4->iv_size); + uint32_t &DATA_SIZE_RS4_COMPRESS_CONTAINER=tmp32Const1; + FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_RS4_COMPRESS_SIZE_MESS); + return rc; + } + else + FAPI_INF("Compression Successful."); + + // + // Build the PLL _alt ring block (= ring header + RS4 launcher + RS4 ring). + // + uint64_t scanChipletAddress=0; + uint32_t asmBuffer[ASM_RS4_LAUNCH_BUF_SIZE/4]; + PoreInlineContext ctx; + + FAPI_INF("XIPC: PLL update: Building the RS4 PLL ring block."); + // Reuse i_buf1 to hold the ring block. + bufPllRingAltBlock = (DeltaRingLayout*)i_buf1; + sizePllRingAltBlockMax = i_sizeBuf1; + + // Construct RS4 launcher: + // ...get the RS4 decompress address. + rcLoc = sbe_xip_get_scalar( imageOut, "proc_sbe_decompress_scan_chiplet_address", &scanChipletAddress); + if (rcLoc) { + FAPI_ERR("sbe_xip_get_scalar() failed w/rc=%i", rcLoc); + FAPI_ERR("Probable cause: Key word =proc_sbe_decompress_scan_chiplet_address not found in image."); + uint32_t &RC_LOCAL=rcLoc; + FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_KEYWORD_NOT_FOUND_ERROR); + return rc; + } + if (scanChipletAddress==0) { + FAPI_ERR("Value of key word (=proc_sbe_decompress_scan_chiplet_address=0) not permitted."); + uint64_t &DATA_RS4_DECOMPRESS_ADDR=scanChipletAddress; + FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_ILLEGAL_RS4_DECOMPRESS_ADDR); + return rc; + } + // ... create inline asm code. + pore_inline_context_create( &ctx, asmBuffer, ASM_RS4_LAUNCH_BUF_SIZE*4, 0, 0); + rcLoc = ctx.error; + if (rcLoc) { + FAPI_ERR("pore_inline_context_create() failed w/rc=%i", rcLoc); + uint32_t &RC_LOCAL=rcLoc; + FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_PORE_INLINE_CTX_CREATE_ERROR); + return rc; + } + pore_MR(&ctx, A0, PC); + pore_ADDS(&ctx, A0, A0, ASM_RS4_LAUNCH_BUF_SIZE); + pore_LI(&ctx, D0, scanChipletAddress); + pore_BRAD(&ctx, D0); + rcLoc = ctx.error; + if (rcLoc) { + FAPI_ERR("pore_MR/ADDS/LI/BRAD() failed w/rc=%i", rcLoc); + uint32_t &RC_LOCAL=rcLoc; + FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_PORE_INLINE_RS4_LAUNCH_CREATE_ERROR); + return rc; + } + sizeRs4Launch = ctx.lc; + + // Populate ring header and put ring header, RS4 launcher and RS4 ring into + // proper spots in pre-allocated bufPllRingAltBlock buffer. + // + uint64_t entryOffsetPllRingAltBlock; + uint32_t sizeOfThisPllRingAltBlock; + entryOffsetPllRingAltBlock = calc_ring_layout_entry_offset( 0, 0); + bufPllRingAltBlock->entryOffset = myRev64(entryOffsetPllRingAltBlock); + bufPllRingAltBlock->backItemPtr = 0; // Will be updated below, as we don't know yet. + sizeOfThisPllRingAltBlock = entryOffsetPllRingAltBlock + // Must be 8-byte aligned. + sizeRs4Launch + // Must be 8-byte aligned. + sizePllRingAltRs4; // Must be 8-byte aligned. + bufPllRingAltBlock->sizeOfThis = myRev32(sizeOfThisPllRingAltBlock); + // Quick check to see if final ring block size will fit in buf1. + if (sizeOfThisPllRingAltBlock>sizePllRingAltBlockMax) { + FAPI_ERR("PLL _alt ring block size (=%i) exceeds pre-allocated buf1 size (=%i).", + sizeOfThisPllRingAltBlock, sizePllRingAltBlockMax); + uint32_t &DATA_RING_BLOCK_SIZEOFTHIS=sizeOfThisPllRingAltBlock; + uint32_t &DATA_SIZE_OF_BUF1=sizePllRingAltBlockMax; + FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_PLL_RING_BLOCK_TOO_LARGE); + return rc; + } + bufPllRingAltBlock->sizeOfMeta = 0; + rc = FAPI_ATTR_GET_PRIVILEGED(ATTR_EC, &i_target, attrDdLevel); + if (rc) { + FAPI_ERR("FAPI_ATTR_GET_PRIVILEGED() failed w/rc=%i and ddLevel=0x%02x",(uint32_t)rc,attrDdLevel); + return rc; + } + bufPllRingAltBlock->ddLevel = (uint32_t)attrDdLevel; + bufPllRingAltBlock->sysPhase = i_sysPhase; + bufPllRingAltBlock->override = 0; + bufPllRingAltBlock->reserved1 = 0; + bufPllRingAltBlock->reserved2 = 0; + bufLC = (uint32_t)entryOffsetPllRingAltBlock; + // Copy over meta data which is zero, so nothing to do in this case! + // Copy over RS4 launch code which is [already] BE and 8-byte aligned. + memcpy( (uint8_t*)bufPllRingAltBlock+bufLC, asmBuffer, (size_t)sizeRs4Launch); + // Copy over RS4 PLL _alt delta scan ring which is [already] 8-byte aligned. + bufLC = bufLC + sizeRs4Launch; + memcpy( (uint8_t*)bufPllRingAltBlock+bufLC, bufPllRingAltRs4, (size_t)sizePllRingAltRs4); + + // Now, some post-sanity checks on alignments. + if ( sizeRs4Launch!=ASM_RS4_LAUNCH_BUF_SIZE || + entryOffsetPllRingAltBlock%8 || + sizeRs4Launch%8 || + sizeOfThisPllRingAltBlock%8) { + FAPI_ERR("Member(s) of PLL _alt ring block are not 8-byte aligned:"); + FAPI_ERR(" Size of RS4 launch code = %i", sizeRs4Launch); + FAPI_ERR(" Entry offset = %i", (uint32_t)entryOffsetPllRingAltBlock); + FAPI_ERR(" Size of ring block = %i", sizeOfThisPllRingAltBlock); + uint32_t &DATA_SIZE_OF_RS4_LAUNCH=sizeRs4Launch; + tmp32Const1=(uint32_t)entryOffsetPllRingAltBlock; + uint32_t &DATA_RING_BLOCK_ENTRYOFFSET=tmp32Const1; + uint32_t &DATA_RING_BLOCK_SIZEOFTHIS=sizeOfThisPllRingAltBlock; + FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_RING_BLOCK_ALIGN_ERROR); + return rc; + } + + + // + // Append PLL _alt ring to image. + // + FAPI_INF("XIPC: PLL update: Appending RS4 PLL ring block to .rings section."); + rcLoc = write_ring_block_to_image( imageOut, + PERV_BNDY_PLL_RING_ALT_TOC_NAME, + bufPllRingAltBlock, + 0, + 0, + 0, + sizeImageOutMax ); + if (rcLoc) { + FAPI_ERR("write_ring_block_to_image() failed w/rc=%i",rcLoc); + FAPI_ERR("Check p8_delta_scan_rw.h for meaning of IMGBUILD_xyz rc code."); + uint32_t &RC_LOCAL=rcLoc; + FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_IMGBUILD_ERROR); + } + } - // Check that this is final "xor'ed" ring state, so I can proceed directly to RS4 compression. #endif + +#ifndef IMGBUILD_PPD_IGNORE_VPD // -------------------------------------------------------------------------- // CUSTOMIZE item: Add #G and #R rings. // Applies to both sysPhase modes: IPL and SLW. @@ -308,9 +561,17 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, // Notes about $R rings: // - The ex_ rings are core ID specific. Add the fwd ptr based on the core ID. // - uint8_t iVpdType; + uint8_t iVpdType; RingIdList *ring_id_list=NULL; - uint32_t ring_id_list_size; + uint32_t ring_id_list_size; + uint32_t iRing; + uint32_t sizeVpdRing=0; + uint8_t chipletId, ringId; + uint8_t *bufVpdRing; + uint32_t ddLevel=0xFFFFFFFF; + uint8_t bValidChipletId=0,bRingAlreadyAdded=0; + uint8_t chipletIdVpd; + uint32_t sizeImageOut; for (iVpdType=0; iVpdType<NUM_OF_VPD_TYPES; iVpdType++) { if (iVpdType==0) { @@ -321,14 +582,6 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, ring_id_list = (RingIdList*)RING_ID_LIST_PR; ring_id_list_size = (uint32_t)RING_ID_LIST_PR_SIZE; } -#ifndef IMGBUILD_PPD_IGNORE_VPD - uint32_t iRing; - uint32_t sizeVpdRing=0; - uint8_t chipletId, ringId; - uint8_t *bufVpdRing; - uint32_t ddLevel=0xFFFFFFFF; - uint8_t bValidChipletId=0,bRingAlreadyAdded=0; - uint8_t chipletIdVpd; for (iRing=0; iRing<ring_id_list_size; iRing++) { ringId = (ring_id_list+iRing)->ringId; @@ -336,10 +589,10 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, for ( chipletId=(ring_id_list+iRing)->chipIdMin; (chipletId>=(ring_id_list+iRing)->chipIdMin && chipletId<=(ring_id_list+iRing)->chipIdMax); chipletId++) { - FAPI_INF("(iRing,chipletId) = (%2i,0x%02x)",iRing,chipletId); + FAPI_INF("(iRing,ringId,chipletId) = (%i,0x%02X,0x%02x)",iRing,ringId,chipletId); bValidChipletId = 0; if (chipletId>=CHIPLET_ID_MIN && chipletId<=CHIPLET_ID_MAX) { - // Using known_good_vectors data to determine of a chiplet is functional. + // Using known_good_vectors data to determine if a chiplet is functional. if (attrCombGoodVec[chipletId]) bValidChipletId = 1; else @@ -378,6 +631,7 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_VPD_KEYWORD_RESOLVE_ERROR); return rc; } + rcFapi = FAPI_RC_SUCCESS; FAPI_EXEC_HWP(rcFapi, getMvpdRing, MVPD_RECORD_CP00, mvpd_keyword, @@ -386,23 +640,29 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, ringId, bufVpdRing, sizeVpdRing); - if (rcFapi!=FAPI_RC_SUCCESS && rcFapi!=RC_REPAIR_RING_NOT_FOUND) { - FAPI_ERR("getMvpdRing() returned error."); - return rcFapi; - } - chipletIdVpd = ((CompressedScanData*)bufVpdRing)->iv_chipletId; - if (chipletIdVpd!=chipletId && chipletIdVpd!=0xFF) { - FAPI_ERR("VPD ring's chipletId in scan container (=0x%02X) is not equal to 0xFF nor does it match the requested chipletId (=0x%02X).\n",chipletIdVpd,chipletId); - uint8_t & DATA_CHIPLET_ID_VPD = chipletIdVpd; - uint8_t & DATA_CHIPLET_ID_REQ = chipletId; - FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_CHIPLET_ID_MESS); - return rc; - } - //if (sizeVpdRing==0) { + FAPI_DBG("XIPC: Mvpd rings: rcFapi=0x%08x",(uint32_t)rcFapi); + FAPI_DBG("XIPC: Mvpd rings: RC_REPAIR_RING_NOT_FOUND=0x%08x",(uint32_t)RC_REPAIR_RING_NOT_FOUND); if (rcFapi==RC_REPAIR_RING_NOT_FOUND) { // No match, do nothing. Next (chipletId,ringId)-pair. + FAPI_INF("XIPC: Mvpd rings: (iRing,ringId,chipletId)=(%i,0x%02X,0x%02X) not found.",iRing,ringId,chipletId); } else { + // Couple of other checks... + // 1. General rc error check. + if (rcFapi!=FAPI_RC_SUCCESS) { + FAPI_ERR("getMvpdRing() returned error."); + return rcFapi; + } + // 2. Checking that chipletId didn't somehow get messed up. + chipletIdVpd = ((CompressedScanData*)bufVpdRing)->iv_chipletId; + if (chipletIdVpd!=chipletId && chipletIdVpd!=0xFF) { + FAPI_ERR("VPD ring's chipletId in scan container (=0x%02X) is not equal to 0xFF nor does it match the requested chipletId (=0x%02X).\n",chipletIdVpd,chipletId); + uint8_t & DATA_CHIPLET_ID_VPD = chipletIdVpd; + uint8_t & DATA_CHIPLET_ID_REQ = chipletId; + FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_CHIPLET_ID_MESS); + return rc; + } + // 3. Checking for buffer overflow. if (sizeVpdRing>i_sizeBuf1) { // Supplied buffer from HB/PHYP is too small. Error out. Is this right // decision or should we ignore and proceed to next ring. @@ -430,32 +690,42 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, // Add VPD ring to image. if (!bRingAlreadyAdded) { sizeImageOut = sizeImageOutMax; + rcLoc = 0; if (i_sysPhase==0) { // Add VPD ring to --->>> IPL <<<--- image rcLoc = write_vpd_ring_to_ipl_image( imageOut, sizeImageOut, - (CompressedScanData*)bufVpdRing, //i_buf1 + (CompressedScanData*)bufVpdRing, //HB buf1 ddLevel, i_sysPhase, (char*)((ring_id_list+iRing)->ringNameImg), - (void*)i_buf2, + (void*)i_buf2, //HB buf2 i_sizeBuf2); - //CMO: How do we return a more informative rc, say one that indicates - // successful img build but no rings found? } else { // Add VPD ring to --->>> SLW <<<--- image - rcLoc = write_vpd_ring_to_ipl_image( + rcLoc = write_vpd_ring_to_slw_image( imageOut, sizeImageOut, - (CompressedScanData*)bufVpdRing, //i_buf1 + (CompressedScanData*)bufVpdRing, //HB buf1 ddLevel, i_sysPhase, (char*)(ring_id_list+iRing)->ringNameImg, - (void*)i_buf2, + (void*)i_buf2, //HB buf2 i_sizeBuf2); } + if (rcLoc) { + if (i_sysPhase==0) { + FAPI_ERR("write_vpd_ring_to_ipl_image() failed w/rc=%i",rcLoc); + } + else { + FAPI_ERR("write_vpd_ring_to_slw_image() failed w/rc=%i",rcLoc); + } + uint32_t & RC_LOCAL = rcLoc; + FAPI_SET_HWP_ERROR(rc, RC_PROC_XIPC_WRITE_VPD_RING_TO_IMAGE_ERROR); + return rc; + } if (chipletIdVpd==0xFF) bRingAlreadyAdded = 1; } @@ -464,11 +734,11 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target, } } } -#endif } +#endif i_imageOut = imageOut; - io_sizeImageOut = sizeImageOut; + rcLoc = sbe_xip_image_size( imageOut, &io_sizeImageOut); return FAPI_RC_SUCCESS; diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize_errors.xml index 6db8a9925..eaf1329d7 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize_errors.xml +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize_errors.xml @@ -5,7 +5,7 @@ <!-- --> <!-- IBM CONFIDENTIAL --> <!-- --> -<!-- COPYRIGHT International Business Machines Corp. 2012 --> +<!-- COPYRIGHT International Business Machines Corp. 2012,2013 --> <!-- --> <!-- p1 --> <!-- --> @@ -69,6 +69,20 @@ </hwpError> <!-- *********************************************************************** --> <hwpError> + <rc>RC_PROC_XIPC_PLL_RING_SIZE_TOO_LARGE</rc> + <description>PLL ring size returned from attribute is too large.</description> + <ffdc>DATA_ATTRIBUTE_RING_SIZE</ffdc> + <ffdc>DATA_MAX_PLL_RING_SIZE</ffdc> + <ffdc>DATA_SIZE_OF_BUF1</ffdc> +</hwpError> +<!-- *********************************************************************** --> +<hwpError> + <rc>RC_PROC_XIPC_IMGBUILD_ERROR</rc> + <description>Local IMGBUILD_xyz error from non-FAPI routine. Check rc code in p8_delta_scan_rw.h.</description> + <ffdc>RC_LOCAL</ffdc> +</hwpError> +<!-- *********************************************************************** --> +<hwpError> <rc>RC_PROC_XIPC_XIP_FIND_ERROR</rc> <description>sbe_xip_find() failed w/local rc.</description> <ffdc>RC_LOCAL</ffdc> @@ -84,7 +98,40 @@ <rc>RC_PROC_XIPC_RS4_COMPRESS_SIZE_MESS</rc> <description>Problem with RS4 ring sizes from _rs4_compress().</description> <ffdc>DATA_SIZE_RS4_COMPRESS_RETURN</ffdc> - <ffdc>DATA_SIZE_RS4_COMPRESS_CONTAINERN</ffdc> + <ffdc>DATA_SIZE_RS4_COMPRESS_CONTAINER</ffdc> +</hwpError> +<!-- *********************************************************************** --> +<hwpError> + <rc>RC_PROC_XIPC_ILLEGAL_RS4_DECOMPRESS_ADDR</rc> + <description>RS4 decompress address has illegal value.</description> + <ffdc>DATA_RS4_DECOMPRESS_ADDR</ffdc> +</hwpError> +<!-- *********************************************************************** --> +<hwpError> + <rc>RC_PROC_XIPC_PORE_INLINE_CTX_CREATE_ERROR</rc> + <description>pore_inline_context_create failed w/local rc.</description> + <ffdc>RC_LOCAL</ffdc> +</hwpError> +<!-- *********************************************************************** --> +<hwpError> + <rc>RC_PROC_XIPC_PORE_INLINE_RS4_LAUNCH_CREATE_ERROR</rc> + <description>pore_MR/ADDS/LI/BRAD failed w/local rc.</description> + <ffdc>RC_LOCAL</ffdc> +</hwpError> +<!-- *********************************************************************** --> +<hwpError> + <rc>RC_PROC_XIPC_PLL_RING_BLOCK_TOO_LARGE</rc> + <description>PLL ring block is too large.</description> + <ffdc>DATA_RING_BLOCK_SIZEOFTHIS</ffdc> + <ffdc>DATA_SIZE_OF_BUF1</ffdc> +</hwpError> +<!-- *********************************************************************** --> +<hwpError> + <rc>RC_PROC_XIPC_RING_BLOCK_ALIGN_ERROR</rc> + <description>Problem with RS4 PLL ring block alignment.</description> + <ffdc>DATA_SIZE_OF_RS4_LAUNCH</ffdc> + <ffdc>DATA_RING_BLOCK_ENTRYOFFSET</ffdc> + <ffdc>DATA_RING_BLOCK_SIZEOFTHIS</ffdc> </hwpError> <!-- *********************************************************************** --> <hwpError> @@ -127,6 +174,12 @@ </hwpError> <!-- *********************************************************************** --> <hwpError> + <rc>RC_PROC_XIPC_WRITE_VPD_RING_TO_IMAGE_ERROR</rc> + <description>Error occured during write_vpd_ring_to_{ipl,slw}_image()</description> + <ffdc>RC_LOCAL</ffdc> +</hwpError> +<!-- *********************************************************************** --> +<hwpError> <rc>RC_PROC_XIPC_UNKNOWN_ERROR</rc> <description>Unknown error. (Shouldn't be in this code section.)</description> <ffdc>RC_LOCAL</ffdc> diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/proc_pll_ring_attributes.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/proc_pll_ring_attributes.xml new file mode 100644 index 000000000..90694d04e --- /dev/null +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/proc_pll_ring_attributes.xml @@ -0,0 +1,299 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/proc_pll_ring_attributes.xml $ --> +<!-- --> +<!-- IBM CONFIDENTIAL --> +<!-- --> +<!-- COPYRIGHT International Business Machines Corp. 2013 --> +<!-- --> +<!-- p1 --> +<!-- --> +<!-- Object Code Only (OCO) source materials --> +<!-- Licensed Internal Code Source Materials --> +<!-- IBM HostBoot Licensed Internal Code --> +<!-- --> +<!-- The source code for this program is not published or otherwise --> +<!-- divested of its trade secrets, irrespective of what has been --> +<!-- deposited with the U.S. Copyright Office. --> +<!-- --> +<!-- Origin: 30 --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- proc_pll_ring_attributes.xml --> +<attributes> + <attribute> + <id>ATTR_PROC_PERV_BNDY_PLL_DATA</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Ring image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll + creator: platform + firmware notes: + </description> + <valueType>uint8</valueType> + <array>128</array> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PB_BNDY_DMIPLL_DATA</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Ring image for pb_bndy_dmipll ring + creator: platform + firmware notes: + </description> + <valueType>uint8</valueType> + <array>192</array> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PB_BNDY_DMIPLL_FOR_DCCAL_DATA</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Ring image for pb_bndy_dmipll ring for DC cal + creator: platform + firmware notes: + </description> + <valueType>uint8</valueType> + <array>192</array> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_AB_BNDY_PLL_DATA</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Ring image for ab_bndy_pll ring + creator: platform + firmware notes: + </description> + <valueType>uint8</valueType> + <array>80</array> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_AB_BNDY_PLL_FOR_DCCAL_DATA</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Ring image for ab_bndy_pll ring + creator: platform + firmware notes: + </description> + <valueType>uint8</valueType> + <array>80</array> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PCI_BNDY_PLL_DATA</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Ring image for pci_bndy_pll ring + creator: platform + firmware notes: + </description> + <valueType>uint8</valueType> + <array>80</array> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PERV_BNDY_PLL_LENGTH</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Length of data in ring image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll + creator: platform + firmware notes: + </description> + <valueType>uint32</valueType> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PB_BNDY_DMIPLL_LENGTH</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Length of data in ring image for pb_bndy_dmipll ring + creator: platform + firmware notes: + </description> + <valueType>uint32</valueType> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_AB_BNDY_PLL_LENGTH</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Length of data in ring image for ab_bndy_pll ring + creator: platform + firmware notes: + </description> + <valueType>uint32</valueType> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PCI_BNDY_PLL_LENGTH</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Length of data in ring image for pci_bndy_pll ring + creator: platform + firmware notes: + </description> + <valueType>uint32</valueType> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PERV_BNDY_PLL_FLUSH</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Ring flush image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll + creator: platform + firmware notes: + </description> + <valueType>uint8</valueType> + <array>128</array> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PB_BNDY_DMIPLL_FLUSH</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Ring flush image for pb_bndy_dmipll ring + creator: platform + firmware notes: + </description> + <valueType>uint8</valueType> + <array>192</array> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_AB_BNDY_PLL_FLUSH</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Ring flush image for ab_bndy_pll ring + creator: platform + firmware notes: + </description> + <valueType>uint8</valueType> + <array>80</array> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PCI_BNDY_PLL_FLUSH</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Ring flush image for pci_bndy_pll ring + creator: platform + firmware notes: + </description> + <valueType>uint8</valueType> + <array>80</array> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PERV_BNDY_PLL_CHIPLET_ID</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Chiplet ID for ring image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll + creator: platform + firmware notes: + </description> + <valueType>uint8</valueType> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PB_BNDY_DMIPLL_CHIPLET_ID</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Chiplet ID for ring image for pb_bndy_dmipll ring + creator: platform + firmware notes: + </description> + <valueType>uint8</valueType> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_AB_BNDY_PLL_CHIPLET_ID</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Chiplet ID for ring image for ab_bndy_pll ring + creator: platform + firmware notes: + </description> + <valueType>uint8</valueType> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PCI_BNDY_PLL_CHIPLET_ID</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Chiplet ID for ring image for pci_bndy_pll ring + creator: platform + firmware notes: + </description> + <valueType>uint8</valueType> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PERV_BNDY_PLL_SCAN_SELECT</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Scan select for ring image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll + creator: platform + firmware notes: + </description> + <valueType>uint32</valueType> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PB_BNDY_DMIPLL_SCAN_SELECT</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Scan select for ring image for pb_bndy_dmipll ring + creator: platform + firmware notes: + </description> + <valueType>uint32</valueType> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_AB_BNDY_PLL_SCAN_SELECT</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Scan select for ring image for ab_bndy_pll ring + creator: platform + firmware notes: + </description> + <valueType>uint32</valueType> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PCI_BNDY_PLL_SCAN_SELECT</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Scan select for ring image for pci_bndy_pll ring + creator: platform + firmware notes: + </description> + <valueType>uint32</valueType> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> +</attributes> diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile index 48cb151de..761536784 100644 --- a/src/usr/hwpf/makefile +++ b/src/usr/hwpf/makefile @@ -5,7 +5,7 @@ # # IBM CONFIDENTIAL # -# COPYRIGHT International Business Machines Corp. 2011,2012 +# COPYRIGHT International Business Machines Corp. 2011,2013 # # p1 # @@ -99,6 +99,7 @@ HWP_ATTR_XML_FILES = hwp/memory_attributes.xml \ hwp/runtime_attributes/pm_attributes_all_hwp.xml \ hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_attributes.xml \ hwp/dmi_training/proc_cen_set_inband_addr/proc_cen_set_inband_addr_attributes.xml \ + hwp/build_winkle_images/p8_slw_build/proc_pll_ring_attributes.xml \ hwp/build_winkle_images/p8_slw_build/p8_xip_customize_attributes.xml #------------------------------------------------------------------------------ diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index b6cde6c47..2a473d2c7 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -9302,4 +9302,446 @@ Measured in GB</description> </hwpfToHbAttrMap> </attribute> +<attribute> + <id>PROC_PERV_BNDY_PLL_DATA</id> + <description>Ring image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll + creator: platform + firmware notes: + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>128</array> + </simpleType> + <persistency>volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_PERV_BNDY_PLL_DATA</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_PB_BNDY_DMIPLL_DATA</id> + <description>Ring image for pb_bndy_dmipll ring + creator: platform + firmware notes: + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>192</array> + </simpleType> + <persistency>volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_PB_BNDY_DMIPLL_DATA</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_PB_BNDY_DMIPLL_FOR_DCCAL_DATA</id> + <description>Ring image for pb_bndy_dmipll ring for DC cal + creator: platform + firmware notes: + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>192</array> + </simpleType> + <persistency>volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_PB_BNDY_DMIPLL_FOR_DCCAL_DATA</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_AB_BNDY_PLL_DATA</id> + <description>Ring image for ab_bndy_pll ring + creator: platform + firmware notes: + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>80</array> + </simpleType> + <persistency>volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_AB_BNDY_PLL_DATA</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_AB_BNDY_PLL_FOR_DCCAL_DATA</id> + <description>Ring image for ab_bndy_pll ring + creator: platform + firmware notes: + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>80</array> + </simpleType> + <persistency>volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_AB_BNDY_PLL_FOR_DCCAL_DATA</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_PCI_BNDY_PLL_DATA</id> + <description>Ring image for pci_bndy_pll ring + creator: platform + firmware notes: + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>80</array> + </simpleType> + <persistency>volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_PCI_BNDY_PLL_DATA</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_PERV_BNDY_PLL_LENGTH</id> + <description>Length of data in ring image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll + creator: platform + firmware notes: + </description> + <simpleType> + <uint32_t> + <default>128</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_PERV_BNDY_PLL_LENGTH</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_PB_BNDY_DMIPLL_LENGTH</id> + <description>Length of data in ring image for pb_bndy_dmipll ring + creator: platform + firmware notes: + </description> + <simpleType> + <uint32_t> + <default>192</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_PB_BNDY_DMIPLL_LENGTH</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_AB_BNDY_PLL_LENGTH</id> + <description>Length of data in ring image for ab_bndy_pll ring + creator: platform + firmware notes: + </description> + <simpleType> + <uint32_t> + <default>80</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_AB_BNDY_PLL_LENGTH</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_PCI_BNDY_PLL_LENGTH</id> + <description>Length of data in ring image for pci_bndy_pll ring + creator: platform + firmware notes: + </description> + <simpleType> + <uint32_t> + <default>80</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_PCI_BNDY_PLL_LENGTH</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_PERV_BNDY_PLL_FLUSH</id> + <description>Ring flush image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll + creator: platform + firmware notes: + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>128</array> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_PERV_BNDY_PLL_FLUSH</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_PB_BNDY_DMIPLL_FLUSH</id> + <description>Ring flush image for pb_bndy_dmipll ring + creator: platform + firmware notes: + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>192</array> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_PB_BNDY_DMIPLL_FLUSH</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_AB_BNDY_PLL_FLUSH</id> + <description>Ring flush image for ab_bndy_pll ring + creator: platform + firmware notes: + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>80</array> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_AB_BNDY_PLL_FLUSH</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_PCI_BNDY_PLL_FLUSH</id> + <description>Ring flush image for pci_bndy_pll ring + creator: platform + firmware notes: + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>80</array> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_PCI_BNDY_PLL_FLUSH</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_PERV_BNDY_PLL_CHIPLET_ID</id> + <description>Chiplet ID for ring image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll + creator: platform + firmware notes: + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_PERV_BNDY_PLL_CHIPLET_ID</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_PB_BNDY_DMIPLL_CHIPLET_ID</id> + <description>Chiplet ID for ring image for pb_bndy_dmipll ring + creator: platform + firmware notes: + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_PB_BNDY_DMIPLL_CHIPLET_ID</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_AB_BNDY_PLL_CHIPLET_ID</id> + <description>Chiplet ID for ring image for ab_bndy_pll ring + creator: platform + firmware notes: + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_AB_BNDY_PLL_CHIPLET_ID</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_PCI_BNDY_PLL_CHIPLET_ID</id> + <description>Chiplet ID for ring image for pci_bndy_pll ring + creator: platform + firmware notes: + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_PCI_BNDY_PLL_CHIPLET_ID</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_PERV_BNDY_PLL_SCAN_SELECT</id> + <description>Scan select for ring image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll + creator: platform + firmware notes: + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_PERV_BNDY_PLL_SCAN_SELECT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_PB_BNDY_DMIPLL_SCAN_SELECT</id> + <description>Scan select for ring image for pb_bndy_dmipll ring + creator: platform + firmware notes: + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_PB_BNDY_DMIPLL_SCAN_SELECT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_AB_BNDY_PLL_SCAN_SELECT</id> + <description>Scan select for ring image for ab_bndy_pll ring + creator: platform + firmware notes: + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_AB_BNDY_PLL_SCAN_SELECT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>PROC_PCI_BNDY_PLL_SCAN_SELECT</id> + <description>Scan select for ring image for pci_bndy_pll ring + creator: platform + firmware notes: + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_PROC_PCI_BNDY_PLL_SCAN_SELECT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + </attributes> diff --git a/src/usr/targeting/common/xmltohb/common.mk b/src/usr/targeting/common/xmltohb/common.mk index 3530be71a..eb0aca203 100644 --- a/src/usr/targeting/common/xmltohb/common.mk +++ b/src/usr/targeting/common/xmltohb/common.mk @@ -1,25 +1,25 @@ # IBM_PROLOG_BEGIN_TAG # This is an automatically generated prolog. -# +# # $Source: src/usr/targeting/common/xmltohb/common.mk $ -# +# # IBM CONFIDENTIAL -# -# COPYRIGHT International Business Machines Corp. 2011,2012 -# +# +# COPYRIGHT International Business Machines Corp. 2011,2013 +# # p1 -# +# # Object Code Only (OCO) source materials # Licensed Internal Code Source Materials # IBM HostBoot Licensed Internal Code -# +# # The source code for this program is not published or otherwise # divested of its trade secrets, irrespective of what has been # deposited with the U.S. Copyright Office. -# +# # Origin: 30 -# -# IBM_PROLOG_END_TAG +# +# IBM_PROLOG_END_TAG ################################################################################ # # @file targeting/common/xmltohb/common.mk @@ -75,6 +75,7 @@ FAPI_ATTR_SOURCES = \ nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_attributes.xml \ dmi_training/proc_cen_set_inband_addr/proc_cen_set_inband_addr_attributes.xml \ common_attributes.xml \ + build_winkle_images/p8_slw_build/proc_pll_ring_attributes.xml \ build_winkle_images/p8_slw_build/p8_xip_customize_attributes.xml diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index a3754bc49..37706903a 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -5,7 +5,7 @@ <!-- --> <!-- IBM CONFIDENTIAL --> <!-- --> -<!-- COPYRIGHT International Business Machines Corp. 2011,2012 --> +<!-- COPYRIGHT International Business Machines Corp. 2011,2013 --> <!-- --> <!-- p1 --> <!-- --> @@ -378,6 +378,30 @@ <attribute><id>PROC_PSI_UNTRUSTED_BAR0_SIZE</id></attribute> <attribute><id>PROC_PSI_UNTRUSTED_BAR1_BASE_ADDR</id></attribute> <attribute><id>PROC_PSI_UNTRUSTED_BAR1_SIZE</id></attribute> + <!-- PROC_PLL_RING attributes --> + <attribute><id>PROC_PERV_BNDY_PLL_DATA</id></attribute> + <attribute><id>PROC_PB_BNDY_DMIPLL_DATA</id></attribute> + <attribute><id>PROC_PB_BNDY_DMIPLL_FOR_DCCAL_DATA</id></attribute> + <attribute><id>PROC_AB_BNDY_PLL_DATA</id></attribute> + <attribute><id>PROC_AB_BNDY_PLL_FOR_DCCAL_DATA</id></attribute> + <attribute><id>PROC_PCI_BNDY_PLL_DATA</id></attribute> + <attribute><id>PROC_PERV_BNDY_PLL_LENGTH</id></attribute> + <attribute><id>PROC_PB_BNDY_DMIPLL_LENGTH</id></attribute> + <attribute><id>PROC_AB_BNDY_PLL_LENGTH</id></attribute> + <attribute><id>PROC_PCI_BNDY_PLL_LENGTH</id></attribute> + <attribute><id>PROC_PERV_BNDY_PLL_FLUSH</id></attribute> + <attribute><id>PROC_PB_BNDY_DMIPLL_FLUSH</id></attribute> + <attribute><id>PROC_AB_BNDY_PLL_FLUSH</id></attribute> + <attribute><id>PROC_PCI_BNDY_PLL_FLUSH</id></attribute> + <attribute><id>PROC_PERV_BNDY_PLL_CHIPLET_ID</id></attribute> + <attribute><id>PROC_PB_BNDY_DMIPLL_CHIPLET_ID</id></attribute> + <attribute><id>PROC_AB_BNDY_PLL_CHIPLET_ID</id></attribute> + <attribute><id>PROC_PCI_BNDY_PLL_CHIPLET_ID</id></attribute> + <attribute><id>PROC_PERV_BNDY_PLL_SCAN_SELECT</id></attribute> + <attribute><id>PROC_PB_BNDY_DMIPLL_SCAN_SELECT</id></attribute> + <attribute><id>PROC_AB_BNDY_PLL_SCAN_SELECT</id></attribute> + <attribute><id>PROC_PCI_BNDY_PLL_SCAN_SELECT</id></attribute> + </targetType> <targetType> |
