Move pcie power off prior to starting PCIe clocks

This commit moves pcie power off prior to starting PCIe clocks.
It also created i2cResetMaster() function to be called before
SBE Update in istep 9.

Change-Id: I330a5cabf1e778c1354aa3d93d4dedfded7bf013
CQ: SW276751
Backport: release-fips820
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13235
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

13 files changed, 318 insertions, 108 deletions

diff --git a/src/include/usr/i2c/i2cif.H b/src/include/usr/i2c/i2cif.H
index 422d024cd..ac28686b8 100644
--- a/src/include/usr/i2c/i2cif.H
+++ b/src/include/usr/i2c/i2cif.H
@@ -5,7 +5,9 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012,2014              */
+/* Contributors Listed Below - COPYRIGHT 2012,2014                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
 /*                                                                        */
 /* Licensed under the Apache License, Version 2.0 (the "License");        */
 /* you may not use this file except in compliance with the License.       */
@@ -37,6 +39,31 @@ namespace I2C
  */
 errlHndl_t i2cSetupMasters ( void );
 
+
+/**
+* @enum i2cResetType
+*
+* @brief I2C Reset Type specifies what is reset when i2cResetMasters() is called
+*        @todo RTC 115832 - additional enums will be added
+*
+*/
+enum i2cResetType
+{
+    I2C_RESET_INVALID                   = 0x00,
+    I2C_RESET_PROC_HOST                 = 0x01, // Only Host (not FSI)
+};
+
+/**
+ * @brief This function will handle everything required to reset various
+ *        I2C master engines.
+ *
+ * @param[in] i_resetType - Specfies which I2C master engines to reset
+ *
+ * @return errlHndl_t - Null if successful, otherwise a pointer to
+ *      the error log.
+ */
+errlHndl_t i2cResetMasters ( i2cResetType i_resetType );
+
 };  // end namespace I2C
 
 #endif  // end __I2CIF_H
diff --git a/src/include/usr/isteps/istep07list.H b/src/include/usr/isteps/istep07list.H
index 193d8ade3..d230bd25e 100644
--- a/src/include/usr/isteps/istep07list.H
+++ b/src/include/usr/isteps/istep07list.H
@@ -5,7 +5,9 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012,2014              */
+/* Contributors Listed Below - COPYRIGHT 2012,2014                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
 /*                                                                        */
 /* Licensed under the Apache License, Version 2.0 (the "License");        */
 /* you may not use this file except in compliance with the License.       */
diff --git a/src/include/usr/isteps/istep16list.H b/src/include/usr/isteps/istep16list.H
index ca3e257f1..1dc968c18 100644
--- a/src/include/usr/isteps/istep16list.H
+++ b/src/include/usr/isteps/istep16list.H
@@ -90,7 +90,7 @@ const DepModInfo g_istep16Dependancies = {
     {
         DEP_LIB(libcore_activate.so),
         DEP_LIB(libbuild_winkle_images.so),
-        DEP_LIB(libactivate_powerbus.so),
+        DEP_LIB(libnest_chiplets.so),
         NULL
     }
 };
diff --git a/src/usr/hwpf/hwp/activate_powerbus/activate_powerbus.C b/src/usr/hwpf/hwp/activate_powerbus/activate_powerbus.C
index 90752042d..1bcd6c6cd 100644
--- a/src/usr/hwpf/hwp/activate_powerbus/activate_powerbus.C
+++ b/src/usr/hwpf/hwp/activate_powerbus/activate_powerbus.C
@@ -49,6 +49,7 @@
 
 #include    <sbe/sbeif.H>
 #include    <pnor/pnorif.H>
+#include    <i2c/i2cif.H>
 
 //  targeting support
 #include    <targeting/common/commontargeting.H>
@@ -64,7 +65,6 @@
 #include    "proc_build_smp/proc_build_smp.H"
 #include    <intr/interrupt.H>
 #include    <fsi/fsiif.H>
-#include    "proc_pcie_slot_power.H"
 
 namespace   ACTIVATE_POWERBUS
 {
@@ -346,6 +346,16 @@ void * call_host_slave_sbe_update( void * io_pArgs )
     do
     {
 
+        // Reset I2C devices before trying to access the SBE SEEPROMs
+        // Any error returned should not fail istep
+        l_errl = I2C::i2cResetMasters( I2C::I2C_RESET_PROC_HOST );
+        if (l_errl)
+        {
+            // Commit error
+            errlCommit( l_errl, HWPF_COMP_ID );
+            break;
+        }
+
         // Call to check state of Processor SBE SEEPROMs and
         // make any necessary updates
         l_errl = SBE::updateProcessorSbeSeeproms();
@@ -368,65 +378,7 @@ void * call_host_slave_sbe_update( void * io_pArgs )
             errlCommit( l_errl, HWPF_COMP_ID );
             break;
         }
-
-
-#ifdef CONFIG_PCIE_HOTPLUG_CONTROLLER
-    //  Loop through all the procs in the system
-    //  and run proc_pcie_slot_power to
-    //  power off hot plug controller to avoid downstream MEX issues
-
-    TARGETING::Target* l_pMasterProcTarget = NULL;
-    TARGETING::targetService().
-                       masterProcChipTargetHandle(l_pMasterProcTarget);
-    TARGETING::TargetHandleList l_procTargetList;
-    getAllChips(l_procTargetList, TYPE_PROC);
-
-    for (TargetHandleList::const_iterator
-            l_proc_iter = l_procTargetList.begin();
-            l_proc_iter != l_procTargetList.end();
-            ++l_proc_iter)
-    {
-        //  make a local copy of the Processor target
-        TARGETING::Target* l_pProcTarget = *l_proc_iter;
-
-        TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
-                    "target HUID %.8X",
-                    TARGETING::get_huid(l_pProcTarget));
-
-        fapi::Target l_fapiProcTarget( fapi::TARGET_TYPE_PROC_CHIP,
-                                       l_pProcTarget    );
-
-        // Invoke the HWP
-        FAPI_INVOKE_HWP(l_errl,
-                        proc_pcie_slot_power,
-                        l_fapiProcTarget,
-                        false  );  // turn off
-        if (l_errl)
-        {
-            TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
-                  "ERROR : proc_pcie_hotplug_control",
-                  " failed, returning errorlog" );
-
-            // capture the target data in the elog
-            ErrlUserDetailsTarget(l_pProcTarget).addToLog( l_errl );
-
-            // informational. Don't add to istep error or return error
-            l_errl->setSev(ERRORLOG::ERRL_SEV_INFORMATIONAL);
-
-            // Commit error log
-            errlCommit( l_errl, HWPF_COMP_ID );
-        }
-        else
-        {
-            TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
-              "SUCCESS : proc_pcie_hotplug_control",
-              " completed ok");
-        }
-    }   // endfor
-#endif
-
-
-    } while (0);
+   } while (0);
 
     TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                "call_host_slave_sbe_update exit" );
diff --git a/src/usr/hwpf/hwp/activate_powerbus/makefile b/src/usr/hwpf/hwp/activate_powerbus/makefile
index b5583abd6..0db637a6f 100644
--- a/src/usr/hwpf/hwp/activate_powerbus/makefile
+++ b/src/usr/hwpf/hwp/activate_powerbus/makefile
@@ -48,7 +48,6 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/activate_powerbus
 ##  EXAMPLE:
 ##  EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/activate_powerbus/<HWP_dir>
 EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp
-EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/activate_powerbus/proc_pcie_slot_power
 
 ##  NOTE: add new object files when you add a new HWP
 OBJS += activate_powerbus.o
@@ -59,13 +58,11 @@ OBJS += proc_build_smp_fbc_ab.o
 OBJS += proc_build_smp_fbc_cd.o
 OBJS += proc_build_smp_fbc_nohp.o
 OBJS += proc_adu_utils.o
-OBJS += proc_pcie_slot_power.o
 
 ##  NOTE: add a new directory onto the vpaths when you add a new HWP
 ##  EXAMPLE:
 #   VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/activate_powerbus/<HWP_dir>
 VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp
-VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/activate_powerbus/proc_pcie_slot_power
 
 include ${ROOTPATH}/config.mk
 
diff --git a/src/usr/hwpf/hwp/core_activate/makefile b/src/usr/hwpf/hwp/core_activate/makefile
index 2a545e7ce..40ce20f6f 100644
--- a/src/usr/hwpf/hwp/core_activate/makefile
+++ b/src/usr/hwpf/hwp/core_activate/makefile
@@ -53,7 +53,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar
 EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/core_activate/switch_rec_attn
 EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/core_activate/proc_check_slw_done
 EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr
-EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/activate_powerbus/proc_pcie_slot_power
+EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_slot_power
 EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp/utility_procedures
 
 
diff --git a/src/usr/hwpf/hwp/nest_chiplets/makefile b/src/usr/hwpf/hwp/nest_chiplets/makefile
index 66dd26885..bda3544d3 100644
--- a/src/usr/hwpf/hwp/nest_chiplets/makefile
+++ b/src/usr/hwpf/hwp/nest_chiplets/makefile
@@ -5,7 +5,9 @@
 #
 # OpenPOWER HostBoot Project
 #
-# COPYRIGHT International Business Machines Corp. 2012,2014
+# Contributors Listed Below - COPYRIGHT 2012,2014
+# [+] International Business Machines Corp.
+#
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
 # you may not use this file except in compliance with the License.
@@ -42,6 +44,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/nest_chiplets/proc_scomoverride_chip
 EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup
 EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit
 EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/slave_sbe/proc_cen_ref_clk_enable
+EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_slot_power
 
 ##  NOTE: add new object files when you add a new HWP
 OBJS += nest_chiplets.o
@@ -54,6 +57,8 @@ OBJS += proc_pcie_scominit.o
 OBJS += proc_abus_scominit.o
 OBJS += proc_xbus_scominit.o
 OBJS += proc_a_x_pci_dmi_pll_utils.o
+OBJS += proc_pcie_slot_power.o
+
         
 ##  NOTE: add a new directory onto the vpaths when you add a new HWP
 VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/nest_chiplets/proc_start_clocks_chiplets
@@ -61,6 +66,7 @@ VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/nest_chiplets/proc_chiplet_scominit
 VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/nest_chiplets/proc_scomoverride_chiplets
 VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup
 VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_scominit
+VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_slot_power
 
 include ${ROOTPATH}/config.mk
 
diff --git a/src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C b/src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C
index 6d1d05271..bd6dc5775 100644
--- a/src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C
+++ b/src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C
@@ -5,7 +5,9 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012,2014              */
+/* Contributors Listed Below - COPYRIGHT 2012,2014                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
 /*                                                                        */
 /* Licensed under the Apache License, Version 2.0 (the "License");        */
 /* you may not use this file except in compliance with the License.       */
@@ -73,6 +75,8 @@
 #include    "proc_pcie_scominit/proc_pcie_scominit.H"
 #include    "../bus_training/pbusLinkSvc.H"
 #include    <fapiHwpExecInitFile.H>
+#include    "proc_pcie_slot_power.H"
+
 const char * const PROC_CHIPLET_ABUS_IF = "p8.abus.scom.if";
 const char * const PROC_CHIPLET_XBUS_IF = "p8.xbus.scom.if";
 
@@ -290,6 +294,58 @@ void*    call_proc_a_x_pci_dmi_pll_setup( void    *io_pArgs )
         }
     }
 
+
+#ifdef CONFIG_PCIE_HOTPLUG_CONTROLLER
+    //  Loop through all the procs in the system
+    //  and run proc_pcie_slot_power to
+    //  power off hot plug controller to avoid downstream MEX issues
+
+
+    for (TargetHandleList::const_iterator
+            l_proc_iter = l_procTargetList.begin();
+            l_proc_iter != l_procTargetList.end();
+            ++l_proc_iter)
+    {
+        //  make a local copy of the Processor target
+        TARGETING::Target* l_pProcTarget = *l_proc_iter;
+
+        TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                    "target HUID %.8X",
+                    TARGETING::get_huid(l_pProcTarget));
+
+        fapi::Target l_fapiProcTarget( fapi::TARGET_TYPE_PROC_CHIP,
+                                       l_pProcTarget    );
+
+        // Invoke the HWP
+        FAPI_INVOKE_HWP(l_err,
+                        proc_pcie_slot_power,
+                        l_fapiProcTarget,
+                        false  );  // turn off
+        if (l_err)
+        {
+            TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                  "ERROR : proc_pcie_hotplug_control",
+                  " failed, returning errorlog" );
+
+            // capture the target data in the elog
+            ErrlUserDetailsTarget(l_pProcTarget).addToLog( l_err );
+
+            // informational. Don't add to istep error or return error
+            l_err->setSev(ERRORLOG::ERRL_SEV_INFORMATIONAL);
+
+            // Commit error log
+            errlCommit( l_err, HWPF_COMP_ID );
+        }
+        else
+        {
+            TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+              "SUCCESS : proc_pcie_hotplug_control",
+              " completed ok");
+        }
+    }   // endfor
+#endif
+
+
     TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                "call_proc_a_x_pci_dmi_pll_setup exit" );
 
@@ -400,6 +456,7 @@ void*    call_proc_startclock_chiplets( void    *io_pArgs )
     TARGETING::TargetHandleList l_procTargetList;
     getAllChips(l_procTargetList, TYPE_PROC);
 
+
     for ( TargetHandleList::const_iterator
           l_iter = l_procTargetList.begin();
           l_iter != l_procTargetList.end();
diff --git a/src/usr/hwpf/hwp/activate_powerbus/proc_pcie_slot_power/proc_pcie_slot_power.C b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_slot_power/proc_pcie_slot_power.C
index 92069c833..92069c833 100644
--- a/src/usr/hwpf/hwp/activate_powerbus/proc_pcie_slot_power/proc_pcie_slot_power.C
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_slot_power/proc_pcie_slot_power.C
diff --git a/src/usr/hwpf/hwp/activate_powerbus/proc_pcie_slot_power/proc_pcie_slot_power.H b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_slot_power/proc_pcie_slot_power.H
index 6795dc883..6795dc883 100644
--- a/src/usr/hwpf/hwp/activate_powerbus/proc_pcie_slot_power/proc_pcie_slot_power.H
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_slot_power/proc_pcie_slot_power.H
diff --git a/src/usr/hwpf/hwp/activate_powerbus/proc_pcie_slot_power/proc_pcie_slot_power_errors.xml b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_slot_power/proc_pcie_slot_power_errors.xml
index 2b54b385e..2b54b385e 100644
--- a/src/usr/hwpf/hwp/activate_powerbus/proc_pcie_slot_power/proc_pcie_slot_power_errors.xml
+++ b/src/usr/hwpf/hwp/nest_chiplets/proc_pcie_slot_power/proc_pcie_slot_power_errors.xml
diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile
index a8c706074..344d6f51a 100644
--- a/src/usr/hwpf/makefile
+++ b/src/usr/hwpf/makefile
@@ -56,7 +56,7 @@ HWP_ERROR_XML_FILES += hwp/core_activate/proc_prep_master_winkle/proc_prep_maste
 HWP_ERROR_XML_FILES += hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer_errors.xml
 HWP_ERROR_XML_FILES += hwp/activate_powerbus/proc_build_smp/proc_build_smp_errors.xml
 HWP_ERROR_XML_FILES += hwp/activate_powerbus/proc_build_smp/proc_adu_utils_errors.xml
-HWP_ERROR_XML_FILES += hwp/activate_powerbus/proc_pcie_slot_power/proc_pcie_slot_power_errors.xml
+HWP_ERROR_XML_FILES += hwp/nest_chiplets/proc_pcie_slot_power/proc_pcie_slot_power_errors.xml
 HWP_ERROR_XML_FILES += hwp/thread_activate/proc_thread_control/proc_thread_control.xml
 HWP_ERROR_XML_FILES += hwp/bus_training/erepair_errors.xml
 HWP_ERROR_XML_FILES += hwp/nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_errors.xml
diff --git a/src/usr/i2c/i2c.C b/src/usr/i2c/i2c.C
index b3a723e44..c82ff28a1 100755
--- a/src/usr/i2c/i2c.C
+++ b/src/usr/i2c/i2c.C
@@ -40,8 +40,9 @@
 #include <errl/errlmanager.H>
 #include <errl/errludtarget.H>
 #include <targeting/common/targetservice.H>
-#include <devicefw/driverif.H>
+#include <targeting/common/utilFilter.H>
 #include <targeting/common/predicates/predicates.H>
+#include <devicefw/driverif.H>
 #include <i2c/i2creasoncodes.H>
 #include <i2c/i2cif.H>
 
@@ -73,6 +74,7 @@ TRAC_INIT( & g_trac_i2cr, "I2CR", KILOBYTE );
 #define I2C_RESET_DELAY_NS (5 * NS_PER_MSEC)  // Sleep for 5 ms after reset
 #define MAX_I2C_ENGINES 3           // Maximum of 3 engines per I2C Master
 #define P8_MASTER_ENGINES 2         // Number of Engines used in P8
+#define P8_MASTER_PORTS 2           // Number of Ports used in P8
 #define CENTAUR_MASTER_ENGINES 1    // Number of Engines in a Centaur
 // ----------------------------------------------
 
@@ -1349,53 +1351,61 @@ errlHndl_t i2cSendSlaveStop ( TARGETING::Target * i_target,
 
     do
     {
-        mode.value = 0x0ull;
+        // Need to send slave stop to all ports on the engine
+        for( uint32_t port = 0; port < P8_MASTER_PORTS; port++ )
+        {
+            // @todo RTC 109926 - only do port 0 for FSI I2C
 
-        mode.bit_rate_div = i_args.bit_rate_divisor;
-        mode.port_num = i_args.port;
-        mode.enhanced_mode = 1;
+            mode.value = 0x0ull;
 
-        TRACUCOMP(g_trac_i2c,"i2cSendSlaveStop(): "
-                  "mode[0x%lx]: 0x%016llx",
-                  masterAddrs[i_args.engine].mode, mode.value );
+            mode.port_num = port;
+            mode.enhanced_mode = 1;
+            mode.bit_rate_div = i_args.bit_rate_divisor;
 
-        err = deviceWrite( i_target,
-                           &mode.value,
-                           size,
-                           DEVICE_SCOM_ADDRESS(
-                               masterAddrs[i_args.engine].mode ) );
+            TRACUCOMP(g_trac_i2c,"i2cSendSlaveStop(): "
+                      "mode[0x%lx]: 0x%016llx",
+                      masterAddrs[i_args.engine].mode, mode.value );
 
-        if( err )
-        {
-            break;
-        }
+            err = deviceWrite( i_target,
+                               &mode.value,
+                               size,
+                               DEVICE_SCOM_ADDRESS(
+                                   masterAddrs[i_args.engine].mode ) );
 
-        cmd.value = 0x0ull;
-        cmd.with_stop = 1;
+            if( err )
+            {
+                break;
+            }
 
-        TRACUCOMP(g_trac_i2c,"i2cSendSlaveStop(): "
-                  "cmd[0x%lx]: 0x%016llx",
-                  masterAddrs[i_args.engine].command, cmd.value );
+            cmd.value = 0x0ull;
+            cmd.with_stop = 1;
 
-        err = deviceWrite( i_target,
-                           &cmd.value,
-                           size,
-                           DEVICE_SCOM_ADDRESS(
-                               masterAddrs[i_args.engine].command ) );
+            TRACUCOMP(g_trac_i2c,"i2cSendSlaveStop(): "
+                      "cmd[0x%lx]: 0x%016llx",
+                      masterAddrs[i_args.engine].command, cmd.value );
 
-        if( err )
-        {
-            break;
-        }
+            err = deviceWrite( i_target,
+                               &cmd.value,
+                               size,
+                               DEVICE_SCOM_ADDRESS(
+                                   masterAddrs[i_args.engine].command ) );
 
-        // Now wait for cmd Complete
-        err = i2cWaitForCmdComp( i_target,
-                                 i_args );
+            if( err )
+            {
+                break;
+            }
+
+            // Now wait for cmd Complete
+            err = i2cWaitForCmdComp( i_target,
+                                     i_args );
+
+            if( err )
+            {
+                break;
+            }
+
+        } // end of port for-loop
 
-        if( err )
-        {
-            break;
-        }
     } while( 0 );
 
     TRACDCOMP( g_trac_i2c,
@@ -1754,5 +1764,164 @@ errlHndl_t i2cSetBusVariables ( TARGETING::Target * i_target,
     return err;
 }
 
+/**
+ * @brief This function will handle everything required to reset each I2C master
+ *        engine based on the input argement
+ *        @todo RTC 115832 - additional enums will be added. Currently just
+ *                           supporting I2C_RESET_PROC_HOST
+ */
+errlHndl_t i2cResetMasters ( i2cResetType i_resetType )
+{
+    errlHndl_t err = NULL;
+    bool error_found = false;
+    bool mutex_needs_unlock = false;
+    mutex_t * engineLock = NULL;
+    misc_args_t io_args;
+
+    TRACFCOMP( g_trac_i2c,
+               ENTER_MRK"i2cResetMasters(): %d",
+               i_resetType );
+
+    // @todo RTC 115834 - Check for and support additional reset types
+
+
+    do
+    {
+        // Get list of Procs
+        TARGETING::TargetHandleList procList;
+
+        TARGETING::getAllChips(procList,
+                               TARGETING::TYPE_PROC,
+                               true); // true: return functional targets
+
+        if( 0 == procList.size() )
+        {
+            TRACFCOMP(g_trac_i2c,
+                      INFO_MRK"i2cResetMasters: No Processor chips found!");
+        }
+
+        TRACUCOMP( g_trac_i2c,
+                   INFO_MRK"i2cResetMasters: I2C Master Procs: %d",
+                   procList.size() );
+
+        // Do resets to each Processor
+        for( uint32_t proc = 0; proc < procList.size(); proc++ )
+        {
+
+            // @todo RTC 115832 - look at supporting all engines, but for now
+            // just reseting engine 0 since that's what SBE Update uses
+            for( uint32_t engine = 0; engine < 1; engine++ )
+            {
+
+                error_found = false;
+                mutex_needs_unlock = false;
+
+                // Get the mutex for the requested engine
+                switch( engine )
+                {
+                case 0:
+                    engineLock = procList[proc]->getHbMutexAttr<TARGETING::ATTR_I2C_ENGINE_MUTEX_0>();
+                    break;
+
+                case 1:
+                    engineLock = procList[proc]->getHbMutexAttr<TARGETING::ATTR_I2C_ENGINE_MUTEX_1>();
+                    break;
+
+               case 2:
+                    engineLock = procList[proc]->getHbMutexAttr<TARGETING::ATTR_I2C_ENGINE_MUTEX_2>();
+                    break;
+
+                default:
+                    TRACFCOMP( g_trac_i2c,
+                               ERR_MRK"Invalid engine for getting Mutex! "
+                               "engine=%d", engine  );
+                    // @todo RTC:69113 - Create an error here
+                    break;
+                };
+
+                // Lock on this engine
+                TRACUCOMP( g_trac_i2c,
+                           INFO_MRK"i2cResetMasters: Obtaining lock for "
+                           "engine: %d", engine );
+                (void)mutex_lock( engineLock );
+                mutex_needs_unlock = true;
+                TRACUCOMP( g_trac_i2c,
+                           INFO_MRK"i2cResetMasters: Locked on engine: %d",
+                           engine );
+
+                TRACUCOMP( g_trac_i2c,
+                           INFO_MRK"i2cResetMasters: Reset 0x%X engine = %d",
+                           TARGETING::get_huid(procList[proc]), engine );
+
+                io_args.engine = engine;
+                io_args.port = 0; // default to port 0
+
+                // Hardcode to 400KHz - should be a safe speed
+                err = i2cSetBusVariables ( procList[proc],
+                                           SET_I2C_BUS_400KHZ,
+                                           io_args );
+
+                if( err )
+                {
+                    error_found = true;
+
+                    TRACFCOMP( g_trac_i2c,
+                               ERR_MRK"i2cResetMasters: Error Setting Bus "
+                               "Variables: tgt=0x%X engine=%d",
+                               TARGETING::get_huid(procList[proc]), engine );
+
+                    // If we get error skip resetting this target, but still
+                    // need to reset other I2C engines
+                    errlCommit( err,
+                                I2C_COMP_ID );
+
+                    // Don't continue or break - need mutex unlock
+                }
+
+
+                // Now reset the engine/bus
+                if ( error_found == false )
+                {
+                    err = i2cReset ( procList[proc],
+                                     io_args);
+
+                    if( err )
+                    {
+                        TRACFCOMP( g_trac_i2c,
+                                   ERR_MRK"i2cResetMasters: Error reseting "
+                                   "tgt=0x%X, engine=%d",
+                                   TARGETING::get_huid(procList[proc]), engine);
+
+                        // If we get errors on the reset, we still need to
+                        // to reset the other I2C engines
+                        errlCommit( err,
+                                    I2C_COMP_ID );
+
+                        // Don't continue or break - need mutex unlock
+                    }
+                }
+
+                // Check if we need to unlock the mutex
+                if ( mutex_needs_unlock == true )
+                {
+                    // Unlock
+                    (void) mutex_unlock( engineLock );
+                    TRACUCOMP( g_trac_i2c,
+                               INFO_MRK"i2cResetMasters: Unlocked engine: %d",
+                               engine );
+                }
+
+            } // end for-loop engine
+
+        } // end for-loop processor
+
+    } while( 0 );
+
+    TRACFCOMP( g_trac_i2c,
+               EXIT_MRK"i2cResetMasters(): err rc=0x%X, plid=0x%X",
+               ERRL_GETRC_SAFE(err), ERRL_GETPLID_SAFE(err));
+
+    return err;
+}
 
 } // end namespace I2C