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authorPatrick Williams <iawillia@us.ibm.com>2010-09-14 18:09:10 -0500
committerPatrick Williams <iawillia@us.ibm.com>2010-09-14 18:09:10 -0500
commit7dbf41357d6061170530601022c123eaf8fc2934 (patch)
tree8da74fbf3a1919c73403b1c67ae8edad77843790 /src
parent2bc4d154dd12ccd2280012ddb1439020ca79eb79 (diff)
downloadblackbird-hostboot-7dbf41357d6061170530601022c123eaf8fc2934.tar.gz
blackbird-hostboot-7dbf41357d6061170530601022c123eaf8fc2934.zip
Various VMM updates.
1) Do SLBIA prior to creating initial SLB entry. 2) Do proper TLBIEs. 3) Set Ks/Kp in SLB properly. 4) Test data storage exception on code space.
Diffstat (limited to 'src')
-rw-r--r--src/include/kernel/vmmmgr.H18
-rw-r--r--src/kernel/vmmmgr.C8
-rw-r--r--src/sys/init/init_main.C4
3 files changed, 27 insertions, 3 deletions
diff --git a/src/include/kernel/vmmmgr.H b/src/include/kernel/vmmmgr.H
index a8bb5ae3f..adf699e85 100644
--- a/src/include/kernel/vmmmgr.H
+++ b/src/include/kernel/vmmmgr.H
@@ -93,6 +93,24 @@ class VmmManager
pte.a &= ~0x01;
pte.a |= (valid ? 0x1 : 0x0);
+
+ if (!valid)
+ {
+ asm volatile("ptesync" ::: "memory");
+
+ register uint64_t rS = 0, rB = 0;
+ rB = (getTid(pte) << 11) // VA[0:54).
+ | (((uint64_t)&pte) & 0x3FF8) >> 7; // VA[55:65].
+ rB <<= 12; // Put in rB[0:51].
+ rB |= 0x0100; // B = 01 (1TB).
+
+ // TLBIE isn't correct in gcc, hand code asm.
+ asm volatile(".long 0x7c000264 | (%0 << 11) | (%1 << 21)" ::
+ "r"(rB), "r"(rS) : "memory");
+
+ asm volatile("eieio" ::: "memory");
+ asm volatile("tlbsync" ::: "memory");
+ }
asm volatile("ptesync" ::: "memory");
}
diff --git a/src/kernel/vmmmgr.C b/src/kernel/vmmmgr.C
index 43348ae67..51e26e60b 100644
--- a/src/kernel/vmmmgr.C
+++ b/src/kernel/vmmmgr.C
@@ -51,9 +51,11 @@ void VmmManager::initSLB()
// ESID = 0, V = 1, Index = 1.
slbRB = 0x0000000008000001;
- // B = 01 (1TB), VSID = 0, Ks = 1, Kp = 1, NLCLP = 0
- slbRS = 0x4000000000000C00;
+ // B = 01 (1TB), VSID = 0, Ks = 0, Kp = 1, NLCLP = 0
+ slbRS = 0x4000000000000400;
+ asm volatile("slbia" ::: "memory");
+ asm volatile("isync" ::: "memory");
asm volatile("slbmte %0, %1" :: "r"(slbRS), "r"(slbRB) : "memory");
asm volatile("isync" ::: "memory");
}
@@ -64,7 +66,7 @@ void VmmManager::initPTEs()
for(size_t i = 0; i < PTEG_COUNT; i++)
for (size_t j = 0; j < PTEG_SIZE; j++)
setValid(false, getPte(i,j));
-
+
// Set up linear map.
for(size_t i = 0; i < (FULL_MEM_SIZE / PAGESIZE); i++)
{
diff --git a/src/sys/init/init_main.C b/src/sys/init/init_main.C
index ef9dfb1e7..6beba9ab0 100644
--- a/src/sys/init/init_main.C
+++ b/src/sys/init/init_main.C
@@ -62,6 +62,10 @@ void init_main(void* unused)
*/
task_exec("libexample.so", NULL);
+
+ volatile uint64_t* ptr = (uint64_t*) 0x3000;
+ (*ptr) = 0x1234;
+ printk("Value = %llx\n", *ptr);
while(1)
task_yield();
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