Add testcases for pirformat helper functions

Change-Id: I10b2be1ea9d0dc4a46c6c473b03ee024c6bf0de6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24801
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

5 files changed, 258 insertions, 7 deletions

diff --git a/src/include/arch/pirformat.H b/src/include/arch/pirformat.H
index 0085ccbf1..ec64b669a 100644
--- a/src/include/arch/pirformat.H
+++ b/src/include/arch/pirformat.H
@@ -113,7 +113,6 @@ struct PIR_t
     };
 
     // Some handy functions
-    // TODO RTC 154162 Add testcases for the below functions
     inline static uint32_t groupFromPir( uint32_t i_pir ) {
         return (static_cast<PIR_t>(i_pir)).groupId;
     }
@@ -127,6 +126,26 @@ struct PIR_t
         return (static_cast<PIR_t>(i_pir)).threadId;
     }
 
+    // Below is the right-justified portion of the PIR laid out in bits
+    //     (normal core mode) along with chipId/coreId pictures
+    //
+    //   - - - -   - - - -   - - - -   - - - -
+    //    |    ^    |  ^   | ^|     ^     | ^
+    //         |       |     |      |       |
+    //      group    chip    |    core     thread
+    //                  reserved    |
+    //    |                |        }
+    //    |                |        |
+    //    |     chipId     |        }
+    //    __________________        |
+    //    |                         |
+    //    |         coreId          |
+    //    |_________________________|
+    //
+    // A chipId contains just the group + chip bits. It is right justified.
+    //
+    // A coreId contains the group, chip, reserved, and core bits.
+    //   It is also right justified.
     inline static uint32_t groupFromChipId( uint32_t i_chipId ) {
         return (i_chipId >> BITS_IN_CHIP);
     }
@@ -135,14 +154,15 @@ struct PIR_t
                             (BITS_AFTER_CHIP)));
     }
 
-    inline static uint32_t groupFromCoreId( uint32_t i_chipId ) {
-        return (i_chipId >> (BITS_AFTER_GROUP));
+    inline static uint32_t groupFromCoreId( uint32_t i_coreId ) {
+        return (i_coreId >> (BITS_IN_CHIP + BITS_IN_RESERVED1 + BITS_IN_CORE));
     }
-    inline static uint32_t chipFromCoreId( uint32_t i_chipId ) {
-        return (i_chipId >> BITS_AFTER_CHIP);
+    inline static uint32_t chipFromCoreId( uint32_t i_coreId ) {
+        return ((i_coreId & (CHIP_MASK >> BITS_IN_THREAD))
+                                       >> (BITS_IN_CORE + BITS_IN_RESERVED1));
     }
-    inline static uint32_t coreFromCoreId( uint32_t i_chipId ) {
-        return (i_chipId & (CORE_MASK >> BITS_IN_THREAD));
+    inline static uint32_t coreFromCoreId( uint32_t i_coreId ) {
+        return (i_coreId & (CORE_MASK >> BITS_AFTER_CORE));
     }
 
     inline static uint32_t createChipId( uint32_t i_groupId,
diff --git a/src/makefile b/src/makefile
index 9ff3f2b74..8f5093a48 100644
--- a/src/makefile
+++ b/src/makefile
@@ -204,6 +204,7 @@ TESTCASE_MODULES += testmemoize
 TESTCASE_MODULES += testprdf
 TESTCASE_MODULES += testattn
 TESTCASE_MODULES += $(if $(CONFIG_VPO_COMPILE),,testmdia)
+TESTCASE_MODULES += testpirformat
 
 #******************************************************************
 #KNOWN ISSUES (I might let these run but there is something wrong)
diff --git a/src/usr/testcore/makefile b/src/usr/testcore/makefile
index 03def48dd..55b6c3831 100644
--- a/src/usr/testcore/makefile
+++ b/src/usr/testcore/makefile
@@ -28,6 +28,7 @@ SUBDIRS += lib.d
 SUBDIRS += kernel.d
 SUBDIRS += rtloader.d
 SUBDIRS += memoize.d
+SUBDIRS += pir.d
 
 include ${ROOTPATH}/config.mk
 
diff --git a/src/usr/testcore/pir/makefile b/src/usr/testcore/pir/makefile
new file mode 100644
index 000000000..09b22d905
--- /dev/null
+++ b/src/usr/testcore/pir/makefile
@@ -0,0 +1,31 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/usr/testcore/pir/makefile $
+#
+# OpenPOWER HostBoot Project
+#
+# Contributors Listed Below - COPYRIGHT 2016
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+
+ROOTPATH = ../../../..
+
+MODULE = testpirformat
+TESTS = *.H
+
+include ${ROOTPATH}/config.mk
diff --git a/src/usr/testcore/pir/test_pirformat.H b/src/usr/testcore/pir/test_pirformat.H
new file mode 100644
index 000000000..68434723f
--- /dev/null
+++ b/src/usr/testcore/pir/test_pirformat.H
@@ -0,0 +1,198 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/testcore/pir/test_pirformat.H $                       */
+/*                                                                        */
+/* OpenPOWER HostBoot Project                                             */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2016                             */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+
+#ifndef __TEST_PIRFORMAT_H
+#define __TEST_PIRFORMAT_H
+
+/**
+ *  @file test_pirformat.H
+ *  @brief Tests pirformat structure and utility functions
+ */
+
+#include <cxxtest/TestSuite.H>
+#include <arch/pirformat.H>
+#include <errl/errlmanager.H>
+
+trace_desc_t* g_trac_pir = NULL;
+TRAC_INIT(&g_trac_pir, "PIR_TEST", KILOBYTE);
+
+class PirformatTest: public CxxTest::TestSuite
+{
+  public:
+
+    void testPirformat(void)
+    {
+        TRACFCOMP(g_trac_pir, ENTER_MRK
+            "testPirformat> start" );
+
+        PIR_t zeroPir      = PIR_t(0);
+        PIR_t otherZeroPir = PIR_t(0, 0, 0, 0);
+
+        if ((PIR_t::groupFromPir(zeroPir.word)
+                              != PIR_t::groupFromPir(otherZeroPir.word))
+            || (PIR_t::chipFromPir(zeroPir.word)
+                              != PIR_t::chipFromPir(otherZeroPir.word))
+            || (PIR_t::threadFromPir(zeroPir.word)
+                              != PIR_t::threadFromPir(otherZeroPir.word)))
+        {
+            TS_FAIL("Zero PIR constructors not equivalent.");
+
+        }
+
+        //Test with some arbitrary values
+        TRACFCOMP(g_trac_pir, ENTER_MRK
+            "testPirformat: Test with 1,2,5,3 values");
+        testPirformat(1,2,5,3);
+
+        //Test with 'max' values
+        TRACFCOMP(g_trac_pir, ENTER_MRK
+            "testPirformat: Test with 15,7,31,3 values");
+        testPirformat(15,7,31,3);
+
+        TRACFCOMP(g_trac_pir, ENTER_MRK
+                "testPirformat> finish" );
+
+    }
+
+
+    void testPirformat(uint32_t i_group, uint32_t i_chip,
+                       uint32_t i_core,  uint32_t i_thread)
+    {
+
+        //Test PIR with various values and the "fromPir" helpers
+        uint32_t GROUP_TEST_VAL = i_group;
+        uint32_t CHIP_TEST_VAL = i_chip;
+        uint32_t CORE_TEST_VAL = i_core;
+        uint32_t THREAD_TEST_VAL = i_thread;
+        PIR_t test1 = PIR_t(GROUP_TEST_VAL, CHIP_TEST_VAL,
+                            CORE_TEST_VAL,  THREAD_TEST_VAL);
+
+        if (  (test1.groupId != PIR_t::groupFromPir(test1.word))
+            || (test1.groupId != GROUP_TEST_VAL))
+        {
+            TS_FAIL("Group constructors or fromPir helper not working.");
+        }
+
+        if (  (test1.chipId != PIR_t::chipFromPir(test1.word))
+             || (test1.chipId != CHIP_TEST_VAL))
+        {
+            TS_FAIL("Chip constructors or fromPir helper not working.");
+        }
+
+        if (  (test1.coreId != PIR_t::coreFromPir(test1.word))
+             || (test1.coreId != CORE_TEST_VAL))
+        {
+            TS_FAIL("Core constructors or fromPir helper not working.");
+        }
+
+        if (  (test1.threadId != PIR_t::threadFromPir(test1.word))
+             || (test1.threadId != THREAD_TEST_VAL))
+        {
+            TS_FAIL("Thread constructors or helpers not working.");
+        }
+
+        //Test masks + 'AFTER' constants
+        if (((test1.word & PIR_t::GROUP_MASK) >> PIR_t::BITS_AFTER_GROUP)
+                 != GROUP_TEST_VAL)
+        {
+            TS_FAIL("GROUP_MASK or BITS_AFTER_GROUP not correct.");
+        }
+
+        if (((test1.word & PIR_t::CHIP_MASK) >> PIR_t::BITS_AFTER_CHIP)
+                 != CHIP_TEST_VAL)
+        {
+            TS_FAIL("CHIP_MASK or BITS_AFTER_CHIP not correct.");
+        }
+
+        if (((test1.word & PIR_t::CORE_MASK) >> PIR_t::BITS_AFTER_CORE)
+                 != CORE_TEST_VAL)
+        {
+            TS_FAIL("CORE_MASK or BITS_AFTER_CORE not correct.");
+        }
+
+        if (((test1.word & PIR_t::THREAD_MASK) >> PIR_t::BITS_AFTER_THREAD)
+                 != THREAD_TEST_VAL)
+        {
+            TS_FAIL("THREAD_MASK or BITS_AFTER_THREAD not correct.");
+        }
+
+        //Test Core ID Constructors and helpers
+        uint32_t coreId0 = PIR_t::createCoreId( GROUP_TEST_VAL,
+                                                CHIP_TEST_VAL,
+                                                CORE_TEST_VAL );
+
+        uint32_t coreId1 = PIR_t::createCoreId( CHIP_TEST_VAL,
+                                                CORE_TEST_VAL );
+
+        if (PIR_t::groupFromCoreId(coreId0) != GROUP_TEST_VAL)
+        {
+            TRACFCOMP(g_trac_pir, "Value from helper: 0x%x, not equal to known group value: 0x%x",
+                      PIR_t::groupFromCoreId(coreId0), GROUP_TEST_VAL);
+            TS_FAIL("Group from CoreID not correct.");
+        }
+
+        if ( (PIR_t::chipFromCoreId(coreId0) != CHIP_TEST_VAL)
+             || (PIR_t::chipFromCoreId(coreId1) != CHIP_TEST_VAL))
+        {
+            TRACFCOMP(g_trac_pir, "Value from helper: 0x%x, not equal to known chip value: 0x%x",
+                      PIR_t::chipFromCoreId(coreId0), CHIP_TEST_VAL);
+            TRACFCOMP(g_trac_pir, "OR - Value from helper: 0x%x, not equal to known chip value: 0x%x",
+                      PIR_t::chipFromCoreId(coreId1), CHIP_TEST_VAL);
+                TS_FAIL("Chip from CoreID not correct.");
+        }
+
+        if ( (PIR_t::coreFromCoreId(coreId0) != CORE_TEST_VAL)
+             || (PIR_t::coreFromCoreId(coreId1) != CORE_TEST_VAL))
+        {
+            TRACFCOMP(g_trac_pir, "Value from helper: 0x%x, not equal to known core value: 0x%x",
+                      PIR_t::coreFromCoreId(coreId0), CORE_TEST_VAL);
+            TRACFCOMP(g_trac_pir, "OR - Value from helper: 0x%x, not equal to known core value: 0x%x",
+                      PIR_t::coreFromCoreId(coreId1), CORE_TEST_VAL);
+            TS_FAIL("Core from CoreID not correct.");
+        }
+
+        //Test Chip ID Constructors and helpers
+        uint32_t chipId = PIR_t::createChipId( GROUP_TEST_VAL,
+                                               CHIP_TEST_VAL );
+
+        if (PIR_t::groupFromChipId(chipId) != GROUP_TEST_VAL)
+        {
+            TRACFCOMP(g_trac_pir, "Value from helper: 0x%x, not equal to known group value: 0x%x",
+                      PIR_t::groupFromChipId(chipId), GROUP_TEST_VAL);
+            TS_FAIL("Group from ChipID not correct.");
+        }
+
+        if (PIR_t::chipFromChipId(chipId) != CHIP_TEST_VAL)
+        {
+            TRACFCOMP(g_trac_pir, "Value from helper: 0x%x, not equal to known group value: 0x%x",
+                      PIR_t::chipFromChipId(chipId), CHIP_TEST_VAL);
+            TS_FAIL("Chip from ChipID not correct.");
+        }
+    }
+
+};
+
+#endif
+