summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorBill Hoffa <wghoffa@us.ibm.com>2019-08-14 10:49:46 -0500
committerDaniel M Crowell <dcrowell@us.ibm.com>2019-08-16 12:42:39 -0500
commit5825828fa7984e6d46dd47ef1835646303d2a593 (patch)
tree015b2d3a4f68223c3ab44ecb0306ccd90f437438 /src
parent51b7478d2e5dd9bfad8d5039ce1ce26e8dce24db (diff)
downloadblackbird-hostboot-5825828fa7984e6d46dd47ef1835646303d2a593.tar.gz
blackbird-hostboot-5825828fa7984e6d46dd47ef1835646303d2a593.zip
Fix MMIO Addressing and Attributes on Non-Master Proc
- MMIOs to the MC/OMI space to a non-master proc were incorrectly using a base address pointing to proc0 - The OMI_INBAND_BAR_BASE_ADDR_OFFSET attribute MRW processing was incorrect for MC and OMI targets behind the 2nd proc Change-Id: Ife440541642463e11d4146157d568f8cd4440877 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82234 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/usr/mmio/mmio.C15
-rwxr-xr-xsrc/usr/targeting/common/processMrw.pl8
2 files changed, 17 insertions, 6 deletions
diff --git a/src/usr/mmio/mmio.C b/src/usr/mmio/mmio.C
index 4a5d714ab..7d85dee8f 100644
--- a/src/usr/mmio/mmio.C
+++ b/src/usr/mmio/mmio.C
@@ -108,8 +108,19 @@ errlHndl_t mmioSetup()
auto l_omiBaseAddr =
l_mcTarget->getAttr<ATTR_OMI_INBAND_BAR_BASE_ADDR_OFFSET>();
- // Apply the MMIO base offset so we get the real address
- uint64_t l_realAddr = ( l_omiBaseAddr | MMIO_BASE );
+ // Build up the full address with group/chip address considerations
+ auto l_procType = TARGETING::TYPE_PROC;
+ TARGETING::Target* l_parentChip = getParent(l_mcTarget, l_procType);
+ uint8_t l_groupId =
+ l_parentChip->getAttr<ATTR_PROC_EFF_FABRIC_GROUP_ID>();
+ uint8_t l_chipId =
+ l_parentChip->getAttr<ATTR_PROC_EFF_FABRIC_CHIP_ID>();
+ uint64_t l_realAddr = computeMemoryMapOffset( MMIO_BASE,
+ l_groupId,
+ l_chipId );
+
+ // Apply the MMIO base offset so we get the final address
+ l_realAddr += l_omiBaseAddr;
// Map the device with a kernal call, each device, the MC, is 32 GB
uint64_t l_virtAddr = reinterpret_cast<uint64_t>
diff --git a/src/usr/targeting/common/processMrw.pl b/src/usr/targeting/common/processMrw.pl
index 24759589c..9840a5213 100755
--- a/src/usr/targeting/common/processMrw.pl
+++ b/src/usr/targeting/common/processMrw.pl
@@ -1662,9 +1662,9 @@ sub processMcbist
##
sub processMc
{
- # TODO, work needs to be done for OMI_INBAND_BAR_BASE_ADDR_OFFSET
- # Will be added in a later commit along with the other BARs
- # RTC:210315
+ # NOTE: OMI_INBAND_BAR_BASE_ADDR_OFFSET will be set for the MC
+ # targets via a specific child OMI Target. View the
+ # processOmi function for further details.
my $targetObj = shift;
my $target = shift;
@@ -1765,7 +1765,7 @@ sub processOmi
$value = "physical:sys-0/node-0/proc-$proc_num/" . $omi_map{$num};
$targetObj->setAttribute($target, "OMIC_PARENT", $value);
- my $omi = Math::BigInt->new($targetObj->getAttribute($target,"FAPI_POS"));
+ my $omi = Math::BigInt->new($targetObj->getAttribute($target,"CHIP_UNIT"));
# Base omi bar offset
# We use this base address in simics_AXONE.system.xml and want our
# addresses to match the ones in that xml
OpenPOWER on IntegriCloud