PRD: Update Axone calls to isDramWidthX4

Change-Id: Ifb01d91c39ae76e243c6071452afa533350e1d9f
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76714
Reviewed-by: Paul Greenwood <paul.greenwood@ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Reviewed-by: Benjamen G. Tyner <ben.tyner@ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78329
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

6 files changed, 81 insertions, 17 deletions

diff --git a/src/usr/diag/prdf/common/plat/mem/prdfMemCaptureData.C b/src/usr/diag/prdf/common/plat/mem/prdfMemCaptureData.C
index 732fa99ce..e3da2e952 100644
--- a/src/usr/diag/prdf/common/plat/mem/prdfMemCaptureData.C
+++ b/src/usr/diag/prdf/common/plat/mem/prdfMemCaptureData.C
@@ -66,8 +66,16 @@ void addExtMemMruData( const MemoryMru & i_memMru, errlHndl_t io_errl )
     {
         TargetHandle_t trgt = i_memMru.getTrgt();
 
-        // Get the DRAM width.
-        extMemMru.isX4Dram = isDramWidthX4( trgt ) ? 1 : 0;
+        if ( TYPE_MEM_PORT == getTargetType(trgt) )
+        {
+            TargetHandle_t dimm = getConnectedDimm( trgt, i_memMru.getRank() );
+            extMemMru.isX4Dram = isDramWidthX4( dimm ) ? 1 : 0;
+        }
+        else
+        {
+            // Get the DRAM width.
+            extMemMru.isX4Dram = isDramWidthX4( trgt ) ? 1 : 0;
+        }
 
         // Get the DIMM type.
         if ( TYPE_MBA == getTargetType(trgt) )
@@ -220,8 +228,11 @@ void captureDramRepairsData( TARGETING::TargetHandle_t i_trgt,
         if ( data.rankDataList.size() > 0 )
         {
             data.header.rankCount = data.rankDataList.size();
-            data.header.isEccSp  = ( (TYPE_MBA == getTargetType(i_trgt)) &&
-                                     isDramWidthX4( i_trgt ) );
+            data.header.isEccSp   = false;
+            if ( TYPE_MBA == getTargetType(i_trgt) )
+            {
+                data.header.isEccSp = isDramWidthX4( i_trgt );
+            }
             UtilMem dramStream;
             dramStream << data;
 
diff --git a/src/usr/diag/prdf/common/plat/mem/prdfMemDqBitmap.H b/src/usr/diag/prdf/common/plat/mem/prdfMemDqBitmap.H
index b407d9835..5d96aadfd 100644
--- a/src/usr/diag/prdf/common/plat/mem/prdfMemDqBitmap.H
+++ b/src/usr/diag/prdf/common/plat/mem/prdfMemDqBitmap.H
@@ -73,7 +73,19 @@ class MemDqBitmap
     /** @brief Constructor from components */
     MemDqBitmap( TARGETING::TargetHandle_t i_trgt, const MemRank & i_rank,
                  BitmapData i_d ) : iv_trgt(i_trgt), iv_rank(i_rank),
-                 iv_x4Dram(PlatServices::isDramWidthX4(i_trgt)), iv_data(i_d){}
+                 iv_x4Dram(true), iv_data(i_d)
+    {
+        if ( TARGETING::TYPE_MEM_PORT == PlatServices::getTargetType(iv_trgt) )
+        {
+            TARGETING::TargetHandle_t dimm =
+                PlatServices::getConnectedDimm( iv_trgt, iv_rank );
+            iv_x4Dram = PlatServices::isDramWidthX4( dimm );
+        }
+        else
+        {
+            iv_x4Dram = PlatServices::isDramWidthX4( iv_trgt );
+        }
+    }
 
   public: // functions
 
diff --git a/src/usr/diag/prdf/common/plat/mem/prdfMemSymbol.C b/src/usr/diag/prdf/common/plat/mem/prdfMemSymbol.C
index fe237c027..fc4fa3a92 100755
--- a/src/usr/diag/prdf/common/plat/mem/prdfMemSymbol.C
+++ b/src/usr/diag/prdf/common/plat/mem/prdfMemSymbol.C
@@ -159,20 +159,24 @@ uint8_t MemSymbol::getDram() const
 {
     uint8_t dram = 0;
     TYPE trgtType = getTargetType( iv_trgt );
-    bool isX4  = isDramWidthX4( iv_trgt );
+    bool isX4 = true;
 
     if ( TYPE_MBA == trgtType )
     {
+        isX4 = isDramWidthX4( iv_trgt );
         dram = isX4 ? symbol2Nibble<TYPE_MBA>( iv_symbol )
                     : symbol2Byte  <TYPE_MBA>( iv_symbol );
     }
     else if ( TYPE_MCA == trgtType )
     {
+        isX4 = isDramWidthX4( iv_trgt );
         dram = isX4 ? symbol2Nibble<TYPE_MCA>( iv_symbol )
                     : symbol2Byte  <TYPE_MCA>( iv_symbol );
     }
     else if ( TYPE_OCMB_CHIP == trgtType )
     {
+        TargetHandle_t dimm = getConnectedDimm(iv_trgt, iv_rank, getPortSlct());
+        isX4 = isDramWidthX4( dimm );
         dram = isX4 ? symbol2Nibble<TYPE_OCMB_CHIP>( iv_symbol )
                     : symbol2Byte  <TYPE_OCMB_CHIP>( iv_symbol );
     }
@@ -200,14 +204,24 @@ uint8_t MemSymbol::getDramRelCenDqs() const
     const uint8_t X4_DRAM_SPARE_UPPER = 19;
     const uint8_t X8_DRAM_SPARE = 9;
 
+    bool isX4 = true;
+    if ( TYPE_MEM_PORT == getTargetType(iv_trgt) )
+    {
+        TargetHandle_t dimm = getConnectedDimm(iv_trgt, iv_rank, getPortSlct());
+        isX4 = isDramWidthX4( dimm );
+    }
+    else
+    {
+        isX4 = isDramWidthX4( iv_trgt );
+    }
 
-    uint8_t l_dramWidth = ( isDramWidthX4(iv_trgt) ) ? 4 : 8;
+    uint8_t l_dramWidth = ( isX4 ) ? 4 : 8;
     uint8_t l_dram = getDq() / l_dramWidth; // (x8: 0-9, x4: 0-19)
 
     // Adjust for spares
     if ( isDramSpared() )
     {
-        if ( isDramWidthX4(iv_trgt) )
+        if ( isX4 )
         {
             uint8_t l_bit  = getDq() % DQS_PER_BYTE;
             l_dram = ( l_bit < 4 ) ? X4_DRAM_SPARE_LOWER : X4_DRAM_SPARE_UPPER;
@@ -219,7 +233,7 @@ uint8_t MemSymbol::getDramRelCenDqs() const
     }
     else if ( isEccSpared() )
     {
-        l_dram = ( isDramWidthX4(iv_trgt) ) ? X4_ECC_SPARE : X8_ECC_SPARE;
+        l_dram = ( isX4 ) ? X4_ECC_SPARE : X8_ECC_SPARE;
     }
 
     return l_dram;
@@ -231,7 +245,16 @@ uint8_t MemSymbol::getDramRelCenDqs() const
 uint8_t MemSymbol::getDramPins() const
 {
     TYPE trgtType = getTargetType( iv_trgt );
-    bool isX4  = isDramWidthX4( iv_trgt );
+    bool isX4 = true;
+    if ( TYPE_MEM_PORT == getTargetType(iv_trgt) )
+    {
+        TargetHandle_t dimm = getConnectedDimm(iv_trgt, iv_rank, getPortSlct());
+        isX4 = isDramWidthX4( dimm );
+    }
+    else
+    {
+        isX4 = isDramWidthX4( iv_trgt );
+    }
 
     uint32_t dps = 0;
     uint32_t spd = 0;
@@ -261,7 +284,16 @@ uint8_t MemSymbol::getDramSymbol() const
 {
     uint8_t dramSymbol = SYMBOLS_PER_RANK;
     TYPE trgtType = getTargetType( iv_trgt );
-    bool    isX4  = isDramWidthX4( iv_trgt );
+    bool isX4 = true;
+    if ( TYPE_MEM_PORT == getTargetType(iv_trgt) )
+    {
+        TargetHandle_t dimm = getConnectedDimm(iv_trgt, iv_rank, getPortSlct());
+        isX4 = isDramWidthX4( dimm );
+    }
+    else
+    {
+        isX4 = isDramWidthX4( iv_trgt );
+    }
     uint8_t dram  = getDram();
 
     if ( TYPE_MBA == trgtType )
diff --git a/src/usr/diag/prdf/common/plat/mem/prdfMemUtils.C b/src/usr/diag/prdf/common/plat/mem/prdfMemUtils.C
index 0cee436f5..4d96de65e 100755
--- a/src/usr/diag/prdf/common/plat/mem/prdfMemUtils.C
+++ b/src/usr/diag/prdf/common/plat/mem/prdfMemUtils.C
@@ -240,7 +240,11 @@ int32_t collectCeStats<TYPE_OCMB_CHIP>( ExtensibleChip * i_chip,
 
         TargetHandle_t ocmbTrgt = i_chip->getTrgt();
 
-        const bool isX4 = isDramWidthX4(ocmbTrgt);
+        // TODO RTC 210072 - support for multiple ports
+        TargetHandle_t memPortTrgt = getConnectedChild( ocmbTrgt,
+                                                        TYPE_MEM_PORT, 0 );
+        TargetHandle_t dimm = getConnectedDimm( memPortTrgt, i_rank );
+        const bool isX4 = isDramWidthX4( dimm );
 
         // Use this map to keep track of the total counts per DRAM.
         DramCountMap dramCounts;
diff --git a/src/usr/diag/prdf/common/plat/prdfPlatServices_common.C b/src/usr/diag/prdf/common/plat/prdfPlatServices_common.C
index 41ae9ca00..8e9f11807 100644
--- a/src/usr/diag/prdf/common/plat/prdfPlatServices_common.C
+++ b/src/usr/diag/prdf/common/plat/prdfPlatServices_common.C
@@ -1031,9 +1031,11 @@ int32_t mssSetSteerMux<TYPE_OCMB_CHIP>( TargetHandle_t i_memPort,
     errlHndl_t errl = NULL;
     fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT> fapiPort(i_memPort);
 
+    TargetHandle_t dimm = getConnectedDimm( i_memPort, i_rank,
+                                            i_symbol.getPortSlct() );
     uint8_t l_dramSymbol = PARSERUTILS::dram2Symbol<TYPE_MBA>(
                                                      i_symbol.getDram(),
-                                                     isDramWidthX4(i_memPort) );
+                                                     isDramWidthX4(dimm) );
 
     FAPI_INVOKE_HWP( errl, mss_do_steering, fapiPort,
                      i_rank.getMaster(), l_dramSymbol,
@@ -1105,7 +1107,9 @@ int32_t getDimmSpareConfig<TYPE_MEM_PORT>( TargetHandle_t i_memPort,
 
         bool isFullByte = ( ENUM_ATTR_MEM_EFF_DIMM_SPARE_FULL_BYTE ==
                             o_spareConfig );
-        bool isX4Dram = isDramWidthX4(i_memPort);
+
+        TargetHandle_t dimm = getConnectedDimm( i_memPort, i_rank, i_ps );
+        bool isX4Dram = isDramWidthX4(dimm);
 
         if ( ( isX4Dram && isFullByte ) || ( !isX4Dram && !isFullByte ) )
         {
@@ -1216,7 +1220,8 @@ uint32_t isDramSparingEnabled<TYPE_MEM_PORT>( TARGETING::TargetHandle_t i_trgt,
 
     do
     {
-        const bool isX4 = isDramWidthX4( i_trgt );
+        TargetHandle_t dimm = getConnectedDimm( i_trgt, i_rank, i_ps );
+        const bool isX4 = isDramWidthX4( dimm );
         if ( isX4 )
         {
             // Always an ECC spare in x4 mode.
diff --git a/src/usr/diag/prdf/common/plat/prdfTargetServices.C b/src/usr/diag/prdf/common/plat/prdfTargetServices.C
index 571f29f83..09136d820 100755
--- a/src/usr/diag/prdf/common/plat/prdfTargetServices.C
+++ b/src/usr/diag/prdf/common/plat/prdfTargetServices.C
@@ -1485,7 +1485,7 @@ bool isDramWidthX4( TargetHandle_t i_trgt )
    bool o_dramWidthX4 = false;
 
    PRDF_ASSERT( nullptr != i_trgt );
-   //uint8_t dramWidths = 0;
+   //uint8_t dramWidths[MAX_DIMM_PER_PORT];
 
    switch ( getTargetType(i_trgt) )
    {
@@ -1504,7 +1504,7 @@ bool isDramWidthX4( TargetHandle_t i_trgt )
             //dramWidths = memPort->getAttr<ATTR_MEM_EFF_DRAM_WIDTH>();
             //uint8_t dimmSlct = getDimmSlct( i_trgt );
             //o_dramWidthX4 =
-            //  (fapi2::ENUM_ATTR_MEM_EFF_DRAM_WIDTH_X4 == dramWidths[dimmSlct]);
+            //  (TARGETING::MEM_EFF_DRAM_WIDTH_X4 == dramWidths[dimmSlct]);
             break;
 
         default: