diff options
| author | Adam Hale <adam.samuel.hale@ibm.com> | 2019-06-27 15:48:11 -0400 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2019-07-09 10:17:25 -0500 |
| commit | 491995a6a3ed6062169c2818c89db7a85da9e448 (patch) | |
| tree | 9c5a66db4e1ba180b6c4aceb0d0fd94490695d58 /src | |
| parent | 48255bc69e6d59eb3125db5294c4231f0e992fa5 (diff) | |
| download | blackbird-hostboot-491995a6a3ed6062169c2818c89db7a85da9e448.tar.gz blackbird-hostboot-491995a6a3ed6062169c2818c89db7a85da9e448.zip | |
temporary mc inits to enable wider team
Change-Id: Ic9adb821799b3383b90b8e9feb86815c9b28f7f2
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79669
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Devon A. Baughen <devon.baughen1@ibm.com>
Reviewed-by: BRIANA E. FOXWORTH <befoxwor@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79938
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src')
3 files changed, 39 insertions, 12 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9a_mi_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9a_mi_scom.C index f0ee6b4e5..a5a234188 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9a_mi_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9a_mi_scom.C @@ -32,6 +32,8 @@ using namespace fapi2; constexpr uint64_t literal_7 = 7; constexpr uint64_t literal_1 = 1; constexpr uint64_t literal_0x19 = 0x19; +constexpr uint64_t literal_0b1111000000 = 0b1111000000; +constexpr uint64_t literal_0b0111111 = 0b0111111; constexpr uint64_t literal_0b0000000000001000 = 0b0000000000001000; constexpr uint64_t literal_0b011 = 0b011; constexpr uint64_t literal_0b01 = 0b01; @@ -44,10 +46,6 @@ fapi2::ReturnCode p9a_mi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MI>& TGT0, fapi2::ATTR_ENABLE_MEM_EARLY_DATA_SCOM_Type l_TGT1_ATTR_ENABLE_MEM_EARLY_DATA_SCOM; FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_ENABLE_MEM_EARLY_DATA_SCOM, TGT1, l_TGT1_ATTR_ENABLE_MEM_EARLY_DATA_SCOM)); uint64_t l_def_ENABLE_AMO_CACHING = literal_1; - fapi2::ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID_Type l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID; - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID, TGT1, l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID)); - fapi2::ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID_Type l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID; - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID, TGT1, l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID)); uint64_t l_def_ENABLE_MCU_TIMEOUTS = literal_1; fapi2::buffer<uint64_t> l_scom_buffer; { @@ -95,6 +93,8 @@ fapi2::ReturnCode p9a_mi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MI>& TGT0, l_scom_buffer.insert<4, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ENABLE_ECRESP_ON ); } + l_scom_buffer.insert<15, 10, 54, uint64_t>(literal_0b1111000000 ); + l_scom_buffer.insert<25, 7, 57, uint64_t>(literal_0b0111111 ); FAPI_TRY(fapi2::putScom(TGT0, 0x5010811ull, l_scom_buffer)); } { @@ -105,8 +105,6 @@ fapi2::ReturnCode p9a_mi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MI>& TGT0, l_scom_buffer.insert<24, 16, 48, uint64_t>(literal_0b0000000000001000 ); } - l_scom_buffer.insert<46, 4, 60, uint64_t>(l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID ); - l_scom_buffer.insert<50, 3, 61, uint64_t>(l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID ); FAPI_TRY(fapi2::putScom(TGT0, 0x5010813ull, l_scom_buffer)); } { diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C b/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C index 1bd1bd6fb..0605f9fd5 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C @@ -2206,6 +2206,15 @@ fapi2::ReturnCode writeMCBarData( // SMF if (l_data.MCFGPA_SMF_valid == true) { + FAPI_DBG("Writing SMF bit into address extension now"); + // Set up Extension Address for SMF + FAPI_TRY(fapi2::getScom(l_target.getParent<fapi2::TARGET_TYPE_MI>(), P9A_MI_MCMODE2, l_scomData), + "Error reading to P9A_MI_MCMODE2 reg"); + l_scomData.setBit<46>(); + FAPI_TRY(fapi2::putScom(l_target.getParent<fapi2::TARGET_TYPE_MI>(), P9A_MI_MCMODE2, l_scomData), + "Error writing to P9A_MI_MCMODE2 reg"); + + l_scomData = 0; // MCFGPA SMF valid (bit 0) l_scomData.setBit<P9A_MI_MCFGP0A_SMF_VALID>(); @@ -2221,11 +2230,12 @@ fapi2::ReturnCode writeMCBarData( (l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17-8) = 9 // SMF upper addr l_norAddr = 0; - l_norAddr.insertFromRight<22, 14>(l_data.MCFGPA_SMF_UPPER_addr); + l_norAddr.insertFromRight<17, 19>(l_data.MCFGPA_SMF_UPPER_addr); FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr)); l_scomData.insert<P9A_MI_MCFGP0A_SMF_UPPER_ADDRESS, P9A_MI_MCFGP0A_SMF_UPPER_ADDRESS_LEN>( - (l_extAddr << 14)); //matches 22:35 extendBarAddress shifts left 8 (22-8) = 14 + (l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17-8) = 9 + } // Write to reg @@ -2287,11 +2297,11 @@ fapi2::ReturnCode writeMCBarData( (l_extAddr << 9 )); //matches 17:35 extendBarAddress shifts left 8 (17-8) = 9 // SMF upper addr l_norAddr = 0; - l_norAddr.insertFromRight<22, 14>(l_data.MCFGPMA_SMF_UPPER_addr); + l_norAddr.insertFromRight<17, 19>(l_data.MCFGPMA_SMF_UPPER_addr); FAPI_TRY(extendBarAddress(l_ext_mask, l_norAddr, l_extAddr)); l_scomData.insert<P9A_MI_MCFGPM0A_SMF_UPPER_ADDRESS, P9A_MI_MCFGPM0A_SMF_UPPER_ADDRESS_LEN>( - (l_extAddr << 14)); //matches 22:35 extendBarAddress shifts left 8 (22-8) = 14 + (l_extAddr << 9)); //matches 17:35 extendBarAddress shifts left 8 (17-8) = 9 } // Write to reg @@ -2352,7 +2362,8 @@ fapi2::ReturnCode unmaskMCFIR(const fapi2::Target<T> i_target) } l_mcfirmask_and.clearBit<MCS_MCFIR_MC_INTERNAL_RECOVERABLE_ERROR>(); - l_mcfirmask_and.clearBit<MCS_MCFIR_MC_INTERNAL_NONRECOVERABLE_ERROR>(); + //Temporary mask to enable other teams for bringup + //l_mcfirmask_and.clearBit<MCS_MCFIR_MC_INTERNAL_NONRECOVERABLE_ERROR>(); l_mcfirmask_and.clearBit<MCS_MCFIR_POWERBUS_PROTOCOL_ERROR>(); l_mcfirmask_and.clearBit<MCS_MCFIR_MULTIPLE_BAR>(); @@ -2365,7 +2376,8 @@ fapi2::ReturnCode unmaskMCFIR(const fapi2::Target<T> i_target) if (T == fapi2::TARGET_TYPE_MI) { - l_mcfirmask_and.clearBit<MCS_MCFIR_MS_WAT_DEBUG_CONFIG_REG_ERROR>(); + //Temporary mask to enable other teams for bringup + //l_mcfirmask_and.clearBit<MCS_MCFIR_MS_WAT_DEBUG_CONFIG_REG_ERROR>(); } // Defect HW451708, HW451711 diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index b5756412b..51a045dba 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -8949,4 +8949,21 @@ </chip> </chipEcFeature> </attribute> + <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_AXONE_GEMINI_OVERRUN</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Setup Memory controller to hold back too many operations from being passed to Gemini + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> </attributes> |
