diff options
author | CamVan Nguyen <ctnguyen@us.ibm.com> | 2012-12-07 11:32:11 -0600 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2012-12-17 11:12:31 -0600 |
commit | 370e6d1251d864d40986c9bafe83b868d3b17858 (patch) | |
tree | 0afc128b2cd1b87f3ddd71a1145d9eaa21e69ddd /src | |
parent | 26b2cdf9b47f70f5df78ed96c9ffbd855fc66220 (diff) | |
download | blackbird-hostboot-370e6d1251d864d40986c9bafe83b868d3b17858.tar.gz blackbird-hostboot-370e6d1251d864d40986c9bafe83b868d3b17858.zip |
HWP Integration: mss_get_cen_ecid
Change-Id: I0d02ac1ef8e9e8cd65eaf086206dade1cd43ce38
RTC: 58012
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2713
Tested-by: Jenkins Server
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/include/usr/hwpf/istepreasoncodes.H | 1 | ||||
-rw-r--r-- | src/usr/hwpf/hwp/dmi_training/dmi_training.C | 144 | ||||
-rw-r--r-- | src/usr/hwpf/hwp/dmi_training/makefile | 5 | ||||
-rw-r--r-- | src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.C | 133 | ||||
-rw-r--r-- | src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.H | 90 |
5 files changed, 370 insertions, 3 deletions
diff --git a/src/include/usr/hwpf/istepreasoncodes.H b/src/include/usr/hwpf/istepreasoncodes.H index 3309a8b74..748a7bb94 100644 --- a/src/include/usr/hwpf/istepreasoncodes.H +++ b/src/include/usr/hwpf/istepreasoncodes.H @@ -105,6 +105,7 @@ enum istepModuleId ISTEP_PROC_CEN_SET_INBAND_ADDR = 0x38, ISTEP_MSS_THERMAL_INIT = 0x39, ISTEP_MSS_VOLT = 0x3A, + ISTEP_MSS_GETECID = 0x3B, ISTEP_MSS_DRAMINIT_TRAINADV = 0x3C, }; diff --git a/src/usr/hwpf/hwp/dmi_training/dmi_training.C b/src/usr/hwpf/hwp/dmi_training/dmi_training.C index 77adaf7f0..86091fbca 100644 --- a/src/usr/hwpf/hwp/dmi_training/dmi_training.C +++ b/src/usr/hwpf/hwp/dmi_training/dmi_training.C @@ -67,6 +67,7 @@ #include "dmi_io_run_training.H" #include "dmi_scominit.H" #include "proc_cen_set_inband_addr.H" +#include "mss_get_cen_ecid.H" namespace DMI_TRAINING { @@ -84,15 +85,153 @@ using namespace fapi; void* call_mss_getecid( void *io_pArgs ) { errlHndl_t l_err = NULL; + IStepError l_StepError; + uint8_t l_ddr_port_status = 0; + + mss_get_cen_ecid_ddr_status l_mbaBadMask[2] = + { MSS_GET_CEN_ECID_DDR_STATUS_MBA0_BAD, + MSS_GET_CEN_ECID_DDR_STATUS_MBA1_BAD }; + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_getecid entry" ); - // call mss_getecid.C + // Get all Centaur targets + TARGETING::TargetHandleList l_membufTargetList; + getAllChips(l_membufTargetList, TYPE_MEMBUF); + + for (TargetHandleList::iterator l_membuf_iter = l_membufTargetList.begin(); + l_membuf_iter != l_membufTargetList.end(); + ++l_membuf_iter) + { + // make a local copy of the target for ease of use + TARGETING::Target* l_pCentaur = *l_membuf_iter; + + // Dump current run on target + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Running mss_get_cen_ecid HWP on..." ); + + EntityPath l_path; + l_path = l_pCentaur->getAttr<ATTR_PHYS_PATH>(); + l_path.dump(); + + // Cast to a FAPI type of target. + const fapi::Target l_fapi_centaur( + TARGET_TYPE_MEMBUF_CHIP, + reinterpret_cast<void *> + (const_cast<TARGETING::Target*>(l_pCentaur)) ); + + // call the HWP with each fapi::Target + // Note: This HWP does not actually return the entire ECID data. It + // updates the attribute ATTR_MSS_ECID and returns the DDR port status + // which is a portion of the ECID data. + FAPI_INVOKE_HWP(l_err, mss_get_cen_ecid, + l_fapi_centaur, l_ddr_port_status); + + if (l_err) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: mss_get_cen_ecid HWP returns error", + l_err->reasonCode()); + + ErrlUserDetailsTarget myDetails(l_pCentaur); + + // capture the target data in the elog + myDetails.addToLog(l_err); + + /*@ + * @errortype + * @reasoncode ISTEP_DMI_TRAINING_FAILED + * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE + * @moduleid ISTEP_MSS_GETECID + * @userdata1 bytes 0-1: plid identifying first error + * bytes 2-3: reason code of first error + * @userdata2 bytes 0-1: total number of elogs included + * bytes 2-3: N/A + * @devdesc call to mss_get_cen_ecid has failed + * see error log in the user details section for + * additional details. + */ + l_StepError.addErrorDetails(ISTEP_DMI_TRAINING_FAILED, + ISTEP_MSS_GETECID, + l_err ); + + errlCommit( l_err, HWPF_COMP_ID ); + } + else if (MSS_GET_CEN_ECID_DDR_STATUS_ALL_GOOD != l_ddr_port_status) + { + // Check the DDR port status returned by mss_get_cen_ecid to + // see which MBA is bad. If the MBA's state is + // functional and the DDR port status indicates that it's bad, + // then set the MBA to nonfunctional. If the MBA's state is + // nonfunctional, then do nothing since we don't want to override + // previous settings. + + // Find the functional MBAs associated with this Centaur + PredicateCTM l_mba_pred(CLASS_UNIT,TYPE_MBA); + TARGETING::TargetHandleList l_mbaTargetList; + getChildChiplets(l_mbaTargetList, + l_pCentaur, + TYPE_MBA); + + uint8_t l_num_func_mbas = l_mbaTargetList.size(); + + for (TargetHandleList::iterator l_mba_iter = + l_mbaTargetList.begin(); + l_mba_iter != l_mbaTargetList.end(); + ++l_mba_iter) + { + // Make a local copy of the target for ease of use + TARGETING::Target* l_pMBA = *l_mba_iter; + + // Get the MBA chip unit position + uint8_t l_pos = l_pMBA->getAttr<ATTR_CHIP_UNIT>(); + + // Check the DDR port status to see if this MBA should be + // set to nonfunctional. + if ( l_ddr_port_status & l_mbaBadMask[l_pos] ) + { + // Get the mba's state + TARGETING::HwasState l_hwasState = + l_pMBA->getAttr<ATTR_HWAS_STATE>(); + + // Set to nonfunctional + l_hwasState.functional = false; + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Setting MBA%c to nonfunctional", l_pos ); + + l_pMBA->setAttr<ATTR_HWAS_STATE>(l_hwasState); + + l_num_func_mbas--; + } + } + + // If there are no functional MBAs for this Centaur, set the + // Centaur to nonfunctional as well + if (0 == l_num_func_mbas) + { + // Get the Centaur's state + TARGETING::HwasState l_hwasState = + l_pCentaur->getAttr<ATTR_HWAS_STATE>(); + + // Set to nonfunctional + l_hwasState.functional = false; + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Setting Centaur to nonfunctional" ); + + l_pCentaur->setAttr<ATTR_HWAS_STATE>(l_hwasState); + } + } + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : mss_get_cen_ecid HWP( )" ); + } TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_getecid exit" ); - return l_err; + // end task, returning any errorlogs to IStepDisp + return l_StepError.getErrorHandle(); } + // // Wrapper function to call proc_dmi_scominit // @@ -108,6 +247,7 @@ void* call_proc_dmi_scominit( void *io_pArgs ) return l_err; } + // // Wrapper function to call dmi_scominit // diff --git a/src/usr/hwpf/hwp/dmi_training/makefile b/src/usr/hwpf/hwp/dmi_training/makefile index 338efcd51..cab6a2949 100644 --- a/src/usr/hwpf/hwp/dmi_training/makefile +++ b/src/usr/hwpf/hwp/dmi_training/makefile @@ -41,17 +41,20 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dmi_training/dmi_io_run_training EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dmi_training/dmi_scominit EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dmi_training/proc_cen_set_inband_addr +EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/dmi_training/mss_getecid OBJS = dmi_training.o \ proc_cen_framelock.o \ dmi_io_run_training.o \ dmi_scominit.o \ - proc_cen_set_inband_addr.o + proc_cen_set_inband_addr.o \ + mss_get_cen_ecid.o ## NOTE: add a new directory onto the vpaths when you add a new HWP VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dmi_training/dmi_io_run_training VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dmi_training/dmi_scominit VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dmi_training/proc_cen_set_inband_addr +VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/dmi_training/mss_getecid include ${ROOTPATH}/config.mk diff --git a/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.C b/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.C new file mode 100644 index 000000000..da5b28fdf --- /dev/null +++ b/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.C @@ -0,0 +1,133 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.C $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: mss_get_cen_ecid.C,v 1.8 2012/12/10 17:49:53 lapietra Exp $ +//------------------------------------------------------------------------------ +// *| +// *! (C) Copyright International Business Machines Corp. 2012 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +// *| +// *! TITLE : mss_get_cen_ecid.C +// *! DESCRIPTION : Get ECID string from target using SCOM's +// *! +// *! OWNER NAME : Mark Bellows Email: bellows@us.ibm.com +// *! Copied From : Joe McGill's proc_cleanup code +// *! +//------------------------------------------------------------------------------ +//------------------------------------------------------------------------------ +// CHANGE HISTORY: +//------------------------------------------------------------------------------ +// Version:| Author: | Date: | Comment: +//---------|----------|---------|----------------------------------------------- +// 1.8 | sglancy |10-DEC-12| Corrected typo +// 1.7 | sglancy |6-DEC-12| Updated to coincide with firmware updates to ECID attribute +// 1.6 | sglancy |5-DEC-12| Updated to coincide with firmware change requests +// 1.5-1 | sglancy |5-DEC-12| Lost due to no update log + +//------------------------------------------------------------------------------ +// Includes +//------------------------------------------------------------------------------ +#include <fapi.H> +#include "mss_get_cen_ecid.H" + +extern "C" { + +//------------------------------------------------------------------------------ +// Function definitions +//------------------------------------------------------------------------------ + + +// HWP entry point +fapi::ReturnCode mss_get_cen_ecid( + const fapi::Target& i_target, + uint8_t & ddr_port_status + ) +{ + // return code + fapi::ReturnCode rc; + uint64_t data[2]; + // mark HWP entry + + ecmdDataBufferBase scom(64); + FAPI_IMP("Entering mss_get_cen_ecid...."); + rc = fapiGetScom( i_target, ECID_PART_0_0x00010000, scom ); + if (rc) + { + FAPI_ERR("mss_get_cen_ecid: could not read scom address 0x00010000" ); + return rc; + } + scom.reverse(); + data[0] = scom.getDoubleWord(0); + //gets the second part of the ecid and sets the attribute + rc = fapiGetScom( i_target, ECID_PART_1_0x00010001, scom ); + if (rc) + { + FAPI_ERR("mss_get_cen_ecid: could not read scom address 0x00010001" ); + return rc; + } + scom.reverse(); + data[1] = scom.getDoubleWord(0); + rc = FAPI_ATTR_SET(ATTR_MSS_ECID, &i_target, data); + if (rc) + { + FAPI_ERR("mss_get_cen_ecid: set ATTR_MSS_ECID" ); + return rc; + } + + //gets bits 113 and 114 to determine the state of the cache + uint8_t bit113_114=0; + uint32_t rc_ecmd = scom.extract(&bit113_114,48,2); + bit113_114 = bit113_114 >> 6; + uint8_t t; + if(rc_ecmd) { + FAPI_ERR("mss_get_cen_ecid: could not extract cache data" ); + rc.setEcmdError(rc_ecmd); + return rc; + } + //determines the state of the cache + if(bit113_114 == 0) t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_ON; + else if(bit113_114 == 1) t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_A; + else if(bit113_114 == 2) t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_B; + else t = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_OFF; + //sets the cache attribute and error checks + rc = FAPI_ATTR_SET(ATTR_MSS_CACHE_ENABLE, &i_target, t); + if (!rc.ok()) { + FAPI_ERR("mss_get_cen_ecid: could not set ATTR_MSS_CACHE_ENABLE" ); + return rc; + } + + //reads in the ECID info for whether a DDR port side is good or bad + rc_ecmd = scom.extract(&ddr_port_status,50,2); + ddr_port_status = ddr_port_status >> 6; + if(rc_ecmd) { + FAPI_ERR("mss_get_cen_ecid: could not extract DDR status data" ); + rc.setEcmdError(rc_ecmd); + return rc; + } + + // mark HWP exit + FAPI_IMP("Exiting mss_get_cen_ecid...."); + return rc; +} + +} // extern "C" diff --git a/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.H b/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.H new file mode 100644 index 000000000..7ac839584 --- /dev/null +++ b/src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.H @@ -0,0 +1,90 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/dmi_training/mss_getecid/mss_get_cen_ecid.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: mss_get_cen_ecid.H,v 1.4 2012/12/07 19:12:05 lapietra Exp $ +//------------------------------------------------------------------------------ +// *| +// *! (C) Copyright International Business Machines Corp. 2012 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +// *| +// *! TITLE : mss_get_cen_ecid.H +// *! DESCRIPTION : Get ECID string from target using SCOM's +// *! +// *! OWNER NAME : Mark Bellows Email: bellows@us.ibm.com +// *! Copied From : Joe McGill's proc_cleanup code +// *! +// *! ADDITIONAL COMMENTS: +// *! +// *! +//------------------------------------------------------------------------------ + +#ifndef _MSS_GET_CEN_ECID_H_ +#define _MSS_GET_CEN_ECID_H_ + +//------------------------------------------------------------------------------ +// Includes +//------------------------------------------------------------------------------ + +#include <fapi.H> +#include "cen_scom_addresses.H" + +//defines enumerators +enum mss_get_cen_ecid_ddr_status +{ + MSS_GET_CEN_ECID_DDR_STATUS_ALL_GOOD = 0, + MSS_GET_CEN_ECID_DDR_STATUS_MBA1_BAD = 1, + MSS_GET_CEN_ECID_DDR_STATUS_MBA0_BAD = 2, + MSS_GET_CEN_ECID_DDR_STATUS_ALL_BAD = 3, +}; + +//------------------------------------------------------------------------------ +// Structure definitions +//------------------------------------------------------------------------------ + +// function pointer typedef definition for HWP call support +typedef fapi::ReturnCode +(*mss_get_cen_ecid_FP_t)(const fapi::Target& i_target, uint8_t & ddr_port_status); + + +//------------------------------------------------------------------------------ +// Function prototypes +//------------------------------------------------------------------------------ + +extern "C" +{ + +// function: FAPI mss_get_cen_ecid HWP entry point +// parameters: i_target => cen chip target +// &ddr_port_status => indicates if the MBA's are bad, with MBA 1 being the rightmost bit and MBA 0 being the next to right most bit +// returns: FAPI_RC_SUCCESS if FBC stop is deasserted at end of execution +// else FAPI getscom/putscom return code for failing operation +// Updates attributes: ATTR_MSS_ECID[2] -> bits 1-64 and 65-128 of the ECID +// ATTR_MSS_CACHE_ENABLE -> Stores which parts of the eDRAM are enabled +fapi::ReturnCode mss_get_cen_ecid( + const fapi::Target& i_target, + uint8_t & ddr_port_status + ); + +} // extern "C" + +#endif // _MSS_GET_CEN_ECID_H_ |