diff options
| author | Ben Gass <bgass@us.ibm.com> | 2016-01-13 15:01:40 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-02-22 15:26:00 -0600 |
| commit | 2f46abb3479821544b5e082cc74bbec750397c35 (patch) | |
| tree | 60adc79b5b5349dda5d138dcf80ebb23ff3bd1ed /src | |
| parent | 41350563de7e45c57b2807f23a9c2c2f43896968 (diff) | |
| download | blackbird-hostboot-2f46abb3479821544b5e082cc74bbec750397c35.tar.gz blackbird-hostboot-2f46abb3479821544b5e082cc74bbec750397c35.zip | |
New scom addresses const headers for chip 9031
Fixes for mcbist
Fixes for obus
Reviewed figtree issues
Reviewed address translation
Change-Id: I86677dbf69768d725ac137e95fa1703a73f906ed
Original-Change-Id: I68a21eb34c3ef5061c5d64099f108471acf96c5e
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23283
Tested-by: Jenkins Server
Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com>
Reviewed-by: Brian Silver <bsilver@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24601
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/common/include/p9_mc_scom_addresses_fld.H | 2494 | ||||
| -rw-r--r-- | src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H | 4 |
2 files changed, 1438 insertions, 1060 deletions
diff --git a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld.H b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld.H index 9cbf34b6f..1a028a101 100644 --- a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld.H +++ b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld.H @@ -7,7 +7,7 @@ /* */ /* EKB Project */ /* */ -/* COPYRIGHT 2015 */ +/* COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -3598,27 +3598,23 @@ REG64_FLD( MCA_DDRPHY_ADR_BIT_ENABLE_P0_ADR3_23_12_15 , 60 , SH_UN REG64_FLD( MCA_DDRPHY_ADR_BIT_ENABLE_P0_ADR3_23_12_15_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_12_15_LEN ); -REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S0_ADR0_DLL_ADJUST , 48 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S0_ADR0_DLL_ADJUST , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR0_DLL_ADJUST ); -REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S0_ADR0_DLL_ADJUST_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S0_ADR0_DLL_ADJUST_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR0_DLL_ADJUST_LEN ); -REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S0_ADR0_DLL_CORRECT_EN , 56 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S0_ADR0_DLL_CORRECT_EN , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR0_DLL_CORRECT_EN ); -REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S0_ADR0_DLL_ITER_A , 57 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S0_ADR0_DLL_ITER_A , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR0_DLL_ITER_A ); -REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S0_ADR0_DLL_COMPARE_OUT , 63 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_ADR0_DLL_COMPARE_OUT ); -REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S1_ADR1_DLL_ADJUST , 48 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S1_ADR1_DLL_ADJUST , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR1_DLL_ADJUST ); -REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S1_ADR1_DLL_ADJUST_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S1_ADR1_DLL_ADJUST_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR1_DLL_ADJUST_LEN ); -REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S1_ADR1_DLL_CORRECT_EN , 56 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S1_ADR1_DLL_CORRECT_EN , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR1_DLL_CORRECT_EN ); -REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S1_ADR1_DLL_ITER_A , 57 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S1_ADR1_DLL_ITER_A , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR1_DLL_ITER_A ); -REG64_FLD( MCA_DDRPHY_ADR_DCD_CONTROL_P0_ADR32S1_ADR1_DLL_COMPARE_OUT , 63 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_ADR1_DLL_COMPARE_OUT ); REG64_FLD( MCA_DDRPHY_ADR_DELAY0_P0_ADR0_01 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01 ); @@ -4060,63 +4056,47 @@ REG64_FLD( MCA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR3_23_DI_ADR12_ADR13 , 54 , SH_U REG64_FLD( MCA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR3_23_DI_ADR14_ADR15 , 55 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_DI_ADR14_ADR15 ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR0_INIT_RXDLL_CAL_RESET ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR0_INIT_RXDLL_CAL_UPDATE ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR0_REGS_RXDLL_CAL_SKIP ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR0_REGS_RXDLL_CAL_SKIP_LEN ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR0_REGS_RXDLL_COARSE_ADJ_BY2 ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR0_RXREG_FILTER_LENGTH_DC ); REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , - SH_ACS_SCOM , SH_FLD_ADR0_RXREG_FILTER_LENGTH_DC_LEN ); + SH_ACS_SCOM_RW , SH_FLD_ADR0_RXREG_FILTER_LENGTH_DC_LEN ); REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , - SH_ACS_SCOM , SH_FLD_ADR0_RXREG_LEAD_LAG_SEPARATION_DC ); + SH_ACS_SCOM_RW , SH_FLD_ADR0_RXREG_LEAD_LAG_SEPARATION_DC ); REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_RXREG_LEAD_LAG_SEPARATION_DC_LEN , 3 , SH_UNT_MCA , - SH_ACS_SCOM , SH_FLD_ADR0_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM , + SH_ACS_SCOM_RW , SH_FLD_ADR0_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR0_EN_DRIVER_INVFB_DC ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_FRZSULV , 60 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_ADR0_FRZSULV ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_CAL_GOOD , 61 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_ADR0_CAL_GOOD ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_CAL_ERROR , 62 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_ADR0_CAL_ERROR ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S0_ADR0_CAL_ERROR_FINE , 63 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_ADR0_CAL_ERROR_FINE ); - -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM , + +REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR1_INIT_RXDLL_CAL_RESET ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR1_INIT_RXDLL_CAL_UPDATE ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR1_REGS_RXDLL_CAL_SKIP ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR1_REGS_RXDLL_CAL_SKIP_LEN ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR1_REGS_RXDLL_COARSE_ADJ_BY2 ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR1_RXREG_FILTER_LENGTH_DC ); REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , - SH_ACS_SCOM , SH_FLD_ADR1_RXREG_FILTER_LENGTH_DC_LEN ); + SH_ACS_SCOM_RW , SH_FLD_ADR1_RXREG_FILTER_LENGTH_DC_LEN ); REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , - SH_ACS_SCOM , SH_FLD_ADR1_RXREG_LEAD_LAG_SEPARATION_DC ); + SH_ACS_SCOM_RW , SH_FLD_ADR1_RXREG_LEAD_LAG_SEPARATION_DC ); REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_RXREG_LEAD_LAG_SEPARATION_DC_LEN , 3 , SH_UNT_MCA , - SH_ACS_SCOM , SH_FLD_ADR1_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM , + SH_ACS_SCOM_RW , SH_FLD_ADR1_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR1_EN_DRIVER_INVFB_DC ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_FRZSULV , 60 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_ADR1_FRZSULV ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_CAL_GOOD , 61 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_ADR1_CAL_GOOD ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_CAL_ERROR , 62 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_ADR1_CAL_ERROR ); -REG64_FLD( MCA_DDRPHY_ADR_DLL_CNTL_P0_ADR32S1_ADR1_CAL_ERROR_FINE , 63 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_ADR1_CAL_ERROR_FINE ); REG64_FLD( MCA_DDRPHY_ADR_DLL_DAC_LOWER_P0_ADR32S0_ADR0_REGS_RXDLL_VREG , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR0_REGS_RXDLL_VREG ); @@ -4138,6 +4118,76 @@ REG64_FLD( MCA_DDRPHY_ADR_DLL_DAC_UPPER_P0_ADR32S1_ADR1_REGS_RXDLL_VREG , 48 , REG64_FLD( MCA_DDRPHY_ADR_DLL_DAC_UPPER_P0_ADR32S1_ADR1_REGS_RXDLL_VREG_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR1_REGS_RXDLL_VREG_LEN ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SLAVE_VREG_LOWER_P0_ADR32S0_ADR0 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ADR0 ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SLAVE_VREG_LOWER_P0_ADR32S0_ADR0_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ADR0_LEN ); + +REG64_FLD( MCA_DDRPHY_ADR_DLL_SLAVE_VREG_LOWER_P0_ADR32S1_ADR1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ADR1 ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SLAVE_VREG_LOWER_P0_ADR32S1_ADR1_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ADR1_LEN ); + +REG64_FLD( MCA_DDRPHY_ADR_DLL_SLAVE_VREG_UPPER_P0_ADR32S0_ADR0 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ADR0 ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SLAVE_VREG_UPPER_P0_ADR32S0_ADR0_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ADR0_LEN ); + +REG64_FLD( MCA_DDRPHY_ADR_DLL_SLAVE_VREG_UPPER_P0_ADR32S1_ADR1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ADR1 ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SLAVE_VREG_UPPER_P0_ADR32S1_ADR1_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ADR1_LEN ); + +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S0_ADR0_OVERRIDE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ADR0_OVERRIDE ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S0_ADR0_CAL_PD_ENABLE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ADR0_CAL_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S0_ADR0_MAIN_PD_ENABLE , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ADR0_MAIN_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S0_ADR0_DETECT_REQ , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ADR0_DETECT_REQ ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S0_ADR0_SLAVE_CAL_CKT_POWERDOWN , 52 , SH_UNT_MCA , + SH_ACS_SCOM_RW , SH_FLD_ADR0_SLAVE_CAL_CKT_POWERDOWN ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S0_ADR0_VREG_RXCAL_COMP_OUT_META , 56 , SH_UNT_MCA , + SH_ACS_SCOM_RW , SH_FLD_ADR0_VREG_RXCAL_COMP_OUT_META ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S0_ADR0_RXCAL_DETECT_DONE_META , 57 , SH_UNT_MCA , + SH_ACS_SCOM_RW , SH_FLD_ADR0_RXCAL_DETECT_DONE_META ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S0_ADR0_RXCAL_PD_CAL_LAG_META , 58 , SH_UNT_MCA , + SH_ACS_SCOM_RW , SH_FLD_ADR0_RXCAL_PD_CAL_LAG_META ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S0_ADR0_RXCAL_PD_MAIN_LEAD_META , 59 , SH_UNT_MCA , + SH_ACS_SCOM_RW , SH_FLD_ADR0_RXCAL_PD_MAIN_LEAD_META ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S0_ADR0_RXCAL_PD_MAIN_LAG_META , 60 , SH_UNT_MCA , + SH_ACS_SCOM_RW , SH_FLD_ADR0_RXCAL_PD_MAIN_LAG_META ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S0_ADR0_VREG_SLAVE1_COMP_OUT , 61 , SH_UNT_MCA , + SH_ACS_SCOM_RW , SH_FLD_ADR0_VREG_SLAVE1_COMP_OUT ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S0_ADR0_VREG_SLAVE2_COMP_OUT , 62 , SH_UNT_MCA , + SH_ACS_SCOM_RW , SH_FLD_ADR0_VREG_SLAVE2_COMP_OUT ); + +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S1_ADR1_OVERRIDE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ADR1_OVERRIDE ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S1_ADR1_CAL_PD_ENABLE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ADR1_CAL_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S1_ADR1_MAIN_PD_ENABLE , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ADR1_MAIN_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S1_ADR1_DETECT_REQ , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ADR1_DETECT_REQ ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S1_ADR1_SLAVE_CAL_CKT_POWERDOWN , 52 , SH_UNT_MCA , + SH_ACS_SCOM_RW , SH_FLD_ADR1_SLAVE_CAL_CKT_POWERDOWN ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S1_ADR1_VREG_RXCAL_COMP_OUT_META , 56 , SH_UNT_MCA , + SH_ACS_SCOM_RW , SH_FLD_ADR1_VREG_RXCAL_COMP_OUT_META ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S1_ADR1_RXCAL_DETECT_DONE_META , 57 , SH_UNT_MCA , + SH_ACS_SCOM_RW , SH_FLD_ADR1_RXCAL_DETECT_DONE_META ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S1_ADR1_RXCAL_PD_CAL_LAG_META , 58 , SH_UNT_MCA , + SH_ACS_SCOM_RW , SH_FLD_ADR1_RXCAL_PD_CAL_LAG_META ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S1_ADR1_RXCAL_PD_MAIN_LEAD_META , 59 , SH_UNT_MCA , + SH_ACS_SCOM_RW , SH_FLD_ADR1_RXCAL_PD_MAIN_LEAD_META ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S1_ADR1_RXCAL_PD_MAIN_LAG_META , 60 , SH_UNT_MCA , + SH_ACS_SCOM_RW , SH_FLD_ADR1_RXCAL_PD_MAIN_LAG_META ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S1_ADR1_VREG_SLAVE1_COMP_OUT , 61 , SH_UNT_MCA , + SH_ACS_SCOM_RW , SH_FLD_ADR1_VREG_SLAVE1_COMP_OUT ); +REG64_FLD( MCA_DDRPHY_ADR_DLL_SW_CONTROL_P0_ADR32S1_ADR1_VREG_SLAVE2_COMP_OUT , 62 , SH_UNT_MCA , + SH_ACS_SCOM_RW , SH_FLD_ADR1_VREG_SLAVE2_COMP_OUT ); + REG64_FLD( MCA_DDRPHY_ADR_DLL_VREG_COARSE_P0_ADR32S0_ADR0_REGS_RXDLL_EN , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADR0_REGS_RXDLL_EN ); REG64_FLD( MCA_DDRPHY_ADR_DLL_VREG_COARSE_P0_ADR32S0_ADR0_REGS_RXDLL_EN_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -4959,6 +5009,8 @@ REG64_FLD( MCA_DDRPHY_APB_CONFIG0_P0_DEBUG_BUS_SEL2_LEN , 4 , SH_UN SH_FLD_DEBUG_BUS_SEL2_LEN ); REG64_FLD( MCA_DDRPHY_APB_CONFIG0_P0_LOW_PROBE_TRACE_GATE , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_LOW_PROBE_TRACE_GATE ); +REG64_FLD( MCA_DDRPHY_APB_CONFIG0_P0_HS_PROBE_TOP_SEL , 62 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_HS_PROBE_TOP_SEL ); REG64_FLD( MCA_DDRPHY_APB_ERROR_MASK0_P0_INVALID_ADDRESS_MASK , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_INVALID_ADDRESS_MASK ); @@ -4986,10 +5038,6 @@ REG64_FLD( MCA_DDRPHY_APB_FIR_ERR0_P0_ERR_FSM_DP16 , 54 , SH_UN SH_FLD_ERR_FSM_DP16 ); REG64_FLD( MCA_DDRPHY_APB_FIR_ERR0_P0_ERR_FSM_DP16_LEN , 5 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_ERR_FSM_DP16_LEN ); -REG64_FLD( MCA_DDRPHY_APB_FIR_ERR0_P0_ERR_REG_DP16 , 59 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_ERR_REG_DP16 ); -REG64_FLD( MCA_DDRPHY_APB_FIR_ERR0_P0_ERR_REG_DP16_LEN , 5 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_ERR_REG_DP16_LEN ); REG64_FLD( MCA_DDRPHY_APB_FIR_ERR1_P0_PC_ERR_STATUS0 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_PC_ERR_STATUS0 ); @@ -5000,406 +5048,427 @@ REG64_FLD( MCA_DDRPHY_APB_FIR_ERR1_P0_PC_INIT_CAL_ERR , 53 , SH_UN REG64_FLD( MCA_DDRPHY_APB_FIR_ERR1_P0_PC_INIT_CAL_ERR_LEN , 11 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_PC_INIT_CAL_ERR_LEN ); -REG64_FLD( MCA_DDRPHY_APB_FIR_ERR2_P0_NRE_ERR_REG_DP16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_NRE_ERR_REG_DP16 ); -REG64_FLD( MCA_DDRPHY_APB_FIR_ERR2_P0_NRE_ERR_REG_DP16_LEN , 5 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_NRE_ERR_REG_DP16_LEN ); - -REG64_FLD( MCA_DDRPHY_APB_LO_PROBE_SEL_P0_RESET_0 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_APB_FIR_ERR2_P0_ERR0_REG_DP16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_ERR0_REG_DP16 ); +REG64_FLD( MCA_DDRPHY_APB_FIR_ERR2_P0_ERR0_REG_DP16_LEN , 5 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_ERR0_REG_DP16_LEN ); +REG64_FLD( MCA_DDRPHY_APB_FIR_ERR2_P0_ERR1_REG_DP16 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_ERR1_REG_DP16 ); +REG64_FLD( MCA_DDRPHY_APB_FIR_ERR2_P0_ERR1_REG_DP16_LEN , 5 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_ERR1_REG_DP16_LEN ); +REG64_FLD( MCA_DDRPHY_APB_FIR_ERR2_P0_REG_DP16 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_REG_DP16 ); +REG64_FLD( MCA_DDRPHY_APB_FIR_ERR2_P0_REG_DP16_LEN , 5 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_REG_DP16_LEN ); + +REG64_FLD( MCA_DDRPHY_APB_FIR_ERR3_P0_REG_DP16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_REG_DP16 ); +REG64_FLD( MCA_DDRPHY_APB_FIR_ERR3_P0_REG_DP16_LEN , 5 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_REG_DP16_LEN ); +REG64_FLD( MCA_DDRPHY_APB_FIR_ERR3_P0_ERR4_REG_DP16 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_ERR4_REG_DP16 ); +REG64_FLD( MCA_DDRPHY_APB_FIR_ERR3_P0_ERR4_REG_DP16_LEN , 5 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_ERR4_REG_DP16_LEN ); +REG64_FLD( MCA_DDRPHY_APB_FIR_ERR3_P0_ERR5_REG_DP16 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_ERR5_REG_DP16 ); +REG64_FLD( MCA_DDRPHY_APB_FIR_ERR3_P0_ERR5_REG_DP16_LEN , 5 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_ERR5_REG_DP16_LEN ); + +REG64_FLD( MCA_DDRPHY_APB_LO_PROBE_SEL_P0_RESET_0 , 48 , SH_UNT_MCA , SH_ACS_SCOM , SH_FLD_RESET_0 ); -REG64_FLD( MCA_DDRPHY_APB_LO_PROBE_SEL_P0_HOLD_0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_APB_LO_PROBE_SEL_P0_HOLD_0 , 49 , SH_UNT_MCA , SH_ACS_SCOM , SH_FLD_HOLD_0 ); -REG64_FLD( MCA_DDRPHY_APB_LO_PROBE_SEL_P0_0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_APB_LO_PROBE_SEL_P0_0 , 50 , SH_UNT_MCA , SH_ACS_SCOM , SH_FLD_0 ); -REG64_FLD( MCA_DDRPHY_APB_LO_PROBE_SEL_P0_0_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_APB_LO_PROBE_SEL_P0_0_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM , SH_FLD_0_LEN ); -REG64_FLD( MCA_DDRPHY_APB_LO_PROBE_SEL_P0_RESET_1 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_APB_LO_PROBE_SEL_P0_RESET_1 , 56 , SH_UNT_MCA , SH_ACS_SCOM , SH_FLD_RESET_1 ); -REG64_FLD( MCA_DDRPHY_APB_LO_PROBE_SEL_P0_HOLD_1 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_APB_LO_PROBE_SEL_P0_HOLD_1 , 57 , SH_UNT_MCA , SH_ACS_SCOM , SH_FLD_HOLD_1 ); -REG64_FLD( MCA_DDRPHY_APB_LO_PROBE_SEL_P0_1 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_APB_LO_PROBE_SEL_P0_1 , 58 , SH_UNT_MCA , SH_ACS_SCOM , SH_FLD_1 ); -REG64_FLD( MCA_DDRPHY_APB_LO_PROBE_SEL_P0_1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_APB_LO_PROBE_SEL_P0_1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM , SH_FLD_1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_0_01_S0ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_0_01_S0ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S0ACENSLICENDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_0_01_S0ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_0_01_S0ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S0ACENSLICENDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_0_01_S0ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_0_01_S0ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S0ACENSLICEPDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_0_01_S0ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_0_01_S0ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S0ACENSLICEPDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_0_01_S0ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_0_01_S0ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S0ACENSLICEPTERM_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_0_01_S0ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_0_01_S0ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S0ACENSLICEPTERM_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_1_01_S0ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_1_01_S0ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S0ACENSLICENDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_1_01_S0ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_1_01_S0ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S0ACENSLICENDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_1_01_S0ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_1_01_S0ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S0ACENSLICEPDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_1_01_S0ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_1_01_S0ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S0ACENSLICEPDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_1_01_S0ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_1_01_S0ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S0ACENSLICEPTERM_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_1_01_S0ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_1_01_S0ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S0ACENSLICEPTERM_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_2_23_S0ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_2_23_S0ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S0ACENSLICENDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_2_23_S0ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_2_23_S0ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S0ACENSLICENDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_2_23_S0ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_2_23_S0ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S0ACENSLICEPDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_2_23_S0ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_2_23_S0ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S0ACENSLICEPDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_2_23_S0ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_2_23_S0ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S0ACENSLICEPTERM_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_2_23_S0ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_2_23_S0ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S0ACENSLICEPTERM_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_3_23_S0ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_3_23_S0ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S0ACENSLICENDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_3_23_S0ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_3_23_S0ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S0ACENSLICENDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_3_23_S0ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_3_23_S0ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S0ACENSLICEPDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_3_23_S0ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_3_23_S0ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S0ACENSLICEPDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_3_23_S0ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_3_23_S0ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S0ACENSLICEPTERM_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_3_23_S0ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_3_23_S0ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S0ACENSLICEPTERM_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_4_4_S0ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_4_4_S0ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_S0ACENSLICENDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_4_4_S0ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_4_4_S0ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_S0ACENSLICENDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_4_4_S0ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_4_4_S0ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_S0ACENSLICEPDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_4_4_S0ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_4_4_S0ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_S0ACENSLICEPDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_4_4_S0ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_4_4_S0ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_S0ACENSLICEPTERM_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_4_4_S0ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_4_4_S0ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_S0ACENSLICEPTERM_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_0_01_S1ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_0_01_S1ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S1ACENSLICENDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_0_01_S1ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_0_01_S1ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S1ACENSLICENDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_0_01_S1ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_0_01_S1ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S1ACENSLICEPDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_0_01_S1ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_0_01_S1ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S1ACENSLICEPDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_0_01_S1ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_0_01_S1ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S1ACENSLICEPTERM_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_0_01_S1ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_0_01_S1ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S1ACENSLICEPTERM_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_1_01_S1ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_1_01_S1ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S1ACENSLICENDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_1_01_S1ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_1_01_S1ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S1ACENSLICENDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_1_01_S1ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_1_01_S1ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S1ACENSLICEPDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_1_01_S1ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_1_01_S1ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S1ACENSLICEPDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_1_01_S1ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_1_01_S1ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S1ACENSLICEPTERM_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_1_01_S1ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_1_01_S1ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_S1ACENSLICEPTERM_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_2_23_S1ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_2_23_S1ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S1ACENSLICENDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_2_23_S1ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_2_23_S1ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S1ACENSLICENDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_2_23_S1ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_2_23_S1ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S1ACENSLICEPDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_2_23_S1ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_2_23_S1ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S1ACENSLICEPDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_2_23_S1ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_2_23_S1ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S1ACENSLICEPTERM_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_2_23_S1ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_2_23_S1ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S1ACENSLICEPTERM_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_3_23_S1ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_3_23_S1ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S1ACENSLICENDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_3_23_S1ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_3_23_S1ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S1ACENSLICENDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_3_23_S1ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_3_23_S1ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S1ACENSLICEPDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_3_23_S1ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_3_23_S1ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S1ACENSLICEPDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_3_23_S1ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_3_23_S1ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S1ACENSLICEPTERM_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_3_23_S1ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_3_23_S1ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_S1ACENSLICEPTERM_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_4_4_S1ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_4_4_S1ACENSLICENDRV_DC , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_S1ACENSLICENDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_4_4_S1ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_4_4_S1ACENSLICENDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_S1ACENSLICENDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_4_4_S1ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_4_4_S1ACENSLICEPDRV_DC , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_S1ACENSLICEPDRV_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_4_4_S1ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_4_4_S1ACENSLICEPDRV_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_S1ACENSLICEPDRV_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_4_4_S1ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_4_4_S1ACENSLICEPTERM_DC , 54 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_S1ACENSLICEPTERM_DC ); -REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_4_4_S1ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE1_P0_4_4_S1ACENSLICEPTERM_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_S1ACENSLICEPTERM_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_2_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_2_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_2_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_2_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_2_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_2_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RESERVED_50_52 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RESERVED_50_52_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_2_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_2_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_2_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_2_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_2_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_2_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_1_3_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_1_3_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_1_3_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_1_3_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_1_3_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_1_3_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RESERVED_58_60 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RESERVED_58_60_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_1_3_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_1_3_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_1_3_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_1_3_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_1_3_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_1_3_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_NIB_0_2_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_NIB_0_2_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_0_2_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_NIB_0_2_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_NIB_0_2_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_0_2_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RESERVED_50_52 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RESERVED_50_52_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_NIB_0_2_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_NIB_0_2_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_0_2_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_NIB_0_2_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_NIB_0_2_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_0_2_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_NIB_3_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_NIB_3_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_3_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_NIB_3_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_NIB_3_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_3_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RESERVED_58_60 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RESERVED_58_60_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_NIB_3_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_NIB_3_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_3_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_NIB_3_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_1_01_NIB_3_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_3_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_NIB_0_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_NIB_0_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_0_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_NIB_0_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_NIB_0_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_0_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RESERVED_50_52 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RESERVED_50_52_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_NIB_0_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_NIB_0_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_0_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_NIB_0_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_NIB_0_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_0_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_NIB_1_3_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_NIB_1_3_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_1_3_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_NIB_1_3_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_NIB_1_3_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_1_3_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RESERVED_58_60 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RESERVED_58_60_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_NIB_1_3_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_NIB_1_3_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_1_3_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_NIB_1_3_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_2_23_NIB_1_3_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_1_3_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_NIB_0_2_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_NIB_0_2_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_0_2_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_NIB_0_2_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_NIB_0_2_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_0_2_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RESERVED_50_52 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RESERVED_50_52_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_NIB_0_2_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_NIB_0_2_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_0_2_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_NIB_0_2_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_NIB_0_2_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_0_2_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_NIB_1_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_NIB_1_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_1_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_NIB_1_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_NIB_1_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_1_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RESERVED_58_60 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RESERVED_58_60_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_NIB_1_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_NIB_1_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_1_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_NIB_1_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_3_23_NIB_1_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_1_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_NIB_0_2_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_NIB_0_2_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB_0_2_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_NIB_0_2_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_NIB_0_2_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB_0_2_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RESERVED_50_52 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RESERVED_50_52_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_NIB_0_2_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_NIB_0_2_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB_0_2_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_NIB_0_2_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_NIB_0_2_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB_0_2_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_NIB_1_3_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_NIB_1_3_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB_1_3_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_NIB_1_3_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_NIB_1_3_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB_1_3_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RESERVED_58_60 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RESERVED_58_60_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_NIB_1_3_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_NIB_1_3_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB_1_3_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_NIB_1_3_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_4_4_NIB_1_3_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB_1_3_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_NIB_2_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_NIB_2_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_2_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_NIB_2_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_NIB_2_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_2_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RESERVED_50_52 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RESERVED_50_52_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_NIB_2_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_NIB_2_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_2_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_NIB_2_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_NIB_2_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_2_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_NIB_1_3_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_NIB_1_3_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_1_3_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_NIB_1_3_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_NIB_1_3_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_1_3_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RESERVED_58_60 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RESERVED_58_60_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_NIB_1_3_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_NIB_1_3_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_1_3_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_NIB_1_3_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_0_01_NIB_1_3_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_1_3_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_NIB_0_2_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_NIB_0_2_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_0_2_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_NIB_0_2_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_NIB_0_2_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_0_2_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RESERVED_50_52 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RESERVED_50_52_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_NIB_0_2_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_NIB_0_2_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_0_2_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_NIB_0_2_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_NIB_0_2_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_0_2_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_NIB_3_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_NIB_3_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_3_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_NIB_3_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_NIB_3_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_3_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RESERVED_58_60 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RESERVED_58_60_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_NIB_3_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_NIB_3_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_3_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_NIB_3_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_1_01_NIB_3_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB_3_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_NIB_0_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_NIB_0_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_0_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_NIB_0_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_NIB_0_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_0_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RESERVED_50_52 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RESERVED_50_52_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_NIB_0_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_NIB_0_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_0_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_NIB_0_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_NIB_0_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_0_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_NIB_1_3_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_NIB_1_3_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_1_3_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_NIB_1_3_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_NIB_1_3_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_1_3_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RESERVED_58_60 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RESERVED_58_60_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_NIB_1_3_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_NIB_1_3_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_1_3_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_NIB_1_3_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_2_23_NIB_1_3_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_1_3_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_NIB_0_2_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_NIB_0_2_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_0_2_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_NIB_0_2_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_NIB_0_2_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_0_2_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RESERVED_50_52 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RESERVED_50_52_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_NIB_0_2_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_NIB_0_2_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_0_2_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_NIB_0_2_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_NIB_0_2_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_0_2_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_NIB_1_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_NIB_1_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_1_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_NIB_1_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_NIB_1_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_1_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RESERVED_58_60 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RESERVED_58_60_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_NIB_1_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_NIB_1_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_1_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_NIB_1_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_3_23_NIB_1_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB_1_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_NIB_0_2_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_NIB_0_2_DQSEL_CAP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB_0_2_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_NIB_0_2_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_NIB_0_2_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB_0_2_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_RESERVED_50_52 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RESERVED_50_52 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_RESERVED_50_52_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RESERVED_50_52_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_NIB_0_2_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_NIB_0_2_DQSEL_RES , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB_0_2_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_NIB_0_2_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_NIB_0_2_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB_0_2_DQSEL_RES_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_NIB_1_3_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_NIB_1_3_DQSEL_CAP , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB_1_3_DQSEL_CAP ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_NIB_1_3_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_NIB_1_3_DQSEL_CAP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB_1_3_DQSEL_CAP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_RESERVED_58_60 , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RESERVED_58_60 ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_RESERVED_58_60_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RESERVED_58_60_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_NIB_1_3_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_NIB_1_3_DQSEL_RES , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB_1_3_DQSEL_RES ); -REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_NIB_1_3_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_CTLE_CTL_BYTE1_P0_4_4_NIB_1_3_DQSEL_RES_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB_1_3_DQSEL_RES_LEN ); REG64_FLD( MCA_DDRPHY_DP16_DATA_BIT_DIR0_P0_0_01_DIR_15 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -5870,8 +5939,6 @@ REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_0_01_DLL_CORRECT_EN , 56 , SH_UN SH_FLD_01_DLL_CORRECT_EN ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_0_01_DLL_ITER_A , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_DLL_ITER_A ); -REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_0_01_DLL_COMPARE_OUT , 63 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_DLL_COMPARE_OUT ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_1_01_DLL_ADJUST , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_DLL_ADJUST ); @@ -5881,8 +5948,6 @@ REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_1_01_DLL_CORRECT_EN , 56 , SH_UN SH_FLD_01_DLL_CORRECT_EN ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_1_01_DLL_ITER_A , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_DLL_ITER_A ); -REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_1_01_DLL_COMPARE_OUT , 63 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_DLL_COMPARE_OUT ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_2_23_DLL_ADJUST , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_DLL_ADJUST ); @@ -5892,8 +5957,6 @@ REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_2_23_DLL_CORRECT_EN , 56 , SH_UN SH_FLD_23_DLL_CORRECT_EN ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_2_23_DLL_ITER_A , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_DLL_ITER_A ); -REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_2_23_DLL_COMPARE_OUT , 63 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_DLL_COMPARE_OUT ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_3_23_DLL_ADJUST , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_DLL_ADJUST ); @@ -5903,8 +5966,6 @@ REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_3_23_DLL_CORRECT_EN , 56 , SH_UN SH_FLD_23_DLL_CORRECT_EN ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_3_23_DLL_ITER_A , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_DLL_ITER_A ); -REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_3_23_DLL_COMPARE_OUT , 63 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_DLL_COMPARE_OUT ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_4_4_DLL_ADJUST , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_DLL_ADJUST ); @@ -5914,8 +5975,6 @@ REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_4_4_DLL_CORRECT_EN , 56 , SH_UN SH_FLD_4_DLL_CORRECT_EN ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_4_4_DLL_ITER_A , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_DLL_ITER_A ); -REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL0_P0_4_4_DLL_COMPARE_OUT , 63 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_DLL_COMPARE_OUT ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_0_01_DLL_ADJUST , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_DLL_ADJUST ); @@ -5925,8 +5984,6 @@ REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_0_01_DLL_CORRECT_EN , 56 , SH_UN SH_FLD_01_DLL_CORRECT_EN ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_0_01_DLL_ITER_A , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_DLL_ITER_A ); -REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_0_01_DLL_COMPARE_OUT , 63 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_DLL_COMPARE_OUT ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_1_01_DLL_ADJUST , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_DLL_ADJUST ); @@ -5936,8 +5993,6 @@ REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_1_01_DLL_CORRECT_EN , 56 , SH_UN SH_FLD_01_DLL_CORRECT_EN ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_1_01_DLL_ITER_A , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_DLL_ITER_A ); -REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_1_01_DLL_COMPARE_OUT , 63 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_DLL_COMPARE_OUT ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_2_23_DLL_ADJUST , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_DLL_ADJUST ); @@ -5947,8 +6002,6 @@ REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_2_23_DLL_CORRECT_EN , 56 , SH_UN SH_FLD_23_DLL_CORRECT_EN ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_2_23_DLL_ITER_A , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_DLL_ITER_A ); -REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_2_23_DLL_COMPARE_OUT , 63 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_DLL_COMPARE_OUT ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_3_23_DLL_ADJUST , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_DLL_ADJUST ); @@ -5958,8 +6011,6 @@ REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_3_23_DLL_CORRECT_EN , 56 , SH_UN SH_FLD_23_DLL_CORRECT_EN ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_3_23_DLL_ITER_A , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_DLL_ITER_A ); -REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_3_23_DLL_COMPARE_OUT , 63 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_DLL_COMPARE_OUT ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_4_4_DLL_ADJUST , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_DLL_ADJUST ); @@ -5969,8 +6020,6 @@ REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_4_4_DLL_CORRECT_EN , 56 , SH_UN SH_FLD_4_DLL_CORRECT_EN ); REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_4_4_DLL_ITER_A , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_DLL_ITER_A ); -REG64_FLD( MCA_DDRPHY_DP16_DCD_CONTROL1_P0_4_4_DLL_COMPARE_OUT , 63 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_DLL_COMPARE_OUT ); REG64_FLD( MCA_DDRPHY_DP16_DEBUG_SEL_P0_0_01_HS_PROBE_A , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_HS_PROBE_A ); @@ -6132,10 +6181,6 @@ REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_0_01_CNTL_POL , 51 , SH_UN SH_FLD_01_CNTL_POL ); REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_0_01_CNTL_SRC , 55 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_CNTL_SRC ); -REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_0_01_RESERVED_56_63 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_RESERVED_56_63 ); -REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_0_01_RESERVED_56_63_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_RESERVED_56_63_LEN ); REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_1_01_DIGITAL_EN , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_DIGITAL_EN ); @@ -6147,10 +6192,6 @@ REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_1_01_CNTL_POL , 51 , SH_UN SH_FLD_01_CNTL_POL ); REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_1_01_CNTL_SRC , 55 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_CNTL_SRC ); -REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_1_01_RESERVED_56_63 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_RESERVED_56_63 ); -REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_1_01_RESERVED_56_63_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_RESERVED_56_63_LEN ); REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_2_23_DIGITAL_EN , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_DIGITAL_EN ); @@ -6162,10 +6203,6 @@ REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_2_23_CNTL_POL , 51 , SH_UN SH_FLD_23_CNTL_POL ); REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_2_23_CNTL_SRC , 55 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_CNTL_SRC ); -REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_2_23_RESERVED_56_63 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_RESERVED_56_63 ); -REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_2_23_RESERVED_56_63_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_RESERVED_56_63_LEN ); REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_3_23_DIGITAL_EN , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_DIGITAL_EN ); @@ -6177,10 +6214,6 @@ REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_3_23_CNTL_POL , 51 , SH_UN SH_FLD_23_CNTL_POL ); REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_3_23_CNTL_SRC , 55 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_CNTL_SRC ); -REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_3_23_RESERVED_56_63 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_RESERVED_56_63 ); -REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_3_23_RESERVED_56_63_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_RESERVED_56_63_LEN ); REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_4_4_DIGITAL_EN , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_DIGITAL_EN ); @@ -6192,10 +6225,6 @@ REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_4_4_CNTL_POL , 51 , SH_UN SH_FLD_4_CNTL_POL ); REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_4_4_CNTL_SRC , 55 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_CNTL_SRC ); -REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_4_4_RESERVED_56_63 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_RESERVED_56_63 ); -REG64_FLD( MCA_DDRPHY_DP16_DFT_DIG_EYE_P0_4_4_RESERVED_56_63_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_RESERVED_56_63_LEN ); REG64_FLD( MCA_DDRPHY_DP16_DFT_WRAP_STATUS_P0_0_01_CHECKER_ENABLE , 48 , SH_UNT_MCA , SH_ACS_SCOM , SH_FLD_01_CHECKER_ENABLE ); @@ -6262,295 +6291,215 @@ REG64_FLD( MCA_DDRPHY_DP16_DFT_WRAP_STATUS_P0_4_4_ERROR , 58 , SH_UN REG64_FLD( MCA_DDRPHY_DP16_DFT_WRAP_STATUS_P0_4_4_ERROR_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM , SH_FLD_4_ERROR_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_INIT_RXDLL_CAL_RESET ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_INIT_RXDLL_CAL_UPDATE ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_REGS_RXDLL_CAL_SKIP ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_REGS_RXDLL_CAL_SKIP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_REGS_RXDLL_COARSE_ADJ_BY2 ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RXREG_FILTER_LENGTH_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RXREG_FILTER_LENGTH_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RXREG_LEAD_LAG_SEPARATION_DC ); REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_RXREG_LEAD_LAG_SEPARATION_DC_LEN , 3 , SH_UNT_MCA , - SH_ACS_SCOM , SH_FLD_01_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM , + SH_ACS_SCOM_RW , SH_FLD_01_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_EN_DRIVER_INVFB_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_FRZSULV , 60 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_01_FRZSULV ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_CAL_GOOD , 61 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_01_CAL_GOOD ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_CAL_ERROR , 62 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_01_CAL_ERROR ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_0_01_CAL_ERROR_FINE , 63 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_01_CAL_ERROR_FINE ); - -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM , + +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_INIT_RXDLL_CAL_RESET ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_INIT_RXDLL_CAL_UPDATE ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_REGS_RXDLL_CAL_SKIP ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_REGS_RXDLL_CAL_SKIP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_REGS_RXDLL_COARSE_ADJ_BY2 ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RXREG_FILTER_LENGTH_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RXREG_FILTER_LENGTH_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RXREG_LEAD_LAG_SEPARATION_DC ); REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_RXREG_LEAD_LAG_SEPARATION_DC_LEN , 3 , SH_UNT_MCA , - SH_ACS_SCOM , SH_FLD_01_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM , + SH_ACS_SCOM_RW , SH_FLD_01_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_EN_DRIVER_INVFB_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_FRZSULV , 60 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_01_FRZSULV ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_CAL_GOOD , 61 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_01_CAL_GOOD ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_CAL_ERROR , 62 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_01_CAL_ERROR ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_1_01_CAL_ERROR_FINE , 63 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_01_CAL_ERROR_FINE ); - -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM , + +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_INIT_RXDLL_CAL_RESET ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_INIT_RXDLL_CAL_UPDATE ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_REGS_RXDLL_CAL_SKIP ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_REGS_RXDLL_CAL_SKIP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_REGS_RXDLL_COARSE_ADJ_BY2 ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RXREG_FILTER_LENGTH_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RXREG_FILTER_LENGTH_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RXREG_LEAD_LAG_SEPARATION_DC ); REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_RXREG_LEAD_LAG_SEPARATION_DC_LEN , 3 , SH_UNT_MCA , - SH_ACS_SCOM , SH_FLD_23_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM , + SH_ACS_SCOM_RW , SH_FLD_23_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_EN_DRIVER_INVFB_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_FRZSULV , 60 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_23_FRZSULV ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_CAL_GOOD , 61 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_23_CAL_GOOD ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_CAL_ERROR , 62 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_23_CAL_ERROR ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_2_23_CAL_ERROR_FINE , 63 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_23_CAL_ERROR_FINE ); - -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM , + +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_INIT_RXDLL_CAL_RESET ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_INIT_RXDLL_CAL_UPDATE ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_REGS_RXDLL_CAL_SKIP ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_REGS_RXDLL_CAL_SKIP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_REGS_RXDLL_COARSE_ADJ_BY2 ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RXREG_FILTER_LENGTH_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RXREG_FILTER_LENGTH_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RXREG_LEAD_LAG_SEPARATION_DC ); REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_RXREG_LEAD_LAG_SEPARATION_DC_LEN , 3 , SH_UNT_MCA , - SH_ACS_SCOM , SH_FLD_23_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM , + SH_ACS_SCOM_RW , SH_FLD_23_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_EN_DRIVER_INVFB_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_FRZSULV , 60 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_23_FRZSULV ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_CAL_GOOD , 61 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_23_CAL_GOOD ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_CAL_ERROR , 62 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_23_CAL_ERROR ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_3_23_CAL_ERROR_FINE , 63 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_23_CAL_ERROR_FINE ); - -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM , + +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_INIT_RXDLL_CAL_RESET ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_INIT_RXDLL_CAL_UPDATE ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_REGS_RXDLL_CAL_SKIP ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_REGS_RXDLL_CAL_SKIP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_REGS_RXDLL_COARSE_ADJ_BY2 ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RXREG_FILTER_LENGTH_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RXREG_FILTER_LENGTH_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RXREG_LEAD_LAG_SEPARATION_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_RXREG_LEAD_LAG_SEPARATION_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_RXREG_LEAD_LAG_SEPARATION_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_EN_DRIVER_INVFB_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_FRZSULV , 60 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_4_FRZSULV ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_CAL_GOOD , 61 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_4_CAL_GOOD ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_CAL_ERROR , 62 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_4_CAL_ERROR ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL0_P0_4_4_CAL_ERROR_FINE , 63 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_4_CAL_ERROR_FINE ); - -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM , + +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_INIT_RXDLL_CAL_RESET ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_INIT_RXDLL_CAL_UPDATE ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_REGS_RXDLL_CAL_SKIP ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_REGS_RXDLL_CAL_SKIP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_REGS_RXDLL_COARSE_ADJ_BY2 ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RXREG_FILTER_LENGTH_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RXREG_FILTER_LENGTH_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RXREG_LEAD_LAG_SEPARATION_DC ); REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_RXREG_LEAD_LAG_SEPARATION_DC_LEN , 3 , SH_UNT_MCA , - SH_ACS_SCOM , SH_FLD_01_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM , + SH_ACS_SCOM_RW , SH_FLD_01_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_EN_DRIVER_INVFB_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_FRZSULV , 60 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_01_FRZSULV ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_CAL_GOOD , 61 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_01_CAL_GOOD ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_CAL_ERROR , 62 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_01_CAL_ERROR ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_0_01_CAL_ERROR_FINE , 63 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_01_CAL_ERROR_FINE ); - -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM , + +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_INIT_RXDLL_CAL_RESET ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_INIT_RXDLL_CAL_UPDATE ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_REGS_RXDLL_CAL_SKIP ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_REGS_RXDLL_CAL_SKIP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_REGS_RXDLL_COARSE_ADJ_BY2 ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RXREG_FILTER_LENGTH_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RXREG_FILTER_LENGTH_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RXREG_LEAD_LAG_SEPARATION_DC ); REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_RXREG_LEAD_LAG_SEPARATION_DC_LEN , 3 , SH_UNT_MCA , - SH_ACS_SCOM , SH_FLD_01_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM , + SH_ACS_SCOM_RW , SH_FLD_01_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_EN_DRIVER_INVFB_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_FRZSULV , 60 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_01_FRZSULV ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_CAL_GOOD , 61 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_01_CAL_GOOD ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_CAL_ERROR , 62 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_01_CAL_ERROR ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_1_01_CAL_ERROR_FINE , 63 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_01_CAL_ERROR_FINE ); - -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM , + +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_INIT_RXDLL_CAL_RESET ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_INIT_RXDLL_CAL_UPDATE ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_REGS_RXDLL_CAL_SKIP ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_REGS_RXDLL_CAL_SKIP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_REGS_RXDLL_COARSE_ADJ_BY2 ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RXREG_FILTER_LENGTH_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RXREG_FILTER_LENGTH_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RXREG_LEAD_LAG_SEPARATION_DC ); REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_RXREG_LEAD_LAG_SEPARATION_DC_LEN , 3 , SH_UNT_MCA , - SH_ACS_SCOM , SH_FLD_23_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM , + SH_ACS_SCOM_RW , SH_FLD_23_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_EN_DRIVER_INVFB_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_FRZSULV , 60 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_23_FRZSULV ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_CAL_GOOD , 61 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_23_CAL_GOOD ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_CAL_ERROR , 62 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_23_CAL_ERROR ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_2_23_CAL_ERROR_FINE , 63 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_23_CAL_ERROR_FINE ); - -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM , + +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_INIT_RXDLL_CAL_RESET ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_INIT_RXDLL_CAL_UPDATE ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_REGS_RXDLL_CAL_SKIP ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_REGS_RXDLL_CAL_SKIP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_REGS_RXDLL_COARSE_ADJ_BY2 ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RXREG_FILTER_LENGTH_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RXREG_FILTER_LENGTH_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RXREG_LEAD_LAG_SEPARATION_DC ); REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_RXREG_LEAD_LAG_SEPARATION_DC_LEN , 3 , SH_UNT_MCA , - SH_ACS_SCOM , SH_FLD_23_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM , + SH_ACS_SCOM_RW , SH_FLD_23_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_EN_DRIVER_INVFB_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_FRZSULV , 60 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_23_FRZSULV ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_CAL_GOOD , 61 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_23_CAL_GOOD ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_CAL_ERROR , 62 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_23_CAL_ERROR ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_3_23_CAL_ERROR_FINE , 63 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_23_CAL_ERROR_FINE ); - -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM , + +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_INIT_RXDLL_CAL_RESET , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_INIT_RXDLL_CAL_RESET ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_INIT_RXDLL_CAL_UPDATE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_INIT_RXDLL_CAL_UPDATE ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_REGS_RXDLL_CAL_SKIP , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_REGS_RXDLL_CAL_SKIP ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_REGS_RXDLL_CAL_SKIP_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_REGS_RXDLL_CAL_SKIP_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_REGS_RXDLL_COARSE_ADJ_BY2 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_REGS_RXDLL_COARSE_ADJ_BY2 ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_RXREG_FILTER_LENGTH_DC , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RXREG_FILTER_LENGTH_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_RXREG_FILTER_LENGTH_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RXREG_FILTER_LENGTH_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_RXREG_LEAD_LAG_SEPARATION_DC , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RXREG_LEAD_LAG_SEPARATION_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_RXREG_LEAD_LAG_SEPARATION_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_RXREG_LEAD_LAG_SEPARATION_DC_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RXREG_LEAD_LAG_SEPARATION_DC_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM , +REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_EN_DRIVER_INVFB_DC , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_EN_DRIVER_INVFB_DC ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_FRZSULV , 60 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_4_FRZSULV ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_CAL_GOOD , 61 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_4_CAL_GOOD ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_CAL_ERROR , 62 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_4_CAL_ERROR ); -REG64_FLD( MCA_DDRPHY_DP16_DLL_CNTL1_P0_4_4_CAL_ERROR_FINE , 63 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_4_CAL_ERROR_FINE ); REG64_FLD( MCA_DDRPHY_DP16_DLL_CONFIG1_P0_0_01_HS_DLLMUX_SEL_0_3 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_HS_DLLMUX_SEL_0_3 ); @@ -6737,6 +6686,336 @@ REG64_FLD( MCA_DDRPHY_DP16_DLL_DAC_UPPER1_P0_4_4_REGS_RXDLL_VREG_UPPER , 48 , S REG64_FLD( MCA_DDRPHY_DP16_DLL_DAC_UPPER1_P0_4_4_REGS_RXDLL_VREG_UPPER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_REGS_RXDLL_VREG_UPPER_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER0_P0_0_01_LOWER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_LOWER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER0_P0_0_01_LOWER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_LOWER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER0_P0_1_01_LOWER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_LOWER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER0_P0_1_01_LOWER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_LOWER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER0_P0_2_23_LOWER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_LOWER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER0_P0_2_23_LOWER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_LOWER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER0_P0_3_23_LOWER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_LOWER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER0_P0_3_23_LOWER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_LOWER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER0_P0_4_4_LOWER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_LOWER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER0_P0_4_4_LOWER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_LOWER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER1_P0_0_01_LOWER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_LOWER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER1_P0_0_01_LOWER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_LOWER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER1_P0_1_01_LOWER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_LOWER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER1_P0_1_01_LOWER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_LOWER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER1_P0_2_23_LOWER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_LOWER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER1_P0_2_23_LOWER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_LOWER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER1_P0_3_23_LOWER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_LOWER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER1_P0_3_23_LOWER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_LOWER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER1_P0_4_4_LOWER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_LOWER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_LOWER1_P0_4_4_LOWER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_LOWER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER0_P0_0_01_UPPER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_UPPER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER0_P0_0_01_UPPER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_UPPER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER0_P0_1_01_UPPER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_UPPER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER0_P0_1_01_UPPER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_UPPER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER0_P0_2_23_UPPER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_UPPER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER0_P0_2_23_UPPER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_UPPER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER0_P0_3_23_UPPER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_UPPER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER0_P0_3_23_UPPER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_UPPER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER0_P0_4_4_UPPER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_UPPER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER0_P0_4_4_UPPER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_UPPER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER1_P0_0_01_UPPER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_UPPER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER1_P0_0_01_UPPER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_UPPER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER1_P0_1_01_UPPER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_UPPER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER1_P0_1_01_UPPER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_UPPER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER1_P0_2_23_UPPER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_UPPER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER1_P0_2_23_UPPER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_UPPER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER1_P0_3_23_UPPER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_UPPER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER1_P0_3_23_UPPER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_UPPER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER1_P0_4_4_UPPER , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_UPPER ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SLAVE_VREG_UPPER1_P0_4_4_UPPER_LEN , 15 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_UPPER_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_0_01_OVERRIDE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_OVERRIDE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_0_01_CAL_PD_ENABLE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_CAL_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_0_01_MAIN_PD_ENABLE , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_MAIN_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_0_01_DETECT_REQ , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_DETECT_REQ ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_0_01_SLAVE_CAL_CKT_POWERDOWN , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_SLAVE_CAL_CKT_POWERDOWN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_0_01_VREG_RXCAL_COMP_OUT_META , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_VREG_RXCAL_COMP_OUT_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_0_01_RXCAL_DETECT_DONE_META , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_RXCAL_DETECT_DONE_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_0_01_RXCAL_PD_CAL_LAG_META , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_RXCAL_PD_CAL_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_0_01_RXCAL_PD_MAIN_LEAD_META , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_RXCAL_PD_MAIN_LEAD_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_0_01_RXCAL_PD_MAIN_LAG_META , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_RXCAL_PD_MAIN_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_0_01_VREG_SLAVE_COMP_OUT , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_VREG_SLAVE_COMP_OUT ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_1_01_OVERRIDE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_OVERRIDE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_1_01_CAL_PD_ENABLE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_CAL_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_1_01_MAIN_PD_ENABLE , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_MAIN_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_1_01_DETECT_REQ , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_DETECT_REQ ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_1_01_SLAVE_CAL_CKT_POWERDOWN , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_SLAVE_CAL_CKT_POWERDOWN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_1_01_VREG_RXCAL_COMP_OUT_META , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_VREG_RXCAL_COMP_OUT_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_1_01_RXCAL_DETECT_DONE_META , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_RXCAL_DETECT_DONE_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_1_01_RXCAL_PD_CAL_LAG_META , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_RXCAL_PD_CAL_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_1_01_RXCAL_PD_MAIN_LEAD_META , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_RXCAL_PD_MAIN_LEAD_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_1_01_RXCAL_PD_MAIN_LAG_META , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_RXCAL_PD_MAIN_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_1_01_VREG_SLAVE_COMP_OUT , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_VREG_SLAVE_COMP_OUT ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_2_23_OVERRIDE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_OVERRIDE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_2_23_CAL_PD_ENABLE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_CAL_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_2_23_MAIN_PD_ENABLE , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_MAIN_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_2_23_DETECT_REQ , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_DETECT_REQ ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_2_23_SLAVE_CAL_CKT_POWERDOWN , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_SLAVE_CAL_CKT_POWERDOWN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_2_23_VREG_RXCAL_COMP_OUT_META , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_VREG_RXCAL_COMP_OUT_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_2_23_RXCAL_DETECT_DONE_META , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_RXCAL_DETECT_DONE_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_2_23_RXCAL_PD_CAL_LAG_META , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_RXCAL_PD_CAL_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_2_23_RXCAL_PD_MAIN_LEAD_META , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_RXCAL_PD_MAIN_LEAD_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_2_23_RXCAL_PD_MAIN_LAG_META , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_RXCAL_PD_MAIN_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_2_23_VREG_SLAVE_COMP_OUT , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_VREG_SLAVE_COMP_OUT ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_3_23_OVERRIDE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_OVERRIDE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_3_23_CAL_PD_ENABLE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_CAL_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_3_23_MAIN_PD_ENABLE , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_MAIN_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_3_23_DETECT_REQ , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_DETECT_REQ ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_3_23_SLAVE_CAL_CKT_POWERDOWN , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_SLAVE_CAL_CKT_POWERDOWN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_3_23_VREG_RXCAL_COMP_OUT_META , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_VREG_RXCAL_COMP_OUT_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_3_23_RXCAL_DETECT_DONE_META , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_RXCAL_DETECT_DONE_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_3_23_RXCAL_PD_CAL_LAG_META , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_RXCAL_PD_CAL_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_3_23_RXCAL_PD_MAIN_LEAD_META , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_RXCAL_PD_MAIN_LEAD_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_3_23_RXCAL_PD_MAIN_LAG_META , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_RXCAL_PD_MAIN_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_3_23_VREG_SLAVE_COMP_OUT , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_VREG_SLAVE_COMP_OUT ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_4_4_OVERRIDE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_OVERRIDE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_4_4_CAL_PD_ENABLE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_CAL_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_4_4_MAIN_PD_ENABLE , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_MAIN_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_4_4_DETECT_REQ , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_DETECT_REQ ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_4_4_SLAVE_CAL_CKT_POWERDOWN , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_SLAVE_CAL_CKT_POWERDOWN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_4_4_VREG_RXCAL_COMP_OUT_META , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_VREG_RXCAL_COMP_OUT_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_4_4_RXCAL_DETECT_DONE_META , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_RXCAL_DETECT_DONE_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_4_4_RXCAL_PD_CAL_LAG_META , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_RXCAL_PD_CAL_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_4_4_RXCAL_PD_MAIN_LEAD_META , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_RXCAL_PD_MAIN_LEAD_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_4_4_RXCAL_PD_MAIN_LAG_META , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_RXCAL_PD_MAIN_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL0_P0_4_4_VREG_SLAVE_COMP_OUT , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_VREG_SLAVE_COMP_OUT ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_0_01_OVERRIDE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_OVERRIDE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_0_01_CAL_PD_ENABLE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_CAL_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_0_01_MAIN_PD_ENABLE , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_MAIN_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_0_01_DETECT_REQ , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_DETECT_REQ ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_0_01_SLAVE_CAL_CKT_POWERDOWN , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_SLAVE_CAL_CKT_POWERDOWN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_0_01_VREG_RXCAL_COMP_OUT_META , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_VREG_RXCAL_COMP_OUT_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_0_01_RXCAL_DETECT_DONE_META , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_RXCAL_DETECT_DONE_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_0_01_RXCAL_PD_CAL_LAG_META , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_RXCAL_PD_CAL_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_0_01_RXCAL_PD_MAIN_LEAD_META , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_RXCAL_PD_MAIN_LEAD_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_0_01_RXCAL_PD_MAIN_LAG_META , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_RXCAL_PD_MAIN_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_0_01_VREG_SLAVE_COMP_OUT , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_VREG_SLAVE_COMP_OUT ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_1_01_OVERRIDE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_OVERRIDE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_1_01_CAL_PD_ENABLE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_CAL_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_1_01_MAIN_PD_ENABLE , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_MAIN_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_1_01_DETECT_REQ , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_DETECT_REQ ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_1_01_SLAVE_CAL_CKT_POWERDOWN , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_SLAVE_CAL_CKT_POWERDOWN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_1_01_VREG_RXCAL_COMP_OUT_META , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_VREG_RXCAL_COMP_OUT_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_1_01_RXCAL_DETECT_DONE_META , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_RXCAL_DETECT_DONE_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_1_01_RXCAL_PD_CAL_LAG_META , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_RXCAL_PD_CAL_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_1_01_RXCAL_PD_MAIN_LEAD_META , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_RXCAL_PD_MAIN_LEAD_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_1_01_RXCAL_PD_MAIN_LAG_META , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_RXCAL_PD_MAIN_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_1_01_VREG_SLAVE_COMP_OUT , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_VREG_SLAVE_COMP_OUT ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_2_23_OVERRIDE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_OVERRIDE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_2_23_CAL_PD_ENABLE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_CAL_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_2_23_MAIN_PD_ENABLE , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_MAIN_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_2_23_DETECT_REQ , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_DETECT_REQ ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_2_23_SLAVE_CAL_CKT_POWERDOWN , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_SLAVE_CAL_CKT_POWERDOWN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_2_23_VREG_RXCAL_COMP_OUT_META , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_VREG_RXCAL_COMP_OUT_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_2_23_RXCAL_DETECT_DONE_META , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_RXCAL_DETECT_DONE_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_2_23_RXCAL_PD_CAL_LAG_META , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_RXCAL_PD_CAL_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_2_23_RXCAL_PD_MAIN_LEAD_META , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_RXCAL_PD_MAIN_LEAD_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_2_23_RXCAL_PD_MAIN_LAG_META , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_RXCAL_PD_MAIN_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_2_23_VREG_SLAVE_COMP_OUT , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_VREG_SLAVE_COMP_OUT ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_3_23_OVERRIDE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_OVERRIDE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_3_23_CAL_PD_ENABLE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_CAL_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_3_23_MAIN_PD_ENABLE , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_MAIN_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_3_23_DETECT_REQ , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_DETECT_REQ ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_3_23_SLAVE_CAL_CKT_POWERDOWN , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_SLAVE_CAL_CKT_POWERDOWN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_3_23_VREG_RXCAL_COMP_OUT_META , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_VREG_RXCAL_COMP_OUT_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_3_23_RXCAL_DETECT_DONE_META , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_RXCAL_DETECT_DONE_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_3_23_RXCAL_PD_CAL_LAG_META , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_RXCAL_PD_CAL_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_3_23_RXCAL_PD_MAIN_LEAD_META , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_RXCAL_PD_MAIN_LEAD_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_3_23_RXCAL_PD_MAIN_LAG_META , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_RXCAL_PD_MAIN_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_3_23_VREG_SLAVE_COMP_OUT , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_VREG_SLAVE_COMP_OUT ); + +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_4_4_OVERRIDE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_OVERRIDE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_4_4_CAL_PD_ENABLE , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_CAL_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_4_4_MAIN_PD_ENABLE , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_MAIN_PD_ENABLE ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_4_4_DETECT_REQ , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_DETECT_REQ ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_4_4_SLAVE_CAL_CKT_POWERDOWN , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_SLAVE_CAL_CKT_POWERDOWN ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_4_4_VREG_RXCAL_COMP_OUT_META , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_VREG_RXCAL_COMP_OUT_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_4_4_RXCAL_DETECT_DONE_META , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_RXCAL_DETECT_DONE_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_4_4_RXCAL_PD_CAL_LAG_META , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_RXCAL_PD_CAL_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_4_4_RXCAL_PD_MAIN_LEAD_META , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_RXCAL_PD_MAIN_LEAD_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_4_4_RXCAL_PD_MAIN_LAG_META , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_RXCAL_PD_MAIN_LAG_META ); +REG64_FLD( MCA_DDRPHY_DP16_DLL_SW_CONTROL1_P0_4_4_VREG_SLAVE_COMP_OUT , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_VREG_SLAVE_COMP_OUT ); + REG64_FLD( MCA_DDRPHY_DP16_DLL_VREG_COARSE0_P0_0_01_REGS_RXDLL_COARSE_EN , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_REGS_RXDLL_COARSE_EN ); REG64_FLD( MCA_DDRPHY_DP16_DLL_VREG_COARSE0_P0_0_01_REGS_RXDLL_COARSE_EN_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -10084,18 +10363,28 @@ REG64_FLD( MCA_DDRPHY_DP16_RD_DIA_CONFIG3_P0_4_4_DESIRED_EDGE_CNTR_TARGET_LOW_LE REG64_FLD( MCA_DDRPHY_DP16_RD_DIA_CONFIG4_P0_0_01_DQS_ALIGN_FIX_DIS , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_DQS_ALIGN_FIX_DIS ); +REG64_FLD( MCA_DDRPHY_DP16_RD_DIA_CONFIG4_P0_0_01_CHICKSW_HW278227 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_CHICKSW_HW278227 ); REG64_FLD( MCA_DDRPHY_DP16_RD_DIA_CONFIG4_P0_1_01_DQS_ALIGN_FIX_DIS , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_DQS_ALIGN_FIX_DIS ); +REG64_FLD( MCA_DDRPHY_DP16_RD_DIA_CONFIG4_P0_1_01_CHICKSW_HW278227 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_CHICKSW_HW278227 ); REG64_FLD( MCA_DDRPHY_DP16_RD_DIA_CONFIG4_P0_2_23_DQS_ALIGN_FIX_DIS , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_DQS_ALIGN_FIX_DIS ); +REG64_FLD( MCA_DDRPHY_DP16_RD_DIA_CONFIG4_P0_2_23_CHICKSW_HW278227 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_CHICKSW_HW278227 ); REG64_FLD( MCA_DDRPHY_DP16_RD_DIA_CONFIG4_P0_3_23_DQS_ALIGN_FIX_DIS , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_DQS_ALIGN_FIX_DIS ); +REG64_FLD( MCA_DDRPHY_DP16_RD_DIA_CONFIG4_P0_3_23_CHICKSW_HW278227 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_CHICKSW_HW278227 ); REG64_FLD( MCA_DDRPHY_DP16_RD_DIA_CONFIG4_P0_4_4_DQS_ALIGN_FIX_DIS , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_DQS_ALIGN_FIX_DIS ); +REG64_FLD( MCA_DDRPHY_DP16_RD_DIA_CONFIG4_P0_4_4_CHICKSW_HW278227 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_CHICKSW_HW278227 ); REG64_FLD( MCA_DDRPHY_DP16_RD_DIA_CONFIG5_P0_0_01_DYN_POWER_CNTL_EN , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_DYN_POWER_CNTL_EN ); @@ -10692,154 +10981,215 @@ REG64_FLD( MCA_DDRPHY_DP16_RD_STATUS0_P0_4_4_DRIFT_ERROR , 62 , SH_UN REG64_FLD( MCA_DDRPHY_DP16_RD_STATUS0_P0_4_4_MIN_EYE , 63 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_MIN_EYE ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_0_01_NIB0 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_0_01_NIB0_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_NIB0_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_0_01_NIB0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB0 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_0_01_NIB0_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB0_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_0_01_NIB1 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_0_01_NIB1_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_NIB1_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_0_01_NIB1 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB1 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_0_01_NIB1_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_1_01_NIB0 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_1_01_NIB0_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_NIB0_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_1_01_NIB0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB0 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_1_01_NIB0_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB0_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_1_01_NIB1 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_1_01_NIB1_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_NIB1_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_1_01_NIB1 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB1 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_1_01_NIB1_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_2_23_NIB0 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_2_23_NIB0_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_NIB0_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_2_23_NIB0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB0 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_2_23_NIB0_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB0_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_2_23_NIB1 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_2_23_NIB1_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_NIB1_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_2_23_NIB1 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB1 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_2_23_NIB1_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_3_23_NIB0 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_3_23_NIB0_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_NIB0_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_3_23_NIB0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB0 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_3_23_NIB0_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB0_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_3_23_NIB1 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_3_23_NIB1_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_NIB1_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_3_23_NIB1 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB1 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_3_23_NIB1_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_4_4_NIB0 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_4_4_NIB0_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_NIB0_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_4_4_NIB0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB0 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_4_4_NIB0_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB0_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_4_4_NIB1 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_4_4_NIB1_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_NIB1_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_4_4_NIB1 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB1 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE0_DAC_P0_4_4_NIB1_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_0_01_NIB2 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_0_01_NIB2_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_NIB2_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_0_01_NIB2 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB2 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_0_01_NIB2_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB2_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_0_01_NIB3 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_0_01_NIB3_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_NIB3_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_0_01_NIB3 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB3 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_0_01_NIB3_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB3_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_1_01_NIB2 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_1_01_NIB2_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_NIB2_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_1_01_NIB2 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB2 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_1_01_NIB2_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB2_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_1_01_NIB3 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_1_01_NIB3_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_NIB3_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_1_01_NIB3 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB3 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_1_01_NIB3_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_NIB3_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_2_23_NIB2 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_2_23_NIB2_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_NIB2_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_2_23_NIB2 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB2 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_2_23_NIB2_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB2_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_2_23_NIB3 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_2_23_NIB3_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_NIB3_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_2_23_NIB3 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB3 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_2_23_NIB3_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB3_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_3_23_NIB2 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_3_23_NIB2_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_NIB2_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_3_23_NIB2 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB2 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_3_23_NIB2_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB2_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_3_23_NIB3 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_3_23_NIB3_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_NIB3_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_3_23_NIB3 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB3 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_3_23_NIB3_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_NIB3_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_4_4_NIB2 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_4_4_NIB2_EN_FORCE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_NIB2_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_4_4_NIB2 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB2 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_4_4_NIB2_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB2_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_4_4_NIB3 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_4_4_NIB3_EN_FORCE , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_NIB3_EN_FORCE ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_4_4_NIB3 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB3 ); REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_BYTE1_DAC_P0_4_4_NIB3_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_NIB3_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_DONE_P0_0_01 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_0_01 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01 ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_DONE_P0_0_01_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_0_01_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_DONE_P0_1_01 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_1_01 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01 ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_DONE_P0_1_01_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_1_01_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_DONE_P0_2_23 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_2_23 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23 ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_DONE_P0_2_23_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_2_23_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_DONE_P0_3_23 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_3_23 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23 ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_DONE_P0_3_23_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_3_23_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_DONE_P0_4_4 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_4_4 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4 ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_DONE_P0_4_4_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_4_4_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_0_01 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_ERROR_P0_0_01 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_01 ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_0_01_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_ERROR_P0_0_01_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_01_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_1_01 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_ERROR_P0_1_01 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_01 ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_1_01_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_ERROR_P0_1_01_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_01_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_2_23 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_ERROR_P0_2_23 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_23 ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_2_23_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_ERROR_P0_2_23_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_23_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_3_23 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_ERROR_P0_3_23 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_23 ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_3_23_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_ERROR_P0_3_23_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_23_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_4_4 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_ERROR_P0_4_4 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_4 ); -REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_EN_P0_4_4_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_CAL_ERROR_P0_4_4_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_4_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_COMP_OUT_P0_0_01 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_COMP_OUT_P0_0_01_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_COMP_OUT_P0_1_01 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_COMP_OUT_P0_1_01_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_COMP_OUT_P0_2_23 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_COMP_OUT_P0_2_23_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_COMP_OUT_P0_3_23 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_COMP_OUT_P0_3_23_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_COMP_OUT_P0_4_4 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_4 ); +REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_COMP_OUT_P0_4_4_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_4_LEN ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -10852,23 +11202,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD2_CLK22 , 56 , SH_ SH_FLD_01_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_0_01_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_0_01_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_0_01_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_0_01_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -10881,23 +11219,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD2_CLK22 , 56 , SH_ SH_FLD_01_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_1_01_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_1_01_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_1_01_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_1_01_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -10910,23 +11236,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD2_CLK22 , 56 , SH_ SH_FLD_23_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_2_23_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_2_23_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_2_23_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_2_23_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -10939,23 +11253,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD2_CLK22 , 56 , SH_ SH_FLD_23_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_3_23_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_3_23_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_3_23_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_3_23_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_4_4_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_4_4_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_4_4_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_4_4_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_4_4_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_4_4_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -10968,23 +11270,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_4_4_QUAD2_CLK22 , 56 , SH_U SH_FLD_4_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_4_4_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_4_4_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_4_4_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_4_4_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR0_P0_4_4_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -10997,23 +11287,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD2_CLK22 , 56 , SH_ SH_FLD_01_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_0_01_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_0_01_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_0_01_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_0_01_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -11026,23 +11304,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD2_CLK22 , 56 , SH_ SH_FLD_01_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_1_01_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_1_01_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_1_01_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_1_01_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -11055,23 +11321,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD2_CLK22 , 56 , SH_ SH_FLD_23_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_2_23_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_2_23_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_2_23_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_2_23_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -11084,23 +11338,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD2_CLK22 , 56 , SH_ SH_FLD_23_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_3_23_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_3_23_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_3_23_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_3_23_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_4_4_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_4_4_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_4_4_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_4_4_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_4_4_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_4_4_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -11113,23 +11355,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_4_4_QUAD2_CLK22 , 56 , SH_U SH_FLD_4_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_4_4_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_4_4_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_4_4_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_4_4_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR1_P0_4_4_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -11142,23 +11372,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD2_CLK22 , 56 , SH_ SH_FLD_01_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_0_01_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_0_01_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_0_01_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_0_01_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -11171,23 +11389,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD2_CLK22 , 56 , SH_ SH_FLD_01_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_1_01_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_1_01_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_1_01_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_1_01_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -11200,23 +11406,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD2_CLK22 , 56 , SH_ SH_FLD_23_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_2_23_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_2_23_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_2_23_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_2_23_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -11229,23 +11423,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD2_CLK22 , 56 , SH_ SH_FLD_23_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_3_23_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_3_23_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_3_23_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_3_23_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_4_4_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_4_4_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_4_4_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_4_4_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_4_4_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_4_4_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -11258,23 +11440,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_4_4_QUAD2_CLK22 , 56 , SH_U SH_FLD_4_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_4_4_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_4_4_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_4_4_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_4_4_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR2_P0_4_4_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -11287,23 +11457,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD2_CLK22 , 56 , SH_ SH_FLD_01_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_0_01_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_0_01_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_0_01_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_0_01_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -11316,23 +11474,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD2_CLK22 , 56 , SH_ SH_FLD_01_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_1_01_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_1_01_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_1_01_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_1_01_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -11345,23 +11491,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD2_CLK22 , 56 , SH_ SH_FLD_23_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_2_23_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_2_23_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_2_23_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_2_23_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -11374,23 +11508,11 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD2_CLK22 , 56 , SH_ SH_FLD_23_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_3_23_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_3_23_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_3_23_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_3_23_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_4_4_QUAD0_CLK16 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_QUAD0_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_4_4_QUAD1_CLK16 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_QUAD1_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_4_4_QUAD2_CLK16 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_QUAD2_CLK16 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_4_4_QUAD3_CLK16 , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_QUAD3_CLK16 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_4_4_QUAD0_CLK18 , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_QUAD0_CLK18 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_4_4_QUAD1_CLK18 , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -11403,14 +11525,6 @@ REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_4_4_QUAD2_CLK22 , 56 , SH_U SH_FLD_4_QUAD2_CLK22 ); REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_4_4_QUAD3_CLK22 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_QUAD3_CLK22 ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_4_4_CLK16_SINGLE_ENDED , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CLK16_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_4_4_CLK18_SINGLE_ENDED , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CLK18_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_4_4_CLK20_SINGLE_ENDED , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CLK20_SINGLE_ENDED ); -REG64_FLD( MCA_DDRPHY_DP16_READ_CLOCK_RANK_PAIR3_P0_4_4_CLK22_SINGLE_ENDED , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CLK22_SINGLE_ENDED ); REG64_FLD( MCA_DDRPHY_DP16_READ_DELAY0_RANK_PAIR0_P0_0_01_RD , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RD ); @@ -16960,10 +17074,10 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_0_01_CTR_2D_SMALL_STEP_VAL , 50 , SH_FLD_01_CTR_2D_SMALL_STEP_VAL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_0_01_CTR_2D_SMALL_STEP_VAL_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_CTR_2D_SMALL_STEP_VAL_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_0_01_CTR_3D_BIG_STEP_VAL , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CTR_3D_BIG_STEP_VAL ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_0_01_CTR_3D_BIG_STEP_VAL_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CTR_3D_BIG_STEP_VAL_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_0_01_CTR_2D_BIG_STEP_VAL , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_CTR_2D_BIG_STEP_VAL ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_0_01_CTR_2D_BIG_STEP_VAL_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_CTR_2D_BIG_STEP_VAL_LEN ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_0_01_CTR_NUM_BITS_TO_SKIP , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_CTR_NUM_BITS_TO_SKIP ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_0_01_CTR_NUM_BITS_TO_SKIP_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -16981,10 +17095,10 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_1_01_CTR_2D_SMALL_STEP_VAL , 50 , SH_FLD_01_CTR_2D_SMALL_STEP_VAL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_1_01_CTR_2D_SMALL_STEP_VAL_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_CTR_2D_SMALL_STEP_VAL_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_1_01_CTR_3D_BIG_STEP_VAL , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CTR_3D_BIG_STEP_VAL ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_1_01_CTR_3D_BIG_STEP_VAL_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CTR_3D_BIG_STEP_VAL_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_1_01_CTR_2D_BIG_STEP_VAL , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_CTR_2D_BIG_STEP_VAL ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_1_01_CTR_2D_BIG_STEP_VAL_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_CTR_2D_BIG_STEP_VAL_LEN ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_1_01_CTR_NUM_BITS_TO_SKIP , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_CTR_NUM_BITS_TO_SKIP ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_1_01_CTR_NUM_BITS_TO_SKIP_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17002,10 +17116,10 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_2_23_CTR_2D_SMALL_STEP_VAL , 50 , SH_FLD_23_CTR_2D_SMALL_STEP_VAL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_2_23_CTR_2D_SMALL_STEP_VAL_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_CTR_2D_SMALL_STEP_VAL_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_2_23_CTR_3D_BIG_STEP_VAL , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CTR_3D_BIG_STEP_VAL ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_2_23_CTR_3D_BIG_STEP_VAL_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CTR_3D_BIG_STEP_VAL_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_2_23_CTR_2D_BIG_STEP_VAL , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_CTR_2D_BIG_STEP_VAL ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_2_23_CTR_2D_BIG_STEP_VAL_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_CTR_2D_BIG_STEP_VAL_LEN ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_2_23_CTR_NUM_BITS_TO_SKIP , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_CTR_NUM_BITS_TO_SKIP ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_2_23_CTR_NUM_BITS_TO_SKIP_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17023,10 +17137,10 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_3_23_CTR_2D_SMALL_STEP_VAL , 50 , SH_FLD_23_CTR_2D_SMALL_STEP_VAL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_3_23_CTR_2D_SMALL_STEP_VAL_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_CTR_2D_SMALL_STEP_VAL_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_3_23_CTR_3D_BIG_STEP_VAL , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CTR_3D_BIG_STEP_VAL ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_3_23_CTR_3D_BIG_STEP_VAL_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CTR_3D_BIG_STEP_VAL_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_3_23_CTR_2D_BIG_STEP_VAL , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_CTR_2D_BIG_STEP_VAL ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_3_23_CTR_2D_BIG_STEP_VAL_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_CTR_2D_BIG_STEP_VAL_LEN ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_3_23_CTR_NUM_BITS_TO_SKIP , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_CTR_NUM_BITS_TO_SKIP ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_3_23_CTR_NUM_BITS_TO_SKIP_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17044,10 +17158,10 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_4_4_CTR_2D_SMALL_STEP_VAL , 50 , SH_FLD_4_CTR_2D_SMALL_STEP_VAL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_4_4_CTR_2D_SMALL_STEP_VAL_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_CTR_2D_SMALL_STEP_VAL_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_4_4_CTR_3D_BIG_STEP_VAL , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CTR_3D_BIG_STEP_VAL ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_4_4_CTR_3D_BIG_STEP_VAL_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CTR_3D_BIG_STEP_VAL_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_4_4_CTR_2D_BIG_STEP_VAL , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_CTR_2D_BIG_STEP_VAL ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_4_4_CTR_2D_BIG_STEP_VAL_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_CTR_2D_BIG_STEP_VAL_LEN ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_4_4_CTR_NUM_BITS_TO_SKIP , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_CTR_NUM_BITS_TO_SKIP ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG0_P0_4_4_CTR_NUM_BITS_TO_SKIP_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17112,6 +17226,186 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG1_P0_4_4_CTR_SINGLE_RANGE_MAX , 56 , S REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_CONFIG1_P0_4_4_CTR_SINGLE_RANGE_MAX_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_CTR_SINGLE_RANGE_MAX_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_0_01_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_0_01_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_0_01_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_0_01_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_1_01_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_1_01_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_1_01_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_1_01_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_2_23_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_2_23_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_2_23_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_2_23_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_3_23_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_3_23_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_3_23_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_3_23_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_4_4_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_4_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_4_4_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_4_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_4_4_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_4_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR0_P0_4_4_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_4_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_0_01_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_0_01_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_0_01_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_0_01_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_1_01_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_1_01_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_1_01_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_1_01_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_01_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_2_23_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_2_23_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_2_23_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_2_23_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_3_23_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_3_23_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_3_23_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_3_23_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_23_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_4_4_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_4_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_4_4_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_4_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_4_4_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_4_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR1_P0_4_4_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_4_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_0_01_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_0_01_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_0_01_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_0_01_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_1_01_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_1_01_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_1_01_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_1_01_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_2_23_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_2_23_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_2_23_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_2_23_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_3_23_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_3_23_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_3_23_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_3_23_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_4_4_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_4_4_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_4_4_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK0_P0_4_4_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_0_01_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_0_01_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_0_01_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_0_01_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_1_01_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_1_01_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_1_01_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_1_01_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_2_23_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_2_23_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_2_23_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_2_23_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_3_23_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_3_23_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_3_23_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_3_23_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_23_TBD2_LEN ); + +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_4_4_TBD1 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_TBD1 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_4_4_TBD1_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_TBD1_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_4_4_TBD2 , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_TBD2 ); +REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_ERROR_MASK1_P0_4_4_TBD2_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_4_TBD2_LEN ); + REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_STATUS0_P0_0_01_CTR_NUM_WRRDREQ_CNT , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_CTR_NUM_WRRDREQ_CNT ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_STATUS0_P0_0_01_CTR_NUM_WRRDREQ_CNT_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17182,8 +17476,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_STATUS1_P0_4_4_CTR_CUR , 57 , SH_UN REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_STATUS1_P0_4_4_CTR_CUR_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_CTR_CUR_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_0_01_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_0_01_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_0_01_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17197,8 +17489,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_0_01_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_0_01_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_1_01_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_1_01_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_1_01_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17212,8 +17502,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_1_01_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_1_01_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_2_23_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_2_23_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_2_23_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17227,8 +17515,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_2_23_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_2_23_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_3_23_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_3_23_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_3_23_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17242,8 +17528,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_3_23_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_3_23_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_4_4_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_4_4_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_4_4_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17257,8 +17541,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_4_4_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR0_P0_4_4_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_0_01_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_0_01_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_0_01_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17272,8 +17554,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_0_01_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_0_01_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_1_01_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_1_01_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_1_01_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17287,8 +17567,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_1_01_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_1_01_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_2_23_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_2_23_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_2_23_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17302,8 +17580,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_2_23_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_2_23_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_3_23_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_3_23_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_3_23_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17317,8 +17593,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_3_23_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_3_23_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_4_4_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_4_4_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_4_4_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17332,8 +17606,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_4_4_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR1_P0_4_4_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_0_01_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_0_01_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_0_01_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17347,8 +17619,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_0_01_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_0_01_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_1_01_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_1_01_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_1_01_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17362,8 +17632,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_1_01_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_1_01_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_2_23_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_2_23_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_2_23_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17377,8 +17645,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_2_23_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_2_23_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_3_23_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_3_23_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_3_23_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17392,8 +17658,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_3_23_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_3_23_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_4_4_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_4_4_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_4_4_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17407,8 +17671,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_4_4_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR2_P0_4_4_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_0_01_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_0_01_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_0_01_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17422,8 +17684,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_0_01_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_0_01_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_1_01_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_01_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_1_01_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_1_01_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17437,8 +17697,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_1_01_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_1_01_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_2_23_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_2_23_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_2_23_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17452,8 +17710,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_2_23_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_2_23_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_3_23_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_23_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_3_23_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_3_23_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17467,8 +17723,6 @@ REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_3_23_VALUE_DRAM1 , 58 , REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_3_23_VALUE_DRAM1_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_23_VALUE_DRAM1_LEN ); -REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_4_4_CTR_RANGE_SEL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_4_CTR_RANGE_SEL ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_4_4_RANGE_DRAM0 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_RANGE_DRAM0 ); REG64_FLD( MCA_DDRPHY_DP16_WR_VREF_VALUE0_RANK_PAIR3_P0_4_4_VALUE_DRAM0 , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17768,8 +18022,6 @@ REG64_FLD( MCA_DDRPHY_PC_CONFIG0_P0_PROTOCOL_LEN , 4 , SH_UN SH_FLD_PROTOCOL_LEN ); REG64_FLD( MCA_DDRPHY_PC_CONFIG0_P0_DATA_MUX4_1MODE , 52 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_DATA_MUX4_1MODE ); -REG64_FLD( MCA_DDRPHY_PC_CONFIG0_P0_SPAM_EN , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_SPAM_EN ); REG64_FLD( MCA_DDRPHY_PC_CONFIG0_P0_DDR4_CMD_SIG_REDUCTION , 54 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_DDR4_CMD_SIG_REDUCTION ); REG64_FLD( MCA_DDRPHY_PC_CONFIG0_P0_SYSCLK_2X_MEMINTCLKO , 55 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -17786,8 +18038,6 @@ REG64_FLD( MCA_DDRPHY_PC_CONFIG0_P0_DDR4_IPW_LOOP_DIS , 61 , SH_UN SH_FLD_DDR4_IPW_LOOP_DIS ); REG64_FLD( MCA_DDRPHY_PC_CONFIG0_P0_DDR4_VLEVEL_BANK_GROUP , 62 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_DDR4_VLEVEL_BANK_GROUP ); -REG64_FLD( MCA_DDRPHY_PC_CONFIG0_P0_ZCAL_NOT_CONT , 63 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_ZCAL_NOT_CONT ); REG64_FLD( MCA_DDRPHY_PC_CONFIG1_P0_WRITE_LATENCY_OFFSET , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_WRITE_LATENCY_OFFSET ); @@ -17829,18 +18079,20 @@ REG64_FLD( MCA_DDRPHY_PC_CSID_CFG_P0_CS6_INIT_CAL_VALUE , 54 , SH_UN REG64_FLD( MCA_DDRPHY_PC_CSID_CFG_P0_CS7_INIT_CAL_VALUE , 55 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CS7_INIT_CAL_VALUE ); -REG64_FLD( MCA_DDRPHY_PC_DLL_CAL_STATUS_P0_DP_GOOD , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_PC_DLL_ZCAL_CAL_STATUS_P0_DP_GOOD , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_DP_GOOD ); -REG64_FLD( MCA_DDRPHY_PC_DLL_CAL_STATUS_P0_DP_ERROR , 49 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_PC_DLL_ZCAL_CAL_STATUS_P0_DP_ERROR , 49 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_DP_ERROR ); -REG64_FLD( MCA_DDRPHY_PC_DLL_CAL_STATUS_P0_DP_ERROR_FINE , 50 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_PC_DLL_ZCAL_CAL_STATUS_P0_DP_ERROR_FINE , 50 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_DP_ERROR_FINE ); -REG64_FLD( MCA_DDRPHY_PC_DLL_CAL_STATUS_P0_ADR_GOOD , 51 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_PC_DLL_ZCAL_CAL_STATUS_P0_ADR_GOOD , 51 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_ADR_GOOD ); -REG64_FLD( MCA_DDRPHY_PC_DLL_CAL_STATUS_P0_ADR_ERROR , 52 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_PC_DLL_ZCAL_CAL_STATUS_P0_ADR_ERROR , 52 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_ADR_ERROR ); -REG64_FLD( MCA_DDRPHY_PC_DLL_CAL_STATUS_P0_ADR_ERROR_FINE , 53 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_PC_DLL_ZCAL_CAL_STATUS_P0_ADR_ERROR_FINE , 53 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_ADR_ERROR_FINE ); +REG64_FLD( MCA_DDRPHY_PC_DLL_ZCAL_CAL_STATUS_P0_DONE , 63 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_DONE ); REG64_FLD( MCA_DDRPHY_PC_ERROR_MASK0_P0_RC_MASK , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_RC_MASK ); @@ -17936,6 +18188,8 @@ REG64_FLD( MCA_DDRPHY_PC_INIT_CAL_ERROR_P0_CUSTOM_WR , 57 , SH_UN SH_FLD_CUSTOM_WR ); REG64_FLD( MCA_DDRPHY_PC_INIT_CAL_ERROR_P0_DIGITAL_EYE , 58 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_DIGITAL_EYE ); +REG64_FLD( MCA_DDRPHY_PC_INIT_CAL_ERROR_P0_VREF , 59 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_VREF ); REG64_FLD( MCA_DDRPHY_PC_INIT_CAL_ERROR_P0_RANK_PAIR , 60 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_RANK_PAIR ); REG64_FLD( MCA_DDRPHY_PC_INIT_CAL_ERROR_P0_RANK_PAIR_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RO , @@ -17963,6 +18217,8 @@ REG64_FLD( MCA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_CUSTOM_WR , 57 , SH_UN SH_FLD_ERROR_CUSTOM_WR ); REG64_FLD( MCA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_DIGITAL_EYE , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ERROR_DIGITAL_EYE ); +REG64_FLD( MCA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_VREF , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ERROR_VREF ); REG64_FLD( MCA_DDRPHY_PC_INIT_CAL_STATUS_P0_COMPLETE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_COMPLETE ); @@ -17979,30 +18235,32 @@ REG64_FLD( MCA_DDRPHY_PC_INIT_CAL_STATUS_P0_RESERVED_58_63 , 58 , SH_UN REG64_FLD( MCA_DDRPHY_PC_INIT_CAL_STATUS_P0_RESERVED_58_63_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_RESERVED_58_63_LEN ); -REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_PVTP ); -REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTP_LEN , 5 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_PVTP_LEN ); -REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTN , 53 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTPB , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_PVTPB ); +REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTPL , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_PVTPL ); +REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTPL_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_PVTPL_LEN ); +REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTNB , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_PVTNB ); +REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTN , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_PVTN ); -REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTN_LEN , 5 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_PVTN_LEN ); -REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_OVERRIDE , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_OVERRIDE ); -REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_ENABLE_ZCAL , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_ENABLE_ZCAL ); -REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_RESET_ZCAL , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_RESET_ZCAL ); - -REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTP , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_PVTP ); -REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTP_LEN , 5 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_PVTP_LEN ); -REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTN , 53 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_PVTN ); -REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTN_LEN , 5 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTN_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_PVTN_LEN ); +REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTPB , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_PVTPB ); +REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTPL , 49 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_PVTPL ); +REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTPL_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_PVTPL_LEN ); +REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTNB , 56 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_PVTNB ); +REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTNL , 57 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_PVTNL ); +REG64_FLD( MCA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTNL_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_PVTNL_LEN ); + REG64_FLD( MCA_DDRPHY_PC_MR0_PRI_RP0_P0_MODE_REGISTER_0_VALUE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_MODE_REGISTER_0_VALUE ); REG64_FLD( MCA_DDRPHY_PC_MR0_PRI_RP0_P0_MODE_REGISTER_0_VALUE_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -18391,6 +18649,10 @@ REG64_FLD( MCA_DDRPHY_PC_RELOAD_VALUE0_P0_PERIODIC_LEN , 15 , SH_UN REG64_FLD( MCA_DDRPHY_PC_RESETS_P0_SYSCLK_RESET , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_SYSCLK_RESET ); +REG64_FLD( MCA_DDRPHY_PC_RESETS_P0_PVT_OVERRIDE , 50 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_PVT_OVERRIDE ); +REG64_FLD( MCA_DDRPHY_PC_RESETS_P0_ENABLE_ZCAL , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_ENABLE_ZCAL ); REG64_FLD( MCA_DDRPHY_PC_VREF_DRV_CONTROL_P0_VREFDQ0DSGN , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_VREFDQ0DSGN ); @@ -18730,6 +18992,40 @@ REG64_FLD( MCA_DDRPHY_SEQ_RESERVED_ADDR4_P0_ADDR4 , 48 , SH_UN REG64_FLD( MCA_DDRPHY_SEQ_RESERVED_ADDR4_P0_ADDR4_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_ADDR4_LEN ); +REG64_FLD( MCA_DDRPHY_SEQ_WR_TERM_SWAP0_P0_RTT_WR0_NOM_VALUE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RTT_WR0_NOM_VALUE ); +REG64_FLD( MCA_DDRPHY_SEQ_WR_TERM_SWAP0_P0_RTT_WR0_NOM_VALUE_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RTT_WR0_NOM_VALUE_LEN ); +REG64_FLD( MCA_DDRPHY_SEQ_WR_TERM_SWAP0_P0_RTT_WR1_NOM_VALUE , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RTT_WR1_NOM_VALUE ); +REG64_FLD( MCA_DDRPHY_SEQ_WR_TERM_SWAP0_P0_RTT_WR1_NOM_VALUE_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RTT_WR1_NOM_VALUE_LEN ); +REG64_FLD( MCA_DDRPHY_SEQ_WR_TERM_SWAP0_P0_RTT_WR2_NOM_VALUE , 54 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RTT_WR2_NOM_VALUE ); +REG64_FLD( MCA_DDRPHY_SEQ_WR_TERM_SWAP0_P0_RTT_WR2_NOM_VALUE_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RTT_WR2_NOM_VALUE_LEN ); +REG64_FLD( MCA_DDRPHY_SEQ_WR_TERM_SWAP0_P0_RTT_WR3_NOM_VALUE , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RTT_WR3_NOM_VALUE ); +REG64_FLD( MCA_DDRPHY_SEQ_WR_TERM_SWAP0_P0_RTT_WR3_NOM_VALUE_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RTT_WR3_NOM_VALUE_LEN ); +REG64_FLD( MCA_DDRPHY_SEQ_WR_TERM_SWAP0_P0_RTT_WR4_NOM_VALUE , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RTT_WR4_NOM_VALUE ); +REG64_FLD( MCA_DDRPHY_SEQ_WR_TERM_SWAP0_P0_RTT_WR4_NOM_VALUE_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RTT_WR4_NOM_VALUE_LEN ); + +REG64_FLD( MCA_DDRPHY_SEQ_WR_TERM_SWAP1_P0_RTT_WR5_NOM_VALUE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RTT_WR5_NOM_VALUE ); +REG64_FLD( MCA_DDRPHY_SEQ_WR_TERM_SWAP1_P0_RTT_WR5_NOM_VALUE_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RTT_WR5_NOM_VALUE_LEN ); +REG64_FLD( MCA_DDRPHY_SEQ_WR_TERM_SWAP1_P0_RTT_WR6_NOM_VALUE , 51 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RTT_WR6_NOM_VALUE ); +REG64_FLD( MCA_DDRPHY_SEQ_WR_TERM_SWAP1_P0_RTT_WR6_NOM_VALUE_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RTT_WR6_NOM_VALUE_LEN ); +REG64_FLD( MCA_DDRPHY_SEQ_WR_TERM_SWAP1_P0_RTT_WR7_NOM_VALUE , 54 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RTT_WR7_NOM_VALUE ); +REG64_FLD( MCA_DDRPHY_SEQ_WR_TERM_SWAP1_P0_RTT_WR7_NOM_VALUE_LEN , 3 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RTT_WR7_NOM_VALUE_LEN ); + REG64_FLD( MCA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_0_2 , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_0_2 ); REG64_FLD( MCA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_SEL_TYPE_0_2 , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -18822,38 +19118,10 @@ REG64_FLD( MCA_DDRPHY_WC_ERROR_MASK0_P0_WR_CNTL_MASK , 48 , SH_UN REG64_FLD( MCA_DDRPHY_WC_ERROR_STATUS0_P0_WR_CNTL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_WR_CNTL ); -REG64_FLD( MCA_DEBUG_STATUS_REG_LOCAL_TRACE_RUN_IN , 0 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_LOCAL_TRACE_RUN_IN ); -REG64_FLD( MCA_DEBUG_STATUS_REG_TRACE_STATE_LAT , 1 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_TRACE_STATE_LAT ); -REG64_FLD( MCA_DEBUG_STATUS_REG_TRACE_STATE_LAT_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_TRACE_STATE_LAT_LEN ); -REG64_FLD( MCA_DEBUG_STATUS_REG_TRACE_FREEZE , 3 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_TRACE_FREEZE ); -REG64_FLD( MCA_DEBUG_STATUS_REG_COND3_STATE_LT , 4 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_COND3_STATE_LT ); -REG64_FLD( MCA_DEBUG_STATUS_REG_COND3_STATE_LT_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_COND3_STATE_LT_LEN ); -REG64_FLD( MCA_DEBUG_STATUS_REG_COND5_STATE_LT , 6 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_COND5_STATE_LT ); -REG64_FLD( MCA_DEBUG_STATUS_REG_COND5_STATE_LT_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_COND5_STATE_LT_LEN ); -REG64_FLD( MCA_DEBUG_STATUS_REG_HISTORY_CONDITION0_LT , 8 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_HISTORY_CONDITION0_LT ); -REG64_FLD( MCA_DEBUG_STATUS_REG_HISTORY_CONDITION1_LT , 9 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_HISTORY_CONDITION1_LT ); -REG64_FLD( MCA_DEBUG_STATUS_REG_HISTORY_COND2_3_EVENT , 10 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_HISTORY_COND2_3_EVENT ); -REG64_FLD( MCA_DEBUG_STATUS_REG_HISTORY_COND2_TIMEOUT , 11 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_HISTORY_COND2_TIMEOUT ); -REG64_FLD( MCA_DEBUG_STATUS_REG_HISTORY_COND4_5_EVENT , 12 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_HISTORY_COND4_5_EVENT ); -REG64_FLD( MCA_DEBUG_STATUS_REG_HISTORY_COND4_TIMEOUT , 13 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_HISTORY_COND4_TIMEOUT ); -REG64_FLD( MCA_DEBUG_STATUS_REG_RESERVED_TCDBG_LT , 14 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_RESERVED_TCDBG_LT ); -REG64_FLD( MCA_DEBUG_STATUS_REG_RESERVED_TCDBG_LT_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_RESERVED_TCDBG_LT_LEN ); +REG64_FLD( MCA_DDRPHY_WC_RTT_WR_SWAP_ENABLE_P0_WL , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_WL ); +REG64_FLD( MCA_DDRPHY_WC_RTT_WR_SWAP_ENABLE_P0_CTR , 49 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_CTR ); REG64_FLD( MCA_DP16_WR_DELAY_VALUE_0_RP0_REG_P0_0_01_DELAYG , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_01_DELAYG ); @@ -21242,6 +21510,8 @@ REG64_FLD( MCA_HWMS0_CHIPMARK_LEN , 8 , SH_UN SH_FLD_CHIPMARK_LEN ); REG64_FLD( MCA_HWMS0_CONFIRMED , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CONFIRMED ); +REG64_FLD( MCA_HWMS0_EXIT_1 , 9 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_EXIT_1 ); REG64_FLD( MCA_WDF_HWMS1_CHIPMARK , 0 , SH_UNT_MCA_WDF , SH_ACS_SCOM_RW , SH_FLD_CHIPMARK ); @@ -21249,6 +21519,8 @@ REG64_FLD( MCA_WDF_HWMS1_CHIPMARK_LEN , 8 , SH_UN SH_FLD_CHIPMARK_LEN ); REG64_FLD( MCA_WDF_HWMS1_CONFIRMED , 8 , SH_UNT_MCA_WDF , SH_ACS_SCOM_RW , SH_FLD_CONFIRMED ); +REG64_FLD( MCA_WDF_HWMS1_EXIT_1 , 9 , SH_UNT_MCA_WDF , SH_ACS_SCOM_RW , + SH_FLD_EXIT_1 ); REG64_FLD( MCA_HWMS2_CHIPMARK , 0 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CHIPMARK ); @@ -21256,6 +21528,8 @@ REG64_FLD( MCA_HWMS2_CHIPMARK_LEN , 8 , SH_UN SH_FLD_CHIPMARK_LEN ); REG64_FLD( MCA_HWMS2_CONFIRMED , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CONFIRMED ); +REG64_FLD( MCA_HWMS2_EXIT_1 , 9 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_EXIT_1 ); REG64_FLD( MCA_HWMS3_CHIPMARK , 0 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CHIPMARK ); @@ -21263,6 +21537,8 @@ REG64_FLD( MCA_HWMS3_CHIPMARK_LEN , 8 , SH_UN SH_FLD_CHIPMARK_LEN ); REG64_FLD( MCA_HWMS3_CONFIRMED , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CONFIRMED ); +REG64_FLD( MCA_HWMS3_EXIT_1 , 9 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_EXIT_1 ); REG64_FLD( MCA_HWMS4_CHIPMARK , 0 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CHIPMARK ); @@ -21270,6 +21546,8 @@ REG64_FLD( MCA_HWMS4_CHIPMARK_LEN , 8 , SH_UN SH_FLD_CHIPMARK_LEN ); REG64_FLD( MCA_HWMS4_CONFIRMED , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CONFIRMED ); +REG64_FLD( MCA_HWMS4_EXIT_1 , 9 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_EXIT_1 ); REG64_FLD( MCA_HWMS5_CHIPMARK , 0 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CHIPMARK ); @@ -21277,6 +21555,8 @@ REG64_FLD( MCA_HWMS5_CHIPMARK_LEN , 8 , SH_UN SH_FLD_CHIPMARK_LEN ); REG64_FLD( MCA_HWMS5_CONFIRMED , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CONFIRMED ); +REG64_FLD( MCA_HWMS5_EXIT_1 , 9 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_EXIT_1 ); REG64_FLD( MCA_HWMS6_CHIPMARK , 0 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CHIPMARK ); @@ -21284,6 +21564,8 @@ REG64_FLD( MCA_HWMS6_CHIPMARK_LEN , 8 , SH_UN SH_FLD_CHIPMARK_LEN ); REG64_FLD( MCA_HWMS6_CONFIRMED , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CONFIRMED ); +REG64_FLD( MCA_HWMS6_EXIT_1 , 9 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_EXIT_1 ); REG64_FLD( MCA_HWMS7_CHIPMARK , 0 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CHIPMARK ); @@ -21291,6 +21573,8 @@ REG64_FLD( MCA_HWMS7_CHIPMARK_LEN , 8 , SH_UN SH_FLD_CHIPMARK_LEN ); REG64_FLD( MCA_HWMS7_CONFIRMED , 8 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CONFIRMED ); +REG64_FLD( MCA_HWMS7_EXIT_1 , 9 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_EXIT_1 ); REG64_FLD( MCA_MASK_FIR , 0 , SH_UNT_MCA , SH_ACS_SCOM2_OR , SH_FLD_FIR ); @@ -21325,19 +21609,21 @@ REG64_FLD( MCA_MBACALFIRQ_CMD_PARITY_ERROR , 12 , SH_UN SH_FLD_CMD_PARITY_ERROR ); REG64_FLD( MCA_MBACALFIRQ_PORT_FAIL , 13 , SH_UNT_MCA , SH_ACS_SCOM2_OR , SH_FLD_PORT_FAIL ); -REG64_FLD( MCA_MBACALFIRQ_INTERNAL_SCOM_ERROR , 14 , SH_UNT_MCA , SH_ACS_SCOM2_OR , +REG64_FLD( MCA_MBACALFIRQ_RCD_CAL_PARITY_ERROR , 14 , SH_UNT_MCA , SH_ACS_SCOM2_OR , + SH_FLD_RCD_CAL_PARITY_ERROR ); +REG64_FLD( MCA_MBACALFIRQ_INTERNAL_SCOM_ERROR , 15 , SH_UNT_MCA , SH_ACS_SCOM2_OR , SH_FLD_INTERNAL_SCOM_ERROR ); -REG64_FLD( MCA_MBACALFIRQ_INTERNAL_SCOM_ERROR_COPY , 15 , SH_UNT_MCA , SH_ACS_SCOM2_OR , +REG64_FLD( MCA_MBACALFIRQ_INTERNAL_SCOM_ERROR_COPY , 16 , SH_UNT_MCA , SH_ACS_SCOM2_OR , SH_FLD_INTERNAL_SCOM_ERROR_COPY ); REG64_FLD( MCA_MBACALFIR_ACTION0_FIR , 0 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_FIR ); -REG64_FLD( MCA_MBACALFIR_ACTION0_FIR_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_MBACALFIR_ACTION0_FIR_LEN , 17 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_FIR_LEN ); REG64_FLD( MCA_MBACALFIR_ACTION1_FIR , 0 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_FIR ); -REG64_FLD( MCA_MBACALFIR_ACTION1_FIR_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_MBACALFIR_ACTION1_FIR_LEN , 17 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_FIR_LEN ); REG64_FLD( MCA_MBACALFIR_MASK_MBA_RECOVERABLE_ERROR , 0 , SH_UNT_MCA , SH_ACS_SCOM2_OR , @@ -21366,11 +21652,13 @@ REG64_FLD( MCA_MBACALFIR_MASK_ASYNC_IF_ERROR , 11 , SH_UN SH_FLD_ASYNC_IF_ERROR ); REG64_FLD( MCA_MBACALFIR_MASK_CMD_PARITY_ERROR , 12 , SH_UNT_MCA , SH_ACS_SCOM2_OR , SH_FLD_CMD_PARITY_ERROR ); -REG64_FLD( MCA_MBACALFIR_MASK_RESERVED_13 , 13 , SH_UNT_MCA , SH_ACS_SCOM2_OR , - SH_FLD_RESERVED_13 ); -REG64_FLD( MCA_MBACALFIR_MASK_INTERNAL_SCOM_ERROR , 14 , SH_UNT_MCA , SH_ACS_SCOM2_OR , +REG64_FLD( MCA_MBACALFIR_MASK_MBACALFIRQ_PORT_FAIL , 13 , SH_UNT_MCA , SH_ACS_SCOM2_OR , + SH_FLD_MBACALFIRQ_PORT_FAIL ); +REG64_FLD( MCA_MBACALFIR_MASK_MBACALFIRQ_RCD_CAL_PARITY_ERROR , 14 , SH_UNT_MCA , SH_ACS_SCOM2_OR , + SH_FLD_MBACALFIRQ_RCD_CAL_PARITY_ERROR ); +REG64_FLD( MCA_MBACALFIR_MASK_INTERNAL_SCOM_ERROR , 15 , SH_UNT_MCA , SH_ACS_SCOM2_OR , SH_FLD_INTERNAL_SCOM_ERROR ); -REG64_FLD( MCA_MBACALFIR_MASK_INTERNAL_SCOM_ERROR_COPY , 15 , SH_UNT_MCA , SH_ACS_SCOM2_OR , +REG64_FLD( MCA_MBACALFIR_MASK_INTERNAL_SCOM_ERROR_COPY , 16 , SH_UNT_MCA , SH_ACS_SCOM2_OR , SH_FLD_INTERNAL_SCOM_ERROR_COPY ); REG64_FLD( MCA_MBAREF0Q_CFG_REFRESH_ENABLE , 0 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -22019,10 +22307,14 @@ REG64_FLD( MCA_MBA_FARB0Q_CFG_MISR_FEEDBACK_ENABLE , 16 , SH_UN SH_FLD_CFG_MISR_FEEDBACK_ENABLE ); REG64_FLD( MCA_MBA_FARB0Q_CFG_2N_ADDR , 17 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CFG_2N_ADDR ); -REG64_FLD( MCA_MBA_FARB0Q_RESERVED_18_23 , 18 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_RESERVED_18_23 ); -REG64_FLD( MCA_MBA_FARB0Q_RESERVED_18_23_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_RESERVED_18_23_LEN ); +REG64_FLD( MCA_MBA_FARB0Q_RESERVED_18_19 , 18 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RESERVED_18_19 ); +REG64_FLD( MCA_MBA_FARB0Q_RESERVED_18_19_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RESERVED_18_19_LEN ); +REG64_FLD( MCA_MBA_FARB0Q_CFG_ACT_SAME_RANK_HOLD_TIME , 20 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_CFG_ACT_SAME_RANK_HOLD_TIME ); +REG64_FLD( MCA_MBA_FARB0Q_CFG_ACT_SAME_RANK_HOLD_TIME_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_CFG_ACT_SAME_RANK_HOLD_TIME_LEN ); REG64_FLD( MCA_MBA_FARB0Q_CFG_MAX_READS_IN_A_ROW , 24 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CFG_MAX_READS_IN_A_ROW ); REG64_FLD( MCA_MBA_FARB0Q_CFG_MAX_READS_IN_A_ROW_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -22055,8 +22347,8 @@ REG64_FLD( MCA_MBA_FARB0Q_CFG_OE_ALWAYS_ON , 55 , SH_UN SH_FLD_CFG_OE_ALWAYS_ON ); REG64_FLD( MCA_MBA_FARB0Q_CFG_FARB_CLOSE_ALL_PAGES , 56 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CFG_FARB_CLOSE_ALL_PAGES ); -REG64_FLD( MCA_MBA_FARB0Q_CFG_DISABLE_REFRESH_DURING_NOISE_WDW , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_CFG_DISABLE_REFRESH_DURING_NOISE_WDW ); +REG64_FLD( MCA_MBA_FARB0Q_RESERVED_57 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RESERVED_57 ); REG64_FLD( MCA_MBA_FARB0Q_CFG_OE_ALL_CKE_POWERED_DOWN , 58 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CFG_OE_ALL_CKE_POWERED_DOWN ); REG64_FLD( MCA_MBA_FARB0Q_CFG_INJECT_PARITY_ERR_CONSTANT , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , @@ -22289,32 +22581,30 @@ REG64_FLD( MCA_MBA_FARB5Q_RESERVED_56_63 , 9 , SH_UN REG64_FLD( MCA_MBA_FARB5Q_RESERVED_56_63_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_RESERVED_56_63_LEN ); -REG64_FLD( MCA_MBA_FARB6Q_RESERVED_0_1 , 0 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_RESERVED_0_1 ); -REG64_FLD( MCA_MBA_FARB6Q_RESERVED_0_1_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_RESERVED_0_1_LEN ); -REG64_FLD( MCA_MBA_FARB6Q_CFG_BW_SNAPSHOT , 2 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_MBA_FARB6Q_CFG_BW_SNAPSHOT , 0 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_CFG_BW_SNAPSHOT ); REG64_FLD( MCA_MBA_FARB6Q_CFG_BW_SNAPSHOT_LEN , 10 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_CFG_BW_SNAPSHOT_LEN ); -REG64_FLD( MCA_MBA_FARB6Q_CFG_CKE_PUP_STATE , 12 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_MBA_FARB6Q_CFG_CKE_PUP_STATE , 10 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_CFG_CKE_PUP_STATE ); REG64_FLD( MCA_MBA_FARB6Q_CFG_CKE_PUP_STATE_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_CFG_CKE_PUP_STATE_LEN ); -REG64_FLD( MCA_MBA_FARB6Q_CFG_STR_STATE , 16 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_MBA_FARB6Q_CFG_STR_STATE , 14 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_CFG_STR_STATE ); -REG64_FLD( MCA_MBA_FARB6Q_CFG_RRQ_DEPTH , 17 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_MBA_FARB6Q_CFG_RRQ_DEPTH , 15 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_CFG_RRQ_DEPTH ); REG64_FLD( MCA_MBA_FARB6Q_CFG_RRQ_DEPTH_LEN , 5 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_CFG_RRQ_DEPTH_LEN ); -REG64_FLD( MCA_MBA_FARB6Q_CFG_WRQ_DEPTH , 22 , SH_UNT_MCA , SH_ACS_SCOM_RO , +REG64_FLD( MCA_MBA_FARB6Q_CFG_WRQ_DEPTH , 20 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_CFG_WRQ_DEPTH ); REG64_FLD( MCA_MBA_FARB6Q_CFG_WRQ_DEPTH_LEN , 6 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_CFG_WRQ_DEPTH_LEN ); -REG64_FLD( MCA_MBA_FARB6Q_RESERVED_28_31 , 28 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_RESERVED_28_31 ); -REG64_FLD( MCA_MBA_FARB6Q_RESERVED_28_31_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_RESERVED_28_31_LEN ); +REG64_FLD( MCA_MBA_FARB6Q_CFG_RCD_PARITY_DLY , 26 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_CFG_RCD_PARITY_DLY ); +REG64_FLD( MCA_MBA_FARB6Q_CFG_RCD_PARITY_DLY_LEN , 5 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_CFG_RCD_PARITY_DLY_LEN ); +REG64_FLD( MCA_MBA_FARB6Q_RESERVED_31 , 31 , SH_UNT_MCA , SH_ACS_SCOM_RO , + SH_FLD_RESERVED_31 ); REG64_FLD( MCA_MBA_FARB7Q_EMER_THROTTLE_IP , 0 , SH_UNT_MCA , SH_ACS_SCOM , SH_FLD_EMER_THROTTLE_IP ); @@ -22351,6 +22641,8 @@ REG64_FLD( MCBIST_MBA_MCBERRPTQ_WRD_MCBIST_OUT_OF_SYNC_HOLD_OUT , 11 , SH_UN SH_FLD_WRD_MCBIST_OUT_OF_SYNC_HOLD_OUT ); REG64_FLD( MCBIST_MBA_MCBERRPTQ_SRQ_CCS_UNEXPECTED_PORT_ACTIVE_HOLD_OUT , 12 , SH_UNT_MCBIST , SH_ACS_SCOM_RO , SH_FLD_SRQ_CCS_UNEXPECTED_PORT_ACTIVE_HOLD_OUT ); +REG64_FLD( MCBIST_MBA_MCBERRPTQ_FATAL_CNFG_HOLD_OUT , 13 , SH_UNT_MCBIST , SH_ACS_SCOM_RO , + SH_FLD_FATAL_CNFG_HOLD_OUT ); REG64_FLD( MCA_MBA_PMU0Q_READ_COUNT , 0 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_READ_COUNT ); @@ -22585,14 +22877,14 @@ REG64_FLD( MCA_MBA_RRQ0Q_RESERVED_37_56_LEN , 20 , SH_UN SH_FLD_RESERVED_37_56_LEN ); REG64_FLD( MCA_MBA_RRQ0Q_CFG_RRQ_ACT_NUM_READS_PENDING , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CFG_RRQ_ACT_NUM_READS_PENDING ); -REG64_FLD( MCA_MBA_RRQ0Q_CFG_RRQ_ACT_NUM_READS_PENDING_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_MBA_RRQ0Q_CFG_RRQ_ACT_NUM_READS_PENDING_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CFG_RRQ_ACT_NUM_READS_PENDING_LEN ); -REG64_FLD( MCA_MBA_RRQ0Q_CFG_INJ_CANCEL_ACK_ERR , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_MBA_RRQ0Q_CFG_INJ_CANCEL_ACK_ERR , 61 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CFG_INJ_CANCEL_ACK_ERR ); -REG64_FLD( MCA_MBA_RRQ0Q_RESERVED_60_63 , 60 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_RESERVED_60_63 ); -REG64_FLD( MCA_MBA_RRQ0Q_RESERVED_60_63_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_RESERVED_60_63_LEN ); +REG64_FLD( MCA_MBA_RRQ0Q_CFG_RRQ_ENTRY0_ENABLE , 62 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_CFG_RRQ_ENTRY0_ENABLE ); +REG64_FLD( MCA_MBA_RRQ0Q_RESERVED_63 , 63 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RESERVED_63 ); REG64_FLD( MCA_MBA_TMR0Q_RRDM_DLY , 0 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_RRDM_DLY ); @@ -22755,12 +23047,12 @@ REG64_FLD( MCA_MBA_WRQ0Q_RESERVED_53_54_LEN , 2 , SH_UN SH_FLD_RESERVED_53_54_LEN ); REG64_FLD( MCA_MBA_WRQ0Q_CFG_WRQ_ACT_NUM_WRITES_PENDING , 55 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CFG_WRQ_ACT_NUM_WRITES_PENDING ); -REG64_FLD( MCA_MBA_WRQ0Q_CFG_WRQ_ACT_NUM_WRITES_PENDING_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , +REG64_FLD( MCA_MBA_WRQ0Q_CFG_WRQ_ACT_NUM_WRITES_PENDING_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_CFG_WRQ_ACT_NUM_WRITES_PENDING_LEN ); -REG64_FLD( MCA_MBA_WRQ0Q_RESERVED_57_63 , 57 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_RESERVED_57_63 ); -REG64_FLD( MCA_MBA_WRQ0Q_RESERVED_57_63_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , - SH_FLD_RESERVED_57_63_LEN ); +REG64_FLD( MCA_MBA_WRQ0Q_RESERVED_59_63 , 59 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RESERVED_59_63 ); +REG64_FLD( MCA_MBA_WRQ0Q_RESERVED_59_63_LEN , 5 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_RESERVED_59_63_LEN ); REG64_FLD( MCBIST_MBECTLQ_ATOMIC_ALT_CE_INJ , 0 , SH_UNT_MCBIST , SH_ACS_SCOM_RW , SH_FLD_ATOMIC_ALT_CE_INJ ); @@ -23943,10 +24235,12 @@ REG64_FLD( MCBIST_MCBMCATQ_CFG_CURRENT_ADDR_TRAP , 0 , SH_UN SH_FLD_CFG_CURRENT_ADDR_TRAP ); REG64_FLD( MCBIST_MCBMCATQ_CFG_CURRENT_ADDR_TRAP_LEN , 38 , SH_UNT_MCBIST , SH_ACS_SCOM_RW , SH_FLD_CFG_CURRENT_ADDR_TRAP_LEN ); -REG64_FLD( MCBIST_MCBMCATQ_CFG_CURRENT_PORT_DIMM_TRAP , 38 , SH_UNT_MCBIST , SH_ACS_SCOM_RW , - SH_FLD_CFG_CURRENT_PORT_DIMM_TRAP ); -REG64_FLD( MCBIST_MCBMCATQ_CFG_CURRENT_PORT_DIMM_TRAP_LEN , 3 , SH_UNT_MCBIST , SH_ACS_SCOM_RW , - SH_FLD_CFG_CURRENT_PORT_DIMM_TRAP_LEN ); +REG64_FLD( MCBIST_MCBMCATQ_CFG_CURRENT_PORT_TRAP , 38 , SH_UNT_MCBIST , SH_ACS_SCOM_RW , + SH_FLD_CFG_CURRENT_PORT_TRAP ); +REG64_FLD( MCBIST_MCBMCATQ_CFG_CURRENT_PORT_TRAP_LEN , 2 , SH_UNT_MCBIST , SH_ACS_SCOM_RW , + SH_FLD_CFG_CURRENT_PORT_TRAP_LEN ); +REG64_FLD( MCBIST_MCBMCATQ_CFG_CURRENT_DIMM_TRAP , 40 , SH_UNT_MCBIST , SH_ACS_SCOM_RW , + SH_FLD_CFG_CURRENT_DIMM_TRAP ); REG64_FLD( MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_OP_TYPE , 0 , SH_UNT_MCBIST , SH_ACS_SCOM_RW , SH_FLD_MCBIST_CFG_TEST00_OP_TYPE ); @@ -26000,10 +26294,14 @@ REG64_FLD( MCS_PORT02_MCPERF2_NUM_RMW_BUF , 50 , SH_UN SH_FLD_NUM_RMW_BUF ); REG64_FLD( MCS_PORT02_MCPERF2_NUM_RMW_BUF_LEN , 5 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , SH_FLD_NUM_RMW_BUF_LEN ); -REG64_FLD( MCS_PORT02_MCPERF2_RESERVED_55_62 , 55 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , - SH_FLD_RESERVED_55_62 ); -REG64_FLD( MCS_PORT02_MCPERF2_RESERVED_55_62_LEN , 8 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , - SH_FLD_RESERVED_55_62_LEN ); +REG64_FLD( MCS_PORT02_MCPERF2_RMW_BUF_THRESH , 55 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_RMW_BUF_THRESH ); +REG64_FLD( MCS_PORT02_MCPERF2_RMW_BUF_THRESH_LEN , 5 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_RMW_BUF_THRESH_LEN ); +REG64_FLD( MCS_PORT02_MCPERF2_RESERVED_60_62 , 60 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_RESERVED_60_62 ); +REG64_FLD( MCS_PORT02_MCPERF2_RESERVED_60_62_LEN , 3 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_RESERVED_60_62_LEN ); REG64_FLD( MCS_PORT02_MCPERF2_LOAD_RSVD_VALUES , 63 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , SH_FLD_LOAD_RSVD_VALUES ); @@ -26073,13 +26371,99 @@ REG64_FLD( MCS_PORT13_MCPERF2_NUM_RMW_BUF , 50 , SH_UN SH_FLD_NUM_RMW_BUF ); REG64_FLD( MCS_PORT13_MCPERF2_NUM_RMW_BUF_LEN , 5 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , SH_FLD_NUM_RMW_BUF_LEN ); -REG64_FLD( MCS_PORT13_MCPERF2_RESERVED_55_62 , 55 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , - SH_FLD_RESERVED_55_62 ); -REG64_FLD( MCS_PORT13_MCPERF2_RESERVED_55_62_LEN , 8 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , - SH_FLD_RESERVED_55_62_LEN ); +REG64_FLD( MCS_PORT13_MCPERF2_RMW_BUF_THRESH , 55 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_RMW_BUF_THRESH ); +REG64_FLD( MCS_PORT13_MCPERF2_RMW_BUF_THRESH_LEN , 5 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_RMW_BUF_THRESH_LEN ); +REG64_FLD( MCS_PORT13_MCPERF2_RESERVED_60_62 , 60 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_RESERVED_60_62 ); +REG64_FLD( MCS_PORT13_MCPERF2_RESERVED_60_62_LEN , 3 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_RESERVED_60_62_LEN ); REG64_FLD( MCS_PORT13_MCPERF2_LOAD_RSVD_VALUES , 63 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , SH_FLD_LOAD_RSVD_VALUES ); +REG64_FLD( MCS_PORT02_MCPERF3_EN_DROP_PLS_F_FULL , 0 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_EN_DROP_PLS_F_FULL ); +REG64_FLD( MCS_PORT02_MCPERF3_DIS_DROPABLE_HP , 1 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_DIS_DROPABLE_HP ); +REG64_FLD( MCS_PORT02_MCPERF3_EN_PF_CONF_RETRY , 2 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_EN_PF_CONF_RETRY ); +REG64_FLD( MCS_PORT02_MCPERF3_DROP_PLS_DIV00 , 3 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_DROP_PLS_DIV00 ); +REG64_FLD( MCS_PORT02_MCPERF3_DROP_PLS_DIV00_LEN , 3 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_DROP_PLS_DIV00_LEN ); +REG64_FLD( MCS_PORT02_MCPERF3_DROP_PLS_DIV01 , 6 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_DROP_PLS_DIV01 ); +REG64_FLD( MCS_PORT02_MCPERF3_DROP_PLS_DIV01_LEN , 3 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_DROP_PLS_DIV01_LEN ); +REG64_FLD( MCS_PORT02_MCPERF3_DROP_PLS_DIV10 , 9 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_DROP_PLS_DIV10 ); +REG64_FLD( MCS_PORT02_MCPERF3_DROP_PLS_DIV10_LEN , 3 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_DROP_PLS_DIV10_LEN ); +REG64_FLD( MCS_PORT02_MCPERF3_DROP_PLS_DIV11 , 12 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_DROP_PLS_DIV11 ); +REG64_FLD( MCS_PORT02_MCPERF3_DROP_PLS_DIV11_LEN , 3 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_DROP_PLS_DIV11_LEN ); +REG64_FLD( MCS_PORT02_MCPERF3_PF_CONF_RETRY_THRESH0 , 15 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_PF_CONF_RETRY_THRESH0 ); +REG64_FLD( MCS_PORT02_MCPERF3_PF_CONF_RETRY_THRESH0_LEN , 4 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_PF_CONF_RETRY_THRESH0_LEN ); +REG64_FLD( MCS_PORT02_MCPERF3_PF_CONF_RETRY_THRESH1 , 19 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_PF_CONF_RETRY_THRESH1 ); +REG64_FLD( MCS_PORT02_MCPERF3_PF_CONF_RETRY_THRESH1_LEN , 4 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_PF_CONF_RETRY_THRESH1_LEN ); +REG64_FLD( MCS_PORT02_MCPERF3_PF_CONF_RETRY_THRESH2 , 23 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_PF_CONF_RETRY_THRESH2 ); +REG64_FLD( MCS_PORT02_MCPERF3_PF_CONF_RETRY_THRESH2_LEN , 4 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_PF_CONF_RETRY_THRESH2_LEN ); +REG64_FLD( MCS_PORT02_MCPERF3_PF_CONF_RETRY_THRESH3 , 27 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_PF_CONF_RETRY_THRESH3 ); +REG64_FLD( MCS_PORT02_MCPERF3_PF_CONF_RETRY_THRESH3_LEN , 4 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_PF_CONF_RETRY_THRESH3_LEN ); +REG64_FLD( MCS_PORT02_MCPERF3_RESERVED31 , 31 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_RESERVED31 ); + +REG64_FLD( MCS_PORT13_MCPERF3_EN_DROP_PLS_F_FULL , 0 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_EN_DROP_PLS_F_FULL ); +REG64_FLD( MCS_PORT13_MCPERF3_DIS_DROPABLE_HP , 1 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_DIS_DROPABLE_HP ); +REG64_FLD( MCS_PORT13_MCPERF3_EN_PF_CONF_RETRY , 2 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_EN_PF_CONF_RETRY ); +REG64_FLD( MCS_PORT13_MCPERF3_DROP_PLS_DIV00 , 3 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_DROP_PLS_DIV00 ); +REG64_FLD( MCS_PORT13_MCPERF3_DROP_PLS_DIV00_LEN , 3 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_DROP_PLS_DIV00_LEN ); +REG64_FLD( MCS_PORT13_MCPERF3_DROP_PLS_DIV01 , 6 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_DROP_PLS_DIV01 ); +REG64_FLD( MCS_PORT13_MCPERF3_DROP_PLS_DIV01_LEN , 3 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_DROP_PLS_DIV01_LEN ); +REG64_FLD( MCS_PORT13_MCPERF3_DROP_PLS_DIV10 , 9 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_DROP_PLS_DIV10 ); +REG64_FLD( MCS_PORT13_MCPERF3_DROP_PLS_DIV10_LEN , 3 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_DROP_PLS_DIV10_LEN ); +REG64_FLD( MCS_PORT13_MCPERF3_DROP_PLS_DIV11 , 12 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_DROP_PLS_DIV11 ); +REG64_FLD( MCS_PORT13_MCPERF3_DROP_PLS_DIV11_LEN , 3 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_DROP_PLS_DIV11_LEN ); +REG64_FLD( MCS_PORT13_MCPERF3_PF_CONF_RETRY_THRESH0 , 15 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_PF_CONF_RETRY_THRESH0 ); +REG64_FLD( MCS_PORT13_MCPERF3_PF_CONF_RETRY_THRESH0_LEN , 4 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_PF_CONF_RETRY_THRESH0_LEN ); +REG64_FLD( MCS_PORT13_MCPERF3_PF_CONF_RETRY_THRESH1 , 19 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_PF_CONF_RETRY_THRESH1 ); +REG64_FLD( MCS_PORT13_MCPERF3_PF_CONF_RETRY_THRESH1_LEN , 4 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_PF_CONF_RETRY_THRESH1_LEN ); +REG64_FLD( MCS_PORT13_MCPERF3_PF_CONF_RETRY_THRESH2 , 23 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_PF_CONF_RETRY_THRESH2 ); +REG64_FLD( MCS_PORT13_MCPERF3_PF_CONF_RETRY_THRESH2_LEN , 4 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_PF_CONF_RETRY_THRESH2_LEN ); +REG64_FLD( MCS_PORT13_MCPERF3_PF_CONF_RETRY_THRESH3 , 27 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_PF_CONF_RETRY_THRESH3 ); +REG64_FLD( MCS_PORT13_MCPERF3_PF_CONF_RETRY_THRESH3_LEN , 4 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_PF_CONF_RETRY_THRESH3_LEN ); +REG64_FLD( MCS_PORT13_MCPERF3_RESERVED31 , 31 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_RESERVED31 ); + REG64_FLD( MCS_MCSYNC_CHANNEL_SELECT , 0 , SH_UNT_MCS , SH_ACS_SCOM_RW , SH_FLD_CHANNEL_SELECT ); REG64_FLD( MCS_MCSYNC_CHANNEL_SELECT_LEN , 8 , SH_UNT_MCS , SH_ACS_SCOM_RW , @@ -26132,6 +26516,129 @@ REG64_FLD( MCS_MCTO_ENABLE_APO_HANG , 34 , SH_UN REG64_FLD( MCS_MCTO_ENABLE_CLIB_HANG , 35 , SH_UNT_MCS , SH_ACS_SCOM_RW , SH_FLD_ENABLE_CLIB_HANG ); +REG64_FLD( MCS_PORT02_MCWAT_WAT_STALL_ACTION , 0 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_WAT_STALL_ACTION ); +REG64_FLD( MCS_PORT02_MCWAT_WAT_STALL_ACTION_LEN , 4 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_WAT_STALL_ACTION_LEN ); +REG64_FLD( MCS_PORT02_MCWAT_RESERVED4 , 4 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_RESERVED4 ); +REG64_FLD( MCS_PORT02_MCWAT_CLSTATE_DEBUG_SEL , 5 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_CLSTATE_DEBUG_SEL ); +REG64_FLD( MCS_PORT02_MCWAT_CLSTATE_DEBUG_SEL_LEN , 3 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_CLSTATE_DEBUG_SEL_LEN ); +REG64_FLD( MCS_PORT02_MCWAT_RESERVED8_9 , 8 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_RESERVED8_9 ); +REG64_FLD( MCS_PORT02_MCWAT_RESERVED8_9_LEN , 2 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_RESERVED8_9_LEN ); +REG64_FLD( MCS_PORT02_MCWAT_DISP_DEBUG_SEL , 10 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_DISP_DEBUG_SEL ); +REG64_FLD( MCS_PORT02_MCWAT_DISP_DEBUG_SEL_LEN , 2 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_DISP_DEBUG_SEL_LEN ); +REG64_FLD( MCS_PORT02_MCWAT_CL_WRAP_DEBUG_SEL , 12 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_CL_WRAP_DEBUG_SEL ); +REG64_FLD( MCS_PORT02_MCWAT_CL_WRAP_DEBUG_SEL_LEN , 5 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_CL_WRAP_DEBUG_SEL_LEN ); +REG64_FLD( MCS_PORT02_MCWAT_WAT_ACTION_SEL , 17 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_WAT_ACTION_SEL ); +REG64_FLD( MCS_PORT02_MCWAT_WAT_ACTION_SEL_LEN , 5 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_WAT_ACTION_SEL_LEN ); +REG64_FLD( MCS_PORT02_MCWAT_RESERVED22_31 , 22 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_RESERVED22_31 ); +REG64_FLD( MCS_PORT02_MCWAT_RESERVED22_31_LEN , 10 , SH_UNT_MCS_PORT02, SH_ACS_SCOM3_RW , + SH_FLD_RESERVED22_31_LEN ); + +REG64_FLD( MCS_PORT13_MCWAT_WAT_STALL_ACTION , 0 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_WAT_STALL_ACTION ); +REG64_FLD( MCS_PORT13_MCWAT_WAT_STALL_ACTION_LEN , 4 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_WAT_STALL_ACTION_LEN ); +REG64_FLD( MCS_PORT13_MCWAT_RESERVED4 , 4 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_RESERVED4 ); +REG64_FLD( MCS_PORT13_MCWAT_CLSTATE_DEBUG_SEL , 5 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_CLSTATE_DEBUG_SEL ); +REG64_FLD( MCS_PORT13_MCWAT_CLSTATE_DEBUG_SEL_LEN , 3 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_CLSTATE_DEBUG_SEL_LEN ); +REG64_FLD( MCS_PORT13_MCWAT_RESERVED8_9 , 8 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_RESERVED8_9 ); +REG64_FLD( MCS_PORT13_MCWAT_RESERVED8_9_LEN , 2 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_RESERVED8_9_LEN ); +REG64_FLD( MCS_PORT13_MCWAT_DISP_DEBUG_SEL , 10 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_DISP_DEBUG_SEL ); +REG64_FLD( MCS_PORT13_MCWAT_DISP_DEBUG_SEL_LEN , 2 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_DISP_DEBUG_SEL_LEN ); +REG64_FLD( MCS_PORT13_MCWAT_CL_WRAP_DEBUG_SEL , 12 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_CL_WRAP_DEBUG_SEL ); +REG64_FLD( MCS_PORT13_MCWAT_CL_WRAP_DEBUG_SEL_LEN , 5 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_CL_WRAP_DEBUG_SEL_LEN ); +REG64_FLD( MCS_PORT13_MCWAT_WAT_ACTION_SEL , 17 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_WAT_ACTION_SEL ); +REG64_FLD( MCS_PORT13_MCWAT_WAT_ACTION_SEL_LEN , 5 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_WAT_ACTION_SEL_LEN ); +REG64_FLD( MCS_PORT13_MCWAT_RESERVED22_31 , 22 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_RESERVED22_31 ); +REG64_FLD( MCS_PORT13_MCWAT_RESERVED22_31_LEN , 10 , SH_UNT_MCS_PORT13, SH_ACS_SCOM3_RW , + SH_FLD_RESERVED22_31_LEN ); + +REG64_FLD( MCS_MCWATCNTL_ENABLE_WAT , 0 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_ENABLE_WAT ); +REG64_FLD( MCS_MCWATCNTL_SET_EXT_ARM , 1 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_SET_EXT_ARM ); +REG64_FLD( MCS_MCWATCNTL_SET_EXT_RESET , 2 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_SET_EXT_RESET ); +REG64_FLD( MCS_MCWATCNTL_SET_EXT_TRIGGER , 3 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_SET_EXT_TRIGGER ); +REG64_FLD( MCS_MCWATCNTL_WAT_CNTL_REG_SEL , 4 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_CNTL_REG_SEL ); +REG64_FLD( MCS_MCWATCNTL_WAT_CNTL_REG_SEL_LEN , 4 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_CNTL_REG_SEL_LEN ); +REG64_FLD( MCS_MCWATCNTL_WAT_EVENT_SEL , 8 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_EVENT_SEL ); +REG64_FLD( MCS_MCWATCNTL_WAT_EVENT_SEL_LEN , 2 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_EVENT_SEL_LEN ); +REG64_FLD( MCS_MCWATCNTL_WAT_EXT_SEL , 10 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_EXT_SEL ); +REG64_FLD( MCS_MCWATCNTL_WAT_EXT_SEL_LEN , 2 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_EXT_SEL_LEN ); +REG64_FLD( MCS_MCWATCNTL_WAT_LOCAL_EVENT_SEL , 12 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_LOCAL_EVENT_SEL ); +REG64_FLD( MCS_MCWATCNTL_WAT_LOCAL_EVENT_SEL_LEN , 2 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_LOCAL_EVENT_SEL_LEN ); +REG64_FLD( MCS_MCWATCNTL_WAT_EXT_EVENT_TO_INT_SEL , 14 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_EXT_EVENT_TO_INT_SEL ); +REG64_FLD( MCS_MCWATCNTL_WAT_EXT_EVENT_TO_INT_SEL_LEN , 2 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_EXT_EVENT_TO_INT_SEL_LEN ); +REG64_FLD( MCS_MCWATCNTL_WAT_GLOB_EVENT0_SEL , 16 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_GLOB_EVENT0_SEL ); +REG64_FLD( MCS_MCWATCNTL_WAT_GLOB_EVENT0_SEL_LEN , 3 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_GLOB_EVENT0_SEL_LEN ); +REG64_FLD( MCS_MCWATCNTL_WAT_GLOB_EVENT1_SEL , 19 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_GLOB_EVENT1_SEL ); +REG64_FLD( MCS_MCWATCNTL_WAT_GLOB_EVENT1_SEL_LEN , 3 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_GLOB_EVENT1_SEL_LEN ); +REG64_FLD( MCS_MCWATCNTL_WAT_GLOB_EVENT2_SEL , 22 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_GLOB_EVENT2_SEL ); +REG64_FLD( MCS_MCWATCNTL_WAT_GLOB_EVENT2_SEL_LEN , 3 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_GLOB_EVENT2_SEL_LEN ); +REG64_FLD( MCS_MCWATCNTL_WAT_GLOB_EVENT3_SEL , 25 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_GLOB_EVENT3_SEL ); +REG64_FLD( MCS_MCWATCNTL_WAT_GLOB_EVENT3_SEL_LEN , 3 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_WAT_GLOB_EVENT3_SEL_LEN ); +REG64_FLD( MCS_MCWATCNTL_RESERVED_28_31 , 28 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_RESERVED_28_31 ); +REG64_FLD( MCS_MCWATCNTL_RESERVED_28_31_LEN , 4 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_RESERVED_28_31_LEN ); +REG64_FLD( MCS_MCWATCNTL_PBI_DEBUG_SEL , 32 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_PBI_DEBUG_SEL ); +REG64_FLD( MCS_MCWATCNTL_PBI_DEBUG_SEL_LEN , 4 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_PBI_DEBUG_SEL_LEN ); +REG64_FLD( MCS_MCWATCNTL_RCTRL_DEBUG_SEL , 36 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_RCTRL_DEBUG_SEL ); +REG64_FLD( MCS_MCWATCNTL_RCTRL_DEBUG_SEL_LEN , 3 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_RCTRL_DEBUG_SEL_LEN ); +REG64_FLD( MCS_MCWATCNTL_RESERVED_39_63 , 39 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_RESERVED_39_63 ); +REG64_FLD( MCS_MCWATCNTL_RESERVED_39_63_LEN , 25 , SH_UNT_MCS , SH_ACS_SCOM_RW , + SH_FLD_RESERVED_39_63_LEN ); + REG64_FLD( MCA_MSR_CHIPMARK , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_CHIPMARK ); REG64_FLD( MCA_MSR_CHIPMARK_LEN , 8 , SH_UNT_MCA , SH_ACS_SCOM_RO , @@ -26414,135 +26921,6 @@ REG64_FLD( MCBIST_RUNTIMECTRQ_CFG_RUNTIME_CTR , 0 , SH_UN REG64_FLD( MCBIST_RUNTIMECTRQ_CFG_RUNTIME_CTR_LEN , 37 , SH_UNT_MCBIST , SH_ACS_SCOM_RW , SH_FLD_CFG_RUNTIME_CTR_LEN ); -REG64_FLD( MCA_SECURE_PIB_MASTER_ID_REG_MASTERS , 0 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MASTERS ); -REG64_FLD( MCA_SECURE_PIB_MASTER_ID_REG_MASTERS_LEN , 16 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MASTERS_LEN ); - -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_HI_DATA_REG_DATA , 0 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_DATA ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_HI_DATA_REG_DATA_LEN , 64 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_DATA_LEN ); - -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_LO_DATA_REG_DATA , 0 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_DATA ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_LO_DATA_REG_DATA_LEN , 32 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_DATA_LEN ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_LO_DATA_REG_ADDRESS , 32 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_ADDRESS ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_LO_DATA_REG_ADDRESS_LEN , 10 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_ADDRESS_LEN ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_LO_DATA_REG_LAST_BANK , 42 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_LAST_BANK ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_LO_DATA_REG_LAST_BANK_LEN , 9 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_LAST_BANK_LEN ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_LO_DATA_REG_LAST_BANK_VALID , 51 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_LAST_BANK_VALID ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_LO_DATA_REG_WRITE_ON_RUN , 52 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_WRITE_ON_RUN ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_LO_DATA_REG_RUNNING , 53 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_RUNNING ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_LO_DATA_REG_HOLD_ADDRESS , 54 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_HOLD_ADDRESS ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_LO_DATA_REG_HOLD_ADDRESS_LEN , 10 , SH_UNT_MCA , SH_ACS_SCOM_RO , - SH_FLD_HOLD_ADDRESS_LEN ); - -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRCTRL_CONFIG_STORE_ON_TRIG_MODE , 0 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_STORE_ON_TRIG_MODE ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRCTRL_CONFIG_STORE_ON_TRIG_MODE_LEN , 22 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_STORE_ON_TRIG_MODE_LEN ); - -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63 , 0 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_CMP_MSK_LT_B_TO_63 ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63_LEN , 64 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_CMP_MSK_LT_B_TO_63_LEN ); - -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87 , 0 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_CMP_MSK_LT_B_64_TO_87 ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87_LEN , 24 , SH_UNT_MCA , - SH_ACS_SCOM , SH_FLD_CMP_MSK_LT_B_64_TO_87_LEN ); - -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_2_PATTERNA , 0 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_PATTERNA ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_2_PATTERNA_LEN , 24 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_PATTERNA_LEN ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_2_PATTERNB , 24 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_PATTERNB ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_2_PATTERNB_LEN , 24 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_PATTERNB_LEN ); - -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_3_PATTERNC , 0 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_PATTERNC ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_3_PATTERNC_LEN , 24 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_PATTERNC_LEN ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_3_PATTERND , 24 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_PATTERND ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_3_PATTERND_LEN , 24 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_PATTERND_LEN ); - -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_4_MASKA , 0 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MASKA ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_4_MASKA_LEN , 24 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MASKA_LEN ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_4_MASKB , 24 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MASKB ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_4_MASKB_LEN , 24 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MASKB_LEN ); - -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_5_MASKC , 0 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MASKC ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_5_MASKC_LEN , 24 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MASKC_LEN ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_5_MASKD , 24 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MASKD ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_5_MASKD_LEN , 24 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MASKD_LEN ); - -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_DISABLE_COMPRESSION , 0 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_DISABLE_COMPRESSION ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_ERROR_BIT_COMPRESSION_CARE_MASK , 1 , SH_UNT_MCA , - SH_ACS_SCOM , SH_FLD_ERROR_BIT_COMPRESSION_CARE_MASK ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL , 2 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MATCHA_MUXSEL ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MATCHA_MUXSEL_LEN ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL , 4 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MATCHB_MUXSEL ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MATCHB_MUXSEL_LEN ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL , 6 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MATCHC_MUXSEL ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MATCHC_MUXSEL_LEN ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL , 8 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MATCHD_MUXSEL ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MATCHD_MUXSEL_LEN ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK , 10 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_TRIG0_OR_MASK ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_TRIG0_OR_MASK_LEN ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK , 14 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_TRIG0_AND_MASK ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_TRIG0_AND_MASK_LEN ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK , 18 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_TRIG1_OR_MASK ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_TRIG1_OR_MASK_LEN ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK , 22 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_TRIG1_AND_MASK ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_TRIG1_AND_MASK_LEN ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_TRIG0_NOT_MODE , 26 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_TRIG0_NOT_MODE ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_TRIG1_NOT_MODE , 27 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_TRIG1_NOT_MODE ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE , 28 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MATCH_NOT_MODE ); -REG64_FLD( MCA_TCMC01_FAST_TRA0_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE_LEN , 4 , SH_UNT_MCA , SH_ACS_SCOM , - SH_FLD_MATCH_NOT_MODE_LEN ); - REG64_FLD( MCA_TCMC01_SLOW_TRA0_TRACE_HI_DATA_REG_DATA , 0 , SH_UNT_MCA , SH_ACS_SCOM_RO , SH_FLD_DATA ); REG64_FLD( MCA_TCMC01_SLOW_TRA0_TRACE_HI_DATA_REG_DATA_LEN , 64 , SH_UNT_MCA , SH_ACS_SCOM_RO , diff --git a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H index b5e642f88..3a1a1a6d0 100644 --- a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H +++ b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H @@ -7,7 +7,7 @@ /* */ /* EKB Project */ /* */ -/* COPYRIGHT 2015 */ +/* COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -39,7 +39,7 @@ //FIXREG64_FLD( PU_ALTD_CMD_REG_FBC_WITH_TM_QUIESCE, 24, SH_UNT, SH_ACS_SCOM, SH_FLD_FBC_WITH_TM_QUIESCE, // 12); -const static uint64_t SH_FLD_COMMAND_LIST_TIMEOUT_SPEC = 99990000; +static const uint64_t SH_FLD_COMMAND_LIST_TIMEOUT_SPEC = 99990000; REG64_FLD( MCS_MCFIR_COMMAND_LIST_TIMEOUT_SPEC , 9 , SH_UNT_MCS , SH_ACS_SCOM2_OR , SH_FLD_COMMAND_LIST_TIMEOUT_SPEC ); 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