diff options
author | Mike Jones <mjjones@us.ibm.com> | 2013-10-25 16:30:27 -0500 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-10-29 14:41:02 -0500 |
commit | d6444009c8f621425623165e0fe46446dd862e75 (patch) | |
tree | 2d56f4ac963ee4c8f64c4996571f01471988dc10 /src/usr | |
parent | 5f8e74d3c82cea32ca8d74af6b66d95da6a4df12 (diff) | |
download | blackbird-hostboot-d6444009c8f621425623165e0fe46446dd862e75.tar.gz blackbird-hostboot-d6444009c8f621425623165e0fe46446dd862e75.zip |
Parse MRW to populate PM MRW attributes
Change-Id: I770e04e27be3f6f71045140a5272b7009ca6e4bb
RTC: 52835
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6888
Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com>
Reviewed-by: Donald E. Dahle <dedahle@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr')
-rwxr-xr-x | src/usr/targeting/common/genHwsvMrwXml.pl | 476 | ||||
-rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types.xml | 277 | ||||
-rw-r--r-- | src/usr/targeting/common/xmltohb/simics_MURANO.system.xml | 538 | ||||
-rw-r--r-- | src/usr/targeting/common/xmltohb/simics_VENICE.system.xml | 871 | ||||
-rw-r--r-- | src/usr/targeting/common/xmltohb/target_types.xml | 74 | ||||
-rw-r--r-- | src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml | 238 | ||||
-rw-r--r-- | src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml | 410 |
7 files changed, 1641 insertions, 1243 deletions
diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl index ec9a1b1c6..36aad2b64 100755 --- a/src/usr/targeting/common/genHwsvMrwXml.pl +++ b/src/usr/targeting/common/genHwsvMrwXml.pl @@ -53,6 +53,13 @@ use Data::Dumper; ################################################################################ $XML::Simple::PREFERRED_PARSER = 'XML::Parser'; +#------------------------------------------------------------------------------ +# Constants +#------------------------------------------------------------------------------ +use constant CHIP_NODE_INDEX => 0; # Position in array of chip's node +use constant CHIP_POS_INDEX => 1; # Position in array of chip's position +use constant CHIP_ATTR_START_INDEX => 2; # Position in array of start of attrs + our $mrwdir = ""; my $sysname = ""; my $usage = 0; @@ -96,103 +103,135 @@ if ($sysname eq "brazos") $MAXNODE = 4; } +#------------------------------------------------------------------------------ +# Process the system-policy MRW file +#------------------------------------------------------------------------------ open (FH, "<$mrwdir/${sysname}-system-policy.xml") || die "ERROR: unable to open $mrwdir/${sysname}-system-policy.xml\n"; close (FH); -my $policy = XMLin("$mrwdir/${sysname}-system-policy.xml"); +my $sysPolicy = XMLin("$mrwdir/${sysname}-system-policy.xml"); +my $reqPol = $sysPolicy->{"required-policy-settings"}; + +my @systemAttr; # Repeated {ATTR, VAL, ATTR, VAL, ATTR, VAL...} -my $SystemAttrs = XMLin("$mrwdir/${sysname}-system-policy.xml", - forcearray=>['required-policy-settings']); -my @systemAttr; +#TODO: SW187611 remove the hard core value for FREQ_CORE_FLOOR +#@TODO RTC: 66365 +# Setting ALL_MCS_IN_INTERLEAVING_GROUP to zero. Need to replace with: +# $reqPol->{'all_mcs_in_interleaving_group"} + +push @systemAttr, +[ + "FREQ_PROC_REFCLOCK", $reqPol->{'processor-refclock-frequency'}->{content}, + "FREQ_PROC_REFCLOCK_KHZ", + $reqPol->{'processor-refclock-frequency-khz'}->{content}, + "FREQ_MEM_REFCLOCK", $reqPol->{'memory-refclock-frequency'}->{content}, + "ALL_MCS_IN_INTERLEAVING_GROUP", "0", + "BOOT_FREQ_MHZ", $reqPol->{'boot-frequency'}->{content}, + "FREQ_A", $reqPol->{'proc_a_frequency'}->{content}, + "FREQ_CORE_FLOOR", "0x2580", + "FREQ_PB", $reqPol->{'proc_pb_frequency'}->{content}, + "NEST_FREQ_MHZ", $reqPol->{'proc_pb_frequency'}->{content}, + "FREQ_PCIE", $reqPol->{'proc_pcie_frequency'}->{content}, + "FREQ_X", $reqPol->{'proc_x_frequency'}->{content}, + "MSS_CLEANER_ENABLE", $reqPol->{'mss_cleaner_enable'}, + "MSS_MBA_ADDR_INTERLEAVE_BIT", $reqPol->{'mss_mba_addr_interleave_bit'}, + "MSS_MBA_CACHELINE_INTERLEAVE_MODE", + $reqPol->{'mss_mba_cacheline_interleave_mode'}, + "MSS_PREFETCH_ENABLE", $reqPol->{'mss_prefetch_enable'}, + "PROC_EPS_TABLE_TYPE", $reqPol->{'proc_eps_table_type'}, + "PROC_FABRIC_PUMP_MODE", $reqPol->{'proc_fabric_pump_mode'}, + "PROC_X_BUS_WIDTH", $reqPol->{'proc_x_bus_width'}, + "X_EREPAIR_THRESHOLD_FIELD", $reqPol->{'x-erepair-threshold-field'}, + "A_EREPAIR_THRESHOLD_FIELD", $reqPol->{'a-erepair-threshold-field'}, + "DMI_EREPAIR_THRESHOLD_FIELD", $reqPol->{'dmi-erepair-threshold-field'}, + "X_EREPAIR_THRESHOLD_MNFG", $reqPol->{'x-erepair-threshold-mnfg'}, + "A_EREPAIR_THRESHOLD_MNFG", $reqPol->{'a-erepair-threshold-mnfg'}, + "DMI_EREPAIR_THRESHOLD_MNFG", $reqPol->{'dmi-erepair-threshold-mnfg'}, + "MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA", + $reqPol->{'safemode_mem_throttle_numerator_per_mba'}, + "MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR", + $reqPol->{'safemode_mem_throttle_denominator'}, + "MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP", + $reqPol->{'safemode_mem_throttle_numerator_per_chip'}, + "MRW_THERMAL_MEMORY_POWER_LIMIT", $reqPol->{'thermal_memory_power_limit'}, + "PM_EXTERNAL_VRM_STEPSIZE", $reqPol->{'pm_external_vrm_stepsize'}, + "PM_EXTERNAL_VRM_STEPDELAY", $reqPol->{'pm_external_vrm_stepdelay'}, + "PM_SPIVID_FREQUENCY", $reqPol->{'pm_spivid_frequency'}->{content}, + "PM_SAFE_FREQUENCY", $reqPol->{'pm_safe_frequency'}->{content}, + "PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY", + $reqPol->{'pm_resonant_clock_full_clock_sector_buffer_frequency'}-> + {content}, + "PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY", + $reqPol->{'pm_resonant_clock_low_band_lower_frequency'}->{content}, + "PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY", + $reqPol->{'pm_resonant_clock_low_band_upper_frequency'}->{content}, + "PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY", + $reqPol->{'pm_resonant_clock_high_band_lower_frequency'}->{content}, + "PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY", + $reqPol->{'pm_resonant_clock_high_band_upper_frequency'}->{content}, + "PM_SPIPSS_FREQUENCY", $reqPol->{'pm_spipss_frequency'}->{content}, + "PROC_R_LOADLINE_VDD", $reqPol->{'proc_r_loadline_vdd'}, + "PROC_R_DISTLOSS_VDD", $reqPol->{'proc_r_distloss_vdd'}, + "PROC_VRM_VOFFSET_VDD", $reqPol->{'proc_vrm_voffset_vdd'}, + "PROC_R_LOADLINE_VCS", $reqPol->{'proc_r_loadline_vcs'}, + "PROC_R_DISTLOSS_VCS", $reqPol->{'proc_r_distloss_vcs'}, + "PROC_VRM_VOFFSET_VCS", $reqPol->{'proc_vrm_voffset_vcs'}, +]; + +#------------------------------------------------------------------------------ +# Process the pm-settings MRW file +#------------------------------------------------------------------------------ +open (FH, "<$mrwdir/${sysname}-pm-settings.xml") || + die "ERROR: unable to open $mrwdir/${sysname}-pm-settings.xml\n"; +close (FH); +my $pmSettings = XMLin("$mrwdir/${sysname}-pm-settings.xml"); -use constant SYS_ATTR_START_INDEX=>0; +my @pmChipAttr; # Repeated [NODE, POS, ATTR, VAL, ATTR, VAL, ATTR, VAL...] -foreach my $i (@{$SystemAttrs->{'required-policy-settings'}}) +foreach my $i (@{$pmSettings->{'processor-settings'}}) { - my $freqA = sprintf("0x%04X",$i->{'proc_a_frequency'}->{content}); - my $freqPB = sprintf("0x%04X",$i->{'proc_pb_frequency'}->{content}); - my $freqPCIE = sprintf("0x%04X",$i->{'proc_pcie_frequency'}->{content}); - my $freqX = sprintf("0x%04X",$i->{'proc_x_frequency'}->{content}); - my $freqBoot = sprintf("0x%04X",$i->{'boot-frequency'}->{content}); + push @pmChipAttr, + [ + $i->{target}->{node}, $i->{target}->{position}, + "PM_UNDERVOLTING_FRQ_MINIMUM", + $i->{pm_undervolting_frq_minimum}->{content}, + "PM_UNDERVOLTING_FREQ_MAXIMUM", + $i->{pm_undervolting_frq_maximum}->{content}, + "PM_SPIVID_PORT_ENABLE", $i->{pm_spivid_port_enable}, + "PM_APSS_CHIP_SELECT", $i->{pm_apss_chip_select}, + "PM_PBAX_NODEID", $i->{pm_pbax_nodeid}, + "PM_PBAX_CHIPID", $i->{pm_pbax_chipid}, + "PM_PBAX_BRDCST_ID_VECTOR", $i->{pm_pbax_brdcst_id_vector}, + "PM_SLEEP_ENTRY", $i->{pm_sleep_entry}, + "PM_SLEEP_EXIT", $i->{pm_sleep_exit}, + "PM_SLEEP_TYPE", $i->{pm_sleep_type}, + "PM_WINKLE_ENTRY", $i->{pm_winkle_entry}, + "PM_WINKLE_EXIT", $i->{pm_winkle_exit}, + "PM_WINKLE_TYPE", $i->{pm_winkle_type}, + ] +} - #TODO: SW187611 remove the hard core value for FREQ_CORE_FLOOR +my @SortedPmChipAttr = sort byNodePos @pmChipAttr; - push @systemAttr, ["ALL_MCS_IN_INTERLEAVING_GROUP", -#@TODO RTC: 66365 -# As a temporary workaround, ignoring value of ALL_MCS_IN_INTERLEAVING_GROUP -# and overwriting MRW supplied value with "0". Replace "0" with following -# line when it's time to remove the workaround -# $i->{all_mcs_in_interleaving_group}, - "0", - "BOOT_FREQ_MHZ", - $freqBoot, - "FREQ_A", - $freqA, - "FREQ_CORE_FLOOR", - "0x2580", - "FREQ_PB", - $freqPB, - "NEST_FREQ_MHZ", - $freqPB, - "FREQ_PCIE", - $freqPCIE, - "FREQ_X", - $freqX, - "MSS_CLEANER_ENABLE", - $i->{mss_cleaner_enable}, - "MSS_MBA_ADDR_INTERLEAVE_BIT", - $i->{mss_mba_addr_interleave_bit}, - "MSS_MBA_CACHELINE_INTERLEAVE_MODE", - $i->{mss_mba_cacheline_interleave_mode}, - "MSS_PREFETCH_ENABLE", - $i->{mss_prefetch_enable}, - "PROC_EPS_TABLE_TYPE", - $i->{proc_eps_table_type}, - "PROC_FABRIC_PUMP_MODE", - $i->{proc_fabric_pump_mode}, - "PROC_X_BUS_WIDTH", - $i->{proc_x_bus_width}, - "X_EREPAIR_THRESHOLD_FIELD", - $i->{"x-erepair-threshold-field"}, - "A_EREPAIR_THRESHOLD_FIELD", - $i->{"a-erepair-threshold-field"}, - "DMI_EREPAIR_THRESHOLD_FIELD", - $i->{"dmi-erepair-threshold-field"}, - "X_EREPAIR_THRESHOLD_MNFG", - $i->{"x-erepair-threshold-mnfg"}, - "A_EREPAIR_THRESHOLD_MNFG", - $i->{"a-erepair-threshold-mnfg"}, - "DMI_EREPAIR_THRESHOLD_MNFG", - $i->{"dmi-erepair-threshold-mnfg"}, - "MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA", - $i->{"safemode_mem_throttle_numerator_per_mba"}, - "MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR", - $i->{"safemode_mem_throttle_denominator"}, - "MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP", - $i->{"safemode_mem_throttle_numerator_per_chip"}, - "MRW_THERMAL_MEMORY_POWER_LIMIT", - $i->{"thermal_memory_power_limit"}, - ]; +if ((scalar @SortedPmChipAttr) == 0) +{ + # For all systems without a populated <sys>-pm-settings file, this script + # defaults the values. + # Orlena: Platform dropped so there will never be a populated + # orlena-pm-settings file + # Brazos: SW231069 raised to get brazos-pm-settings populated + print STDOUT "WARNING: No data in $mrwdir/${sysname}-pm-settings.xml. Defaulting values\n"; } -my $ProcPcie; - +#------------------------------------------------------------------------------ +# Process the proc-pcie-settings MRW file +#------------------------------------------------------------------------------ open (FH, "<$mrwdir/${sysname}-proc-pcie-settings.xml") || die "ERROR: unable to open $mrwdir/${sysname}-proc-pcie-settings.xml\n"; - -$ProcPcie = XMLin("$mrwdir/${sysname}-proc-pcie-settings.xml"); - close (FH); +my $ProcPcie = XMLin("$mrwdir/${sysname}-proc-pcie-settings.xml"); - -use constant PCIE_NODE_INDEX => 0; -use constant PCIE_POS_INDEX => 1; -#the constant below is used in the addProcPcieAttrs() function. Reason to start -#at 2 is because the first two entries are not part of the loop to print out -#the pcie data - -use constant PCIE_START_INDEX =>2; - +# Repeated [NODE, POS, ATTR, IOP0-VAL, IOP1-VAL, ATTR, IOP0-VAL, IOP1-VAL] my @procPcie; foreach my $i (@{$ProcPcie->{'processor-settings'}}) { @@ -239,8 +278,11 @@ foreach my $i (@{$ProcPcie->{'processor-settings'}}) $i->{proc_pcie_iop_zcal_control_iop1}]; } -my @SortedPcie = sort byPcieNodePos @procPcie; +my @SortedPcie = sort byNodePos @procPcie; +#------------------------------------------------------------------------------ +# Process the chip-ids MRW file +#------------------------------------------------------------------------------ open (FH, "<$mrwdir/${sysname}-chip-ids.xml") || die "ERROR: unable to open $mrwdir/${sysname}-chip-ids.xml\n"; close (FH); @@ -258,6 +300,9 @@ foreach my $i (@{$chipIds->{'chip-id'}}) "n$i->{target}->{node}:p$i->{target}->{position}" ]; } +#------------------------------------------------------------------------------ +# Process the power-busses MRW file +#------------------------------------------------------------------------------ open (FH, "<$mrwdir/${sysname}-power-busses.xml") || die "ERROR: unable to open $mrwdir/${sysname}-power-busses.xml\n"; close (FH); @@ -324,6 +369,9 @@ foreach my $i (@{$powerbus->{'power-bus'}}) $upstrm_swap, $tx_swap, $rx_swap, $endpoint2_ipath ]; } +#------------------------------------------------------------------------------ +# Process the dmi-busses MRW file +#------------------------------------------------------------------------------ open (FH, "<$mrwdir/${sysname}-dmi-busses.xml") || die "ERROR: unable to open $mrwdir/${sysname}-dmi-busses.xml\n"; close (FH); @@ -373,6 +421,9 @@ foreach my $dmi (@{$dmibus->{'dmi-bus'}}) push @dbus_centaur, [ $node, $membuf, $swap, $tx_swap, $rx_swap ]; } +#------------------------------------------------------------------------------ +# Process the cent-vrds MRW file +#------------------------------------------------------------------------------ open (FH, "<$mrwdir/${sysname}-cent-vrds.xml") || die "ERROR: unable to open $mrwdir/${sysname}-cent-vrds.xml\n"; close (FH); @@ -431,6 +482,9 @@ foreach my $i (@{$vmemCentaur->{'centaur-vrd-connection'}}) my @SortedVmem = sort byVmemNodePos @unsortedVmem; +#------------------------------------------------------------------------------ +# Process the cec-chips and pcie-busses MRW files +#------------------------------------------------------------------------------ open (FH, "<$mrwdir/${sysname}-cec-chips.xml") || die "ERROR: unable to open $mrwdir/${sysname}-cec-chips.xml\n"; close (FH); @@ -562,6 +616,9 @@ foreach my $pcie_bus (@{$pcie_buses->{'pcie-bus'}}) } } +#------------------------------------------------------------------------------ +# Process the targets MRW file +#------------------------------------------------------------------------------ open (FH, "<$mrwdir/${sysname}-targets.xml") || die "ERROR: unable to open $mrwdir/${sysname}-targets.xml\n"; close (FH); @@ -601,6 +658,9 @@ foreach my $i (@{$eTargets->{target}}) } } +#------------------------------------------------------------------------------ +# Process the fsi-busses MRW file +#------------------------------------------------------------------------------ open (FH, "<$mrwdir/${sysname}-fsi-busses.xml") || die "ERROR: unable to open $mrwdir/${sysname}-fsi-busses.xml\n"; close (FH); @@ -648,6 +708,9 @@ foreach my $fsiBus (@{$fsiBus->{'fsi-bus'}}) $fsiBus->{slave}->{target}->{name} ]; } +#------------------------------------------------------------------------------ +# Process the psi-busses MRW file +#------------------------------------------------------------------------------ open (FH, "<$mrwdir/${sysname}-psi-busses.xml") || die "ERROR: unable to open $mrwdir/${sysname}-psi-busses.xml\n"; close (FH); @@ -671,6 +734,9 @@ foreach my $i (@{$psiBus->{'psi-bus'}}) ]; } +#------------------------------------------------------------------------------ +# Process the memory-busses MRW file +#------------------------------------------------------------------------------ open (FH, "<$mrwdir/${sysname}-memory-busses.xml") || die "ERROR: unable to open $mrwdir/${sysname}-memory-busses.xml\n"; close (FH); @@ -1432,21 +1498,21 @@ sub byDimmInstancePath ($$) } ################################################################################ -# Compares two proc pcie instances based on the node and position # +# Compares two arrays based on chip node and position ################################################################################ -sub byPcieNodePos($$) +sub byNodePos($$) { my $retVal = -1; - my $lhsInstance_node = $_[0][PCIE_NODE_INDEX]; - my $rhsInstance_node = $_[1][PCIE_NODE_INDEX]; + my $lhsInstance_node = $_[0][CHIP_NODE_INDEX]; + my $rhsInstance_node = $_[1][CHIP_NODE_INDEX]; if(int($lhsInstance_node) eq int($rhsInstance_node)) { - my $lhsInstance_pos = $_[0][PCIE_POS_INDEX]; - my $rhsInstance_pos = $_[1][PCIE_POS_INDEX]; + my $lhsInstance_pos = $_[0][CHIP_POS_INDEX]; + my $rhsInstance_pos = $_[1][CHIP_POS_INDEX]; if(int($lhsInstance_pos) eq int($rhsInstance_pos)) { - die "ERROR: Duplicate pcie positions: 2 pcie with same + die "ERROR: Duplicate chip positions: 2 chip with same node and position, \ NODE: $lhsInstance_node POSITION: $lhsInstance_pos\n"; } @@ -1505,13 +1571,6 @@ sub generate_sys $plat = 1; } - my $proc_refclk = $policy->{'required-policy-settings'}-> - {'processor-refclock-frequency'}->{content}; - my $proc_refclk_khz = $policy->{'required-policy-settings'}-> - {'processor-refclock-frequency-khz'}->{content}; - my $mem_refclk = $policy->{'required-policy-settings'}-> - {'memory-refclock-frequency'}->{content}; - print " <!-- $SYSNAME System with new values--> @@ -1531,20 +1590,8 @@ sub generate_sys <default>instance:system:TO_BE_ADDED</default> </compileAttribute> <attribute> - <id>FREQ_PROC_REFCLOCK</id> - <default>$proc_refclk</default> - </attribute> - <attribute> - <id>FREQ_PROC_REFCLOCK_KHZ</id> - <default>$proc_refclk_khz</default> - </attribute> - <attribute> <id>EXECUTION_PLATFORM</id> <default>$plat</default> - </attribute> - <attribute> - <id>FREQ_MEM_REFCLOCK</id> - <default>$mem_refclk</default> </attribute>\n"; print " <!-- System Attributes from MRW -->\n"; @@ -1552,21 +1599,6 @@ sub generate_sys print " <!-- End System Attributes from MRW -->\n"; print " - <!-- The default value of the following three attributes are written --> - <!-- by the HWP using them. The default values are not from MRW. They --> - <!-- are included here FYI. --> - <attribute> - <id>PROC_EPS_GB_DIRECTION</id> - <default>0</default> - </attribute> - <attribute> - <id>PROC_EPS_GB_PERCENTAGE</id> - <default>0x14</default> - </attribute> - <attribute> - <id>PROC_FABRIC_ASYNC_SAFE_MODE</id> - <default>0</default> - </attribute> <attribute> <id>SP_FUNCTIONS</id> <default> @@ -1615,46 +1647,13 @@ sub generate_sys <attribute> <id>MSS_CLEANER_ENABLE</id> <default>1</default> + </attribute> + <attribute> + <id>FREQ_CORE_MAX</id> + <default>4000</default> </attribute>"; generate_max_config(); - #todo-RTC:52835 - print " - <!-- Start pm_plat_attributes.xml --> - <attribute><id>FREQ_CORE_MAX</id> - <default>4000</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>0x1</default> - </attribute> -"; # HDAT drawer number (physical node) to # HostBoot Instance number (logical node) map # Index is the hdat drawer number, value is the HB instance number @@ -2060,45 +2059,84 @@ sub generate_proc <default>0</default> </attribute>\n"; - #@todo-RTC:52835 - print " - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_SLEEP_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_PBAX_NODEID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_CHIPID</id> - <default>$logid</default> - </attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> - <default>$lognode</default> - </attribute> - <attribute><id>PM_SPIVID_PORT_ENABLE</id>\n"; - if( $proc % 2 == 0 ) # proc0 of DCM + if ((scalar @SortedPmChipAttr) == 0) { - print " <default>0x4</default><!-- PORT0NONRED -->"; - } - else # proc1 of DCM - { - print " <default>0x0</default><!-- NONE -->"; - } - print " - </attribute> - <attribute><id>PM_APSS_CHIP_SELECT</id>\n"; - if( $proc % 2 == 0 ) # proc0 of DCM - { - print " <default>0x00</default><!-- CS0 -->"; + # Default the values. + print " <!-- PM_ attributes (default values) -->\n"; + print " <attribute>\n"; + print " <id>PM_UNDERVOLTING_FRQ_MINIMUM</id>\n"; + print " <default>0</default>\n"; + print " </attribute>\n"; + print " <attribute>\n"; + print " <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id>\n"; + print " <default>0</default>\n"; + print " </attribute>\n"; + print " <attribute>\n"; + print " <id>PM_SPIVID_PORT_ENABLE</id>\n"; + if( $proc % 2 == 0 ) # proc0 of DCM + { + print " <default>0x4</default><!-- PORT0NONRED -->\n"; + } + else # proc1 of DCM + { + print " <default>0x0</default><!-- NONE -->\n"; + } + print " </attribute>\n"; + print " <attribute>\n"; + print " <id>PM_APSS_CHIP_SELECT</id>\n"; + if( $proc % 2 == 0 ) # proc0 of DCM + { + print " <default>0x00</default><!-- CS0 -->\n"; + } + else # proc1 of DCM + { + print " <default>0xFF</default><!-- NONE -->\n"; + } + print " </attribute>\n"; + print " <attribute>\n"; + print " <id>PM_PBAX_NODEID</id>\n"; + print " <default>0</default>\n"; + print " </attribute>\n"; + print " <attribute>\n"; + print " <id>PM_PBAX_CHIPID</id>\n"; + print " <default>$logid</default>\n"; + print " </attribute>\n"; + print " <attribute>\n"; + print " <id>PM_PBAX_BRDCST_ID_VECTOR</id>\n"; + print " <default>$lognode</default>\n"; + print " </attribute>\n"; + print " <attribute>\n"; + print " <id>PM_SLEEP_ENTRY</id>\n"; + print " <default>0x0</default>\n"; + print " </attribute>\n"; + print " <attribute>\n"; + print " <id>PM_SLEEP_EXIT</id>\n"; + print " <default>0x0</default>\n"; + print " </attribute>\n"; + print " <attribute>\n"; + print " <id>PM_SLEEP_TYPE</id>\n"; + print " <default>0x0</default>\n"; + print " </attribute>\n"; + print " <attribute>\n"; + print " <id>PM_WINKLE_ENTRY</id>\n"; + print " <default>0x0</default>\n"; + print " </attribute>\n"; + print " <attribute>\n"; + print " <id>PM_WINKLE_EXIT</id>\n"; + print " <default>0x0</default>\n"; + print " </attribute>\n"; + print " <attribute>\n"; + print " <id>PM_WINKLE_TYPE</id>\n"; + print " <default>0x0</default>\n"; + print " </attribute>\n"; + print " <!-- End PM_ attributes (default values) -->\n"; } - else # proc1 of DCM + else { - print " <default>0xFF</default><!-- NONE -->"; + print " <!-- PM_ attributes -->\n"; + addProcPmAttrs( $proc, $node ); + print " <!-- End PM_ attributes -->\n"; } - print " - </attribute> - <!-- End pm_plat_attributes.xml -->\n"; - print " </targetInstance>\n"; @@ -2759,40 +2797,62 @@ sub addSysAttrs while ($j<$sysAttrArraySize) { print " <attribute>\n"; - print " <id>$systemAttr[$i][SYS_ATTR_START_INDEX+$j]</id>\n"; + print " <id>$systemAttr[$i][$j]</id>\n"; $j++; - print " <default>\n"; - print " $systemAttr[$i][SYS_ATTR_START_INDEX+$j]\n"; - print " </default>\n"; + print " <default>$systemAttr[$i][$j]</default>\n"; print " </attribute>\n"; $j++; } } } +sub addProcPmAttrs +{ + my ($position,$nodeId) = @_; + + for my $i (0 .. $#SortedPmChipAttr) + { + if (($SortedPmChipAttr[$i][CHIP_POS_INDEX] == $position) && + ($SortedPmChipAttr[$i][CHIP_NODE_INDEX] == $node) ) + { + #found the corresponding proc and node + my $j =0; + my $arraySize=$#{$SortedPmChipAttr[$i]} - CHIP_ATTR_START_INDEX; + while ($j<$arraySize) + { + print " <attribute>\n"; + print " <id>$SortedPmChipAttr[$i][CHIP_ATTR_START_INDEX+$j]</id>\n"; + $j++; + print " <default>$SortedPmChipAttr[$i][CHIP_ATTR_START_INDEX+$j]</default>\n"; + print " </attribute>\n"; + $j++; + } + } + } +} + sub addProcPcieAttrs { my ($position,$nodeId) = @_; for my $i (0 .. $#SortedPcie) { - if (($SortedPcie[$i][PCIE_POS_INDEX] == $position) && - ($SortedPcie[$i][PCIE_NODE_INDEX] == $node) ) + if (($SortedPcie[$i][CHIP_POS_INDEX] == $position) && + ($SortedPcie[$i][CHIP_NODE_INDEX] == $node) ) { #found the corresponding proc and node my $j =0; - #subtract to from the size because the start position is 2 over - my $pcieArraySize=$#{$SortedPcie[$i]} - PCIE_START_INDEX; - while ($j<$pcieArraySize) + my $arraySize=$#{$SortedPcie[$i]} - CHIP_ATTR_START_INDEX; + while ($j<$arraySize) { print " <attribute>\n"; - print " <id>$SortedPcie[$i][PCIE_START_INDEX+$j]</id>\n"; + print " <id>$SortedPcie[$i][CHIP_ATTR_START_INDEX+$j]</id>\n"; $j++; print " <default>\n"; - print " $SortedPcie[$i][PCIE_START_INDEX+$j]"; + print " $SortedPcie[$i][CHIP_ATTR_START_INDEX+$j]"; print ","; $j++; - print "$SortedPcie[$i][PCIE_START_INDEX+$j]\n"; + print "$SortedPcie[$i][CHIP_ATTR_START_INDEX+$j]\n"; print " </default>\n"; print " </attribute>\n"; $j++; diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index 14d8cb757..1063a7a64 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -3465,9 +3465,8 @@ Consumer: proc_pm_init and proc_pcbs_init <simpleType> <uint8_t></uint8_t> </simpleType> - <persistency>volatile-zeroed</persistency> + <persistency>non-volatile</persistency> <readable/> - <writeable/> <hwpfToHbAttrMap> <id>ATTR_PM_SLEEP_ENTRY</id> <macro>DIRECT</macro> @@ -3491,9 +3490,8 @@ Consumer: proc_pm_init and proc_pcbs_init. <simpleType> <uint8_t></uint8_t> </simpleType> - <persistency>volatile-zeroed</persistency> + <persistency>non-volatile</persistency> <readable/> - <writeable/> <hwpfToHbAttrMap> <id>ATTR_PM_SLEEP_EXIT</id> <macro>DIRECT</macro> @@ -3513,9 +3511,8 @@ Consumer: proc_pm_init and proc_pcbs_init <simpleType> <uint8_t></uint8_t> </simpleType> - <persistency>volatile-zeroed</persistency> + <persistency>non-volatile</persistency> <readable/> - <writeable/> <hwpfToHbAttrMap> <id>ATTR_PM_SLEEP_TYPE</id> <macro>DIRECT</macro> @@ -3531,16 +3528,14 @@ Selects which voltage level to place the Core and ECO domain PFETs upon Winkle e <simpleType> <uint8_t></uint8_t> </simpleType> - <persistency>volatile-zeroed</persistency> + <persistency>non-volatile</persistency> <readable/> - <writeable/> <hwpfToHbAttrMap> <id>ATTR_PM_WINKLE_TYPE</id> <macro>DIRECT</macro> </hwpfToHbAttrMap> </attribute> -<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_PFET_POWERUP_CORE_DELAY0</id> <description> @@ -3559,7 +3554,6 @@ Selects which voltage level to place the Core and ECO domain PFETs upon Winkle e </hwpfToHbAttrMap> </attribute> -<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_PFET_POWERUP_CORE_DELAY1</id> <description> @@ -3633,7 +3627,6 @@ Selects which voltage level to place the Core and ECO domain PFETs upon Winkle e </hwpfToHbAttrMap> </attribute> -<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_PFET_POWERDOWN_CORE_DELAY0</id> <description> @@ -3652,7 +3645,6 @@ Selects which voltage level to place the Core and ECO domain PFETs upon Winkle e </hwpfToHbAttrMap> </attribute> -<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_PFET_POWERDOWN_CORE_DELAY1</id> <description> @@ -3726,7 +3718,6 @@ Selects which voltage level to place the Core and ECO domain PFETs upon Winkle e </hwpfToHbAttrMap> </attribute> -<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_PFET_POWERUP_ECO_DELAY0</id> <description> @@ -3745,7 +3736,6 @@ Selects which voltage level to place the Core and ECO domain PFETs upon Winkle e </hwpfToHbAttrMap> </attribute> -<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_PFET_POWERUP_ECO_DELAY1</id> <description> @@ -3819,7 +3809,6 @@ Selects which voltage level to place the Core and ECO domain PFETs upon Winkle e </hwpfToHbAttrMap> </attribute> -<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_PFET_POWERDOWN_ECO_DELAY0</id> <description> @@ -3838,7 +3827,6 @@ Selects which voltage level to place the Core and ECO domain PFETs upon Winkle e </hwpfToHbAttrMap> </attribute> -<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_PFET_POWERDOWN_ECO_DELAY1</id> <description> @@ -4479,7 +4467,6 @@ Divider for the 1us PBAX hang pulse. A hang is detected after two divided hang </hwpfToHbAttrMap> </attribute> -<!-- TODO RTC:52835 add default 0 --> <attribute> <id>PM_SPIVID_PORT_ENABLE</id> <description> @@ -12468,258 +12455,6 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript </attribute> <attribute> - <id>FREQ_EXT_BIAS_UP</id> - <description> - Frequency Bias - % of bias upward (binary in 0.5 percent steps) in generating - Pstate tables. Either this or FREQ_EXT_BIAS_DOWN can have non-zero value - concurrently due to the unsigned definition of attributes. - - Producer: Attribute Overrides by Lab/Mfg Characterization Team - - Consumers: p8_build_gpstate_table.C - - Platform default: 0 - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_FREQ_EXT_BIAS_UP</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>FREQ_EXT_BIAS_DOWN</id> - <description> - Frequency Bias - % of bias downward (binary in 0.5 percent steps) in generating - Pstate tables. Either this or FREQ_EXT_BIAS_UP can have non-zero value - concurrently due to the unsigned definition of attributes. - - Producer: Attribute Overrides by Lab/Mfg Characterization Team - - Consumers: p8_build_gpstate_table.C - - Platform default: 0 - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_FREQ_EXT_BIAS_DOWN</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>VOLTAGE_EXT_VDD_BIAS_UP</id> - <description> - External VDD Voltage Bias - % of bias upward (binary in 0.5 percent steps) that - is applied to each VPD point in generating the Global Pstate tables. Either - this or ATTR_VOLTAGE_EXT_VDD_BIAS_DOWN can have non-zero value concurrently due to - the unsigned definition of attributes. - - Producer: Attribute Overrides by Lab/Mfg Characterization Team - - Consumers: p8_build_gpstate_table.C - - Platform default: 0 - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_VOLTAGE_EXT_VDD_BIAS_UP</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>VOLTAGE_EXT_VDD_BIAS_DOWN</id> - <description> - External VDD Voltage Bias - % of bias downward (binary in 0.5 percent steps) that - is applied to each VPD point in generating the Global Pstate tables. Either - this or ATTR_VOLTAGE_EXT_VDD_BIAS_UP can have non-zero value concurrently due to - the unsigned definition of attributes. - - Producer: Attribute Overrides by Lab/Mfg Characterization Team - - Consumers: p8_build_gpstate_table.C - - Platform default: 0 - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_VOLTAGE_EXT_VDD_BIAS_DOWN</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>VOLTAGE_EXT_VCS_BIAS_UP</id> - <description> - External VCS Voltage Bias - % of bias upward (binary in 0.5 percent steps) that - is applied to each VPD point in generating the Global Pstate tables. Either - this or ATTR_VOLTAGE_EXT_VCS_BIAS_DOWN can have non-zero value concurrently due to - the unsigned definition of attributes. - - Producer: Attribute Overrides by Lab/Mfg Characterization Team - - Consumers: p8_build_gpstate_table.C - - Platform default: 0 - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_VOLTAGE_EXT_VCS_BIAS_UP</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>VOLTAGE_EXT_VCS_BIAS_DOWN</id> - <description> - External VCS Voltage Bias - % of bias downward (binary in 0.5 percent steps) that - is applied to each VPD point in generating the Global Pstate tables. Either - this or ATTR_VOLTAGE_EXT_VCS_BIAS_UP can have non-zero value concurrently due to - the unsigned definition of attributes. - - Producer: Attribute Overrides by Lab/Mfg Characterization Team - - Consumers: p8_build_gpstate_table.C - - Platform default: 0 - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_VOLTAGE_EXT_VCS_BIAS_DOWN</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>VOLTAGE_INT_VDD_BIAS_UP</id> - <description> - Internal VDD Voltage Bias - % of bias upward (binary in 0.5 percent steps) that - is applied to the Local Pstate Table voltage entries based on the Global Pstate Table - built *after* the ATTR_VOLTAGE_EXT_VDD_BIAS_UP/ATTR_VOLTAGE_EXT_VDD_BIAS_DOWN bias - have been applied. Either this or ATTR_VOLTAGE_INT_VDD_BIAS_DOWN can have non-zero value - concurrently due to the unsigned definition of attributes. - - Producer: Attribute Overrides by Lab/Mfg Characterization Team - - Consumers: p8_build_gpstate_table.C - - Platform default: 0 - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_VOLTAGE_INT_VDD_BIAS_UP</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>VOLTAGE_INT_VDD_BIAS_DOWN</id> - <description> - Internal VDD Voltage Bias - % of bias downward (binary in 0.5 percent steps) that - is applied to the Local Pstate Table voltage entries based on the Global Pstate Table - built *after* the ATTR_VOLTAGE_EXT_VDD_BIAS_UP/ATTR_VOLTAGE_EXT_VDD_BIAS_DOWN bias - have been applied. Either this or ATTR_VOLTAGE_INT_VDD_BIAS_UP can have non-zero value - concurrently due to the unsigned definition of attributes. - - Producer: Attribute Overrides by Lab/Mfg Characterization Team - - Consumers: p8_build_gpstate_table.C - - Platform default: 0 - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_VOLTAGE_INT_VDD_BIAS_DOWN</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>VOLTAGE_INT_VCS_BIAS_UP</id> - <description> - Internal VCS Voltage Bias - % of bias upward (binary in 0.5 percent steps) that - is applied to the Local Pstate Table voltage entries based on the Global Pstate Table - built *after* the ATTR_VOLTAGE_EXT_VCS_BIAS_UP/ATTR_VOLTAGE_EXT_VCS_BIAS_DOWN bias - have been applied. Either this or ATTR_VOLTAGE_INT_VCS_BIAS_DOWN can have non-zero value - concurrently due to the unsigned definition of attributes. - - Producer: Attribute Overrides by Lab/Mfg Characterization Team - - Consumers: p8_build_gpstate_table.C - - Platform default: 0 - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_VOLTAGE_INT_VCS_BIAS_UP</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>VOLTAGE_INT_VCS_BIAS_DOWN</id> - <description> - Internal VCS Voltage Bias - % of bias downward (binary in 0.5 percent steps) that - is applied to the Local Pstate Table voltage entries based on the Global Pstate Table - built *after* the ATTR_VOLTAGE_EXT_VCS_BIAS_UP/ATTR_VOLTAGE_EXT_VCS_BIAS_DOWN bias - have been applied. Either this or ATTR_VOLTAGE_INT_VCS_BIAS_UP can have non-zero value - concurrently due to the unsigned definition of attributes. - - Producer: Attribute Overrides by Lab/Mfg Characterization Team - - Consumers: p8_build_gpstate_table.C - - Platform default: 0 - </description> - <simpleType> - <uint32_t></uint32_t> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_VOLTAGE_INT_VCS_BIAS_DOWN</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> <id>PM_UNDERVOLTING_FRQ_MINIMUM</id> <description> Override for Minimum frequency for which undervolting is allowed. @@ -12790,7 +12525,7 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <simpleType> <uint8_t></uint8_t> </simpleType> - <persistency>volatile-zeroed</persistency> + <persistency>non-volatile</persistency> <readable/> <hwpfToHbAttrMap> <id>ATTR_PM_WINKLE_ENTRY</id> @@ -12815,7 +12550,7 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <simpleType> <uint8_t></uint8_t> </simpleType> - <persistency>volatile-zeroed</persistency> + <persistency>non-volatile</persistency> <readable/> <hwpfToHbAttrMap> <id>ATTR_PM_WINKLE_EXIT</id> diff --git a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml index b8bb37d6b..378ea6ad4 100644 --- a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml @@ -35,9 +35,6 @@ * each Centaur membuf chip has 2 MBA chiplets * each MBA chiplet has 2 ports * each MBA port connects to 2 logical dimms - - Values for pm_attributes_all_plat.xml attributes was provided by - Greg Still on 10/17/1012. ================================================================= --> <!-- System --> @@ -46,10 +43,6 @@ <id>sys0</id> <type>sys-sys-power8</type> <attribute> - <id>EXECUTION_PLATFORM</id> - <default>1</default> - </attribute> - <attribute> <id>PHYS_PATH</id> <default>physical:sys-0</default> </attribute> @@ -58,6 +51,67 @@ <default>affinity:sys-0</default> </attribute> <attribute> + <id>EXECUTION_PLATFORM</id> + <default>1</default> + </attribute> + <!-- System Attributes from MRW --> + <attribute> + <id>FREQ_PROC_REFCLOCK</id> + <default>133</default> + </attribute> + <attribute> + <id>FREQ_PROC_REFCLOCK_KHZ</id> + <default>133333</default> + </attribute> + <attribute> + <id>FREQ_MEM_REFCLOCK</id> + <default>266</default> + </attribute> + <attribute> + <id>ALL_MCS_IN_INTERLEAVING_GROUP</id> + <default>0</default> + </attribute> + <attribute> + <id>FREQ_A</id> + <default>0x1900</default> + </attribute> + <attribute> + <id>FREQ_CORE_FLOOR</id> + <default>0x2580</default> + </attribute> + <attribute> + <id>FREQ_PB</id> + <default>0x7D0</default> + </attribute> + <attribute> + <id>NEST_FREQ_MHZ</id> + <default>0x960</default> + </attribute> + <attribute> + <id>FREQ_PCIE</id> + <default>0x3E8</default> + </attribute> + <attribute> + <id>FREQ_X</id> + <default>0xFA0</default> + </attribute> + <attribute> + <id>MSS_CLEANER_ENABLE</id> + <default>1</default> + </attribute> + <attribute> + <id>MSS_MBA_ADDR_INTERLEAVE_BIT</id> + <default>24</default> + </attribute> + <attribute> + <id>MSS_MBA_CACHELINE_INTERLEAVE_MODE</id> + <default>1</default> + </attribute> + <attribute> + <id>MSS_PREFETCH_ENABLE</id> + <default>1</default> + </attribute> + <attribute> <id>PROC_EPS_TABLE_TYPE</id> <default>2</default> </attribute> @@ -70,49 +124,110 @@ <default>2</default> </attribute> <attribute> - <id>ALL_MCS_IN_INTERLEAVING_GROUP</id> + <id>X_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute> + <id>A_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute> + <id>DMI_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute> + <id>X_EREPAIR_THRESHOLD_MNFG</id> <default>0</default> </attribute> <attribute> - <id>FREQ_PROC_REFCLOCK</id> - <default>133</default> + <id>A_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> </attribute> <attribute> - <id>FREQ_MEM_REFCLOCK</id> - <default>266</default> + <id>DMI_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> </attribute> <attribute> - <id>FREQ_CORE_FLOOR</id> - <default>0x2580</default> + <id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id> + <default>96</default> </attribute> <attribute> - <id>FREQ_PB</id> - <default>0x7D0</default> + <id>MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR</id> + <default>512</default> </attribute> <attribute> - <id>FREQ_X</id> - <default>0xFA0</default> + <id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id> + <default>32</default> </attribute> <attribute> - <id>FREQ_A</id> - <default>0x1900</default> + <id>MRW_THERMAL_MEMORY_POWER_LIMIT</id> + <default>5000</default> </attribute> <attribute> - <id>FREQ_PCIE</id> - <default>0x3E8</default> + <id>PM_EXTERNAL_VRM_STEPSIZE</id> + <default>0xc4</default> + </attribute> + <attribute> + <id>PM_EXTERNAL_VRM_STEPDELAY</id> + <default>0xa</default> + </attribute> + <attribute> + <id>PM_SPIVID_FREQUENCY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SAFE_FREQUENCY</id> + <default>0x7ec</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> + <default>0x7d0</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> + <default>0x8fc</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> + <default>0xbb8</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> + <default>0xbea</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> + <default>0x12c0</default> + </attribute> + <attribute> + <id>PM_SPIPSS_FREQUENCY</id> + <default>0xa</default> + </attribute> + <attribute> + <id>PROC_R_LOADLINE_VDD</id> + <default>0x23a</default> </attribute> <attribute> - <id>PROC_EPS_GB_DIRECTION</id> + <id>PROC_R_DISTLOSS_VDD</id> + <default>0x140</default> + </attribute> + <attribute> + <id>PROC_VRM_VOFFSET_VDD</id> <default>0</default> </attribute> <attribute> - <id>PROC_EPS_GB_PERCENTAGE</id> - <default>0x14</default> + <id>PROC_R_LOADLINE_VCS</id> + <default>0x23a</default> </attribute> <attribute> - <id>PROC_FABRIC_ASYNC_SAFE_MODE</id> + <id>PROC_R_DISTLOSS_VCS</id> + <default>0xdac</default> + </attribute> + <attribute> + <id>PROC_VRM_VOFFSET_VCS</id> <default>0</default> </attribute> + <!-- End System Attributes from MRW --> <attribute> <id>ISTEP_MODE</id> <default>0x0</default> @@ -152,96 +267,18 @@ <default>NONE</default> </attribute> <attribute> - <id>MSS_MBA_ADDR_INTERLEAVE_BIT</id> - <default>24</default> - </attribute> - <attribute> - <id>MSS_MBA_CACHELINE_INTERLEAVE_MODE</id> - <default>1</default> - </attribute> - <attribute> - <id>MSS_PREFETCH_ENABLE</id> - <default>1</default> - </attribute> - <attribute> - <id>MSS_CLEANER_ENABLE</id> - <default>1</default> - </attribute> - <attribute> <id>MAX_PROC_CHIPS_PER_NODE</id> <default>4</default> </attribute> - <!-- Start pm_plat_attributes.xml --> <attribute><id>FREQ_CORE_MAX</id> <default>4000</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>0x3</default> - </attribute> - <!-- End pm_plat_attributes.xml --> <attribute><id>MAX_EXS_PER_PROC_CHIP</id> <default>6</default> </attribute> <attribute><id>MAX_MCS_PER_SYSTEM</id> <default>16</default> </attribute> - <attribute><id>X_EREPAIR_THRESHOLD_FIELD</id> - <default>1</default> - </attribute> - <attribute><id>A_EREPAIR_THRESHOLD_FIELD</id> - <default>1</default> - </attribute> - <attribute><id>DMI_EREPAIR_THRESHOLD_FIELD</id> - <default>1</default> - </attribute> - <attribute><id>A_EREPAIR_THRESHOLD_MNFG</id> - <default>0</default> - </attribute> - <attribute> <id>DMI_EREPAIR_THRESHOLD_MNFG</id> - <default>0</default> - </attribute> - <attribute><id>X_EREPAIR_THRESHOLD_MNFG</id> - <default>0</default> - </attribute> - <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id> - <default>96</default> - </attribute> - <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR</id> - <default>512</default> - </attribute> - <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id> - <default>32</default> - </attribute> - <attribute><id>MRW_THERMAL_MEMORY_POWER_LIMIT</id> - <default>5000</default> - </attribute> </targetInstance> <!-- System node 0 --> @@ -331,24 +368,6 @@ <attribute><id>PROC_DCM_INSTALLED</id> <default>1</default> </attribute> - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_SPIVID_PORT_ENABLE</id> - <default>0x4</default><!-- PORT0NONRED --> - </attribute> - <attribute><id>PM_SLEEP_TYPE</id></attribute> - <attribute><id>PM_APSS_CHIP_SELECT</id> - <default>0x00</default><!-- CS0 --> - </attribute> - <attribute><id>PM_PBAX_NODEID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_CHIPID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> - <default>0</default> - </attribute> - <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -445,6 +464,60 @@ <id>PROC_PCIE_PHB_ACTIVE</id> <default>0xE0</default> </attribute> + <!-- PM_ attributes --> + <attribute> + <id>PM_UNDERVOLTING_FRQ_MINIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SPIVID_PORT_ENABLE</id> + <default>4</default> + </attribute> + <attribute> + <id>PM_APSS_CHIP_SELECT</id> + <default>0x00</default> + </attribute> + <attribute> + <id>PM_PBAX_NODEID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_CHIPID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_BRDCST_ID_VECTOR</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_TYPE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_TYPE</id> + <default>0</default> + </attribute> + <!-- End PM_ attributes --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> @@ -1090,26 +1163,6 @@ <attribute><id>PROC_DCM_INSTALLED</id> <default>1</default> </attribute> - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_SPIVID_PORT_ENABLE</id> - <default>0x0</default><!-- NONE --> - </attribute> - <attribute><id>PM_SLEEP_ENTRY</id></attribute> - <attribute><id>PM_SLEEP_EXIT</id></attribute> - <attribute><id>PM_SLEEP_TYPE</id></attribute> - <attribute><id>PM_APSS_CHIP_SELECT</id> - <default>0xFF</default><!-- NONE --> - </attribute> - <attribute><id>PM_PBAX_NODEID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_CHIPID</id> - <default>1</default> - </attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> - <default>0</default> - </attribute> - <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -1206,7 +1259,60 @@ <id>PROC_PCIE_PHB_ACTIVE</id> <default>0xE0</default> </attribute> - + <!-- PM_ attributes --> + <attribute> + <id>PM_UNDERVOLTING_FRQ_MINIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SPIVID_PORT_ENABLE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_APSS_CHIP_SELECT</id> + <default>0xff</default> + </attribute> + <attribute> + <id>PM_PBAX_NODEID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_CHIPID</id> + <default>1</default> + </attribute> + <attribute> + <id>PM_PBAX_BRDCST_ID_VECTOR</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_TYPE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_TYPE</id> + <default>0</default> + </attribute> + <!-- End PM_ attributes --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> @@ -1854,23 +1960,6 @@ <attribute><id>PROC_DCM_INSTALLED</id> <default>1</default> </attribute> - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_SLEEP_ENTRY</id></attribute> - <attribute><id>PM_SLEEP_EXIT</id></attribute> - <attribute><id>PM_SLEEP_TYPE</id></attribute> - <attribute><id>PM_APSS_CHIP_SELECT</id> - <default>0xFF</default><!-- NONE --> - </attribute> - <attribute><id>PM_PBAX_NODEID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_CHIPID</id> - <default>2</default> - </attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> - <default>0</default> - </attribute> - <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -1967,7 +2056,60 @@ <id>PROC_PCIE_PHB_ACTIVE</id> <default>0xE0</default> </attribute> - + <!-- PM_ attributes --> + <attribute> + <id>PM_UNDERVOLTING_FRQ_MINIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SPIVID_PORT_ENABLE</id> + <default>4</default> + </attribute> + <attribute> + <id>PM_APSS_CHIP_SELECT</id> + <default>0x00</default> + </attribute> + <attribute> + <id>PM_PBAX_NODEID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_CHIPID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_BRDCST_ID_VECTOR</id> + <default>1</default> + </attribute> + <attribute> + <id>PM_SLEEP_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_TYPE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_TYPE</id> + <default>0</default> + </attribute> + <!-- End PM_ attributes --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> @@ -2615,26 +2757,6 @@ <attribute><id>PROC_DCM_INSTALLED</id> <default>1</default> </attribute> - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_SPIVID_PORT_ENABLE</id> - <default>0x0</default><!-- NONE --> - </attribute> - <attribute><id>PM_SLEEP_ENTRY</id></attribute> - <attribute><id>PM_SLEEP_EXIT</id></attribute> - <attribute><id>PM_SLEEP_TYPE</id></attribute> - <attribute><id>PM_APSS_CHIP_SELECT</id> - <default>0xFF</default><!-- NONE --> - </attribute> - <attribute><id>PM_PBAX_NODEID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_CHIPID</id> - <default>3</default> - </attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> - <default>0</default> - </attribute> - <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -2731,6 +2853,60 @@ <id>PROC_PCIE_PHB_ACTIVE</id> <default>0xE0</default> </attribute> + <!-- PM_ attributes --> + <attribute> + <id>PM_UNDERVOLTING_FRQ_MINIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SPIVID_PORT_ENABLE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_APSS_CHIP_SELECT</id> + <default>0xff</default> + </attribute> + <attribute> + <id>PM_PBAX_NODEID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_CHIPID</id> + <default>1</default> + </attribute> + <attribute> + <id>PM_PBAX_BRDCST_ID_VECTOR</id> + <default>1</default> + </attribute> + <attribute> + <id>PM_SLEEP_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_TYPE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_TYPE</id> + <default>0</default> + </attribute> + <!-- End PM_ attributes --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> diff --git a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml index fc5fe3090..5348557df 100644 --- a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml @@ -39,9 +39,6 @@ Note that the logical memory connections are very wacky in their relationship to the FSI ports: cMFSI Port 0-7 = Logical MCS Port 4,5,6,7,0,1,2,3 - - Values for pm_plat_attributes.xml attributes were provided by - Greg Still on 10/17/1012. ================================================================= --> <!-- System --> @@ -50,10 +47,6 @@ <id>sys0</id> <type>sys-sys-power8</type> <attribute> - <id>EXECUTION_PLATFORM</id> - <default>1</default> - </attribute> - <attribute> <id>PHYS_PATH</id> <default>physical:sys-0</default> </attribute> @@ -62,6 +55,67 @@ <default>affinity:sys-0</default> </attribute> <attribute> + <id>EXECUTION_PLATFORM</id> + <default>1</default> + </attribute> + <!-- System Attributes from MRW --> + <attribute> + <id>FREQ_PROC_REFCLOCK</id> + <default>200</default> + </attribute> + <attribute> + <id>FREQ_PROC_REFCLOCK_KHZ</id> + <default>200000</default> + </attribute> + <attribute> + <id>FREQ_MEM_REFCLOCK</id> + <default>266</default> + </attribute> + <attribute> + <id>ALL_MCS_IN_INTERLEAVING_GROUP</id> + <default>0</default> + </attribute> + <attribute> + <id>FREQ_A</id> + <default>0x1900</default> + </attribute> + <attribute> + <id>FREQ_CORE_FLOOR</id> + <default>2500</default> + </attribute> + <attribute> + <id>FREQ_PB</id> + <default>0x960</default> + </attribute> + <attribute> + <id>NEST_FREQ_MHZ</id> + <default>0x960</default> + </attribute> + <attribute> + <id>FREQ_PCIE</id> + <default>0x3E8</default> + </attribute> + <attribute> + <id>FREQ_X</id> + <default>0x12C0</default> + </attribute> + <attribute> + <id>MSS_CLEANER_ENABLE</id> + <default>1</default> + </attribute> + <attribute> + <id>MSS_MBA_ADDR_INTERLEAVE_BIT</id> + <default>24</default> + </attribute> + <attribute> + <id>MSS_MBA_CACHELINE_INTERLEAVE_MODE</id> + <default>1</default> + </attribute> + <attribute> + <id>MSS_PREFETCH_ENABLE</id> + <default>1</default> + </attribute> + <attribute> <id>PROC_EPS_TABLE_TYPE</id> <default>2</default> </attribute> @@ -74,22 +128,111 @@ <default>2</default> </attribute> <attribute> - <id>ALL_MCS_IN_INTERLEAVING_GROUP</id> + <id>X_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute> + <id>A_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute> + <id>DMI_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> + </attribute> + <attribute> + <id>X_EREPAIR_THRESHOLD_MNFG</id> <default>0</default> </attribute> <attribute> - <id>FREQ_PROC_REFCLOCK</id> - <default>200</default> + <id>A_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> </attribute> <attribute> - <id>FREQ_MEM_REFCLOCK</id> - <default>266</default> + <id>DMI_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> </attribute> <attribute> - <id>FREQ_CORE_FLOOR</id> - <default>2500</default> + <id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id> + <default>96</default> + </attribute> + <attribute> + <id>MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR</id> + <default>512</default> + </attribute> + <attribute> + <id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id> + <default>32</default> + </attribute> + <attribute> + <id>MRW_THERMAL_MEMORY_POWER_LIMIT</id> + <default>5000</default> + </attribute> + <attribute> + <id>PM_EXTERNAL_VRM_STEPSIZE</id> + <default>0xc4</default> + </attribute> + <attribute> + <id>PM_EXTERNAL_VRM_STEPDELAY</id> + <default>0xa</default> + </attribute> + <attribute> + <id>PM_SPIVID_FREQUENCY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SAFE_FREQUENCY</id> + <default>0x7ec</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> + <default>0x7d0</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> + <default>0x8fc</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> + <default>0xbb8</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> + <default>0xbea</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> + <default>0x12c0</default> + </attribute> + <attribute> + <id>PM_SPIPSS_FREQUENCY</id> + <default>0xa</default> + </attribute> + <attribute> + <id>PROC_R_LOADLINE_VDD</id> + <default>0x23a</default> </attribute> <attribute> + <id>PROC_R_DISTLOSS_VDD</id> + <default>0x140</default> + </attribute> + <attribute> + <id>PROC_VRM_VOFFSET_VDD</id> + <default>0</default> + </attribute> + <attribute> + <id>PROC_R_LOADLINE_VCS</id> + <default>0x23a</default> + </attribute> + <attribute> + <id>PROC_R_DISTLOSS_VCS</id> + <default>0xdac</default> + </attribute> + <attribute> + <id>PROC_VRM_VOFFSET_VCS</id> + <default>0</default> + </attribute> + <!-- End System Attributes from MRW --> + <attribute> <id>ISTEP_MODE</id> <default>0x0</default> </attribute> @@ -127,94 +270,15 @@ <id>PAYLOAD_KIND</id> <default>NONE</default> </attribute> - <attribute> - <id>MSS_MBA_ADDR_INTERLEAVE_BIT</id> - <default>24</default> - </attribute> - <attribute> - <id>MSS_MBA_CACHELINE_INTERLEAVE_MODE</id> - <default>1</default> - </attribute> - <attribute> - <id>MSS_PREFETCH_ENABLE</id> - <default>1</default> - </attribute> - <attribute> - <id>MSS_CLEANER_ENABLE</id> - <default>1</default> - </attribute> - <!-- Start pm_plat_attributes.xml --> <attribute><id>FREQ_CORE_MAX</id> <default>4000</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>10</default> - </attribute> <attribute><id>MAX_EXS_PER_PROC_CHIP</id> <default>12</default> </attribute> <attribute><id>MAX_MCS_PER_SYSTEM</id> <default>64</default> </attribute> - <attribute><id>X_EREPAIR_THRESHOLD_FIELD</id> - <default>1</default> - </attribute> - <attribute><id>A_EREPAIR_THRESHOLD_FIELD</id> - <default>1</default> - </attribute> - <attribute><id>DMI_EREPAIR_THRESHOLD_FIELD</id> - <default>1</default> - </attribute> - <attribute><id>X_EREPAIR_THRESHOLD_MNFG</id> - <default>0</default> - </attribute> - <attribute><id>A_EREPAIR_THRESHOLD_MNFG</id> - <default>0</default> - </attribute> - <attribute><id>DMI_EREPAIR_THRESHOLD_MNFG</id> - <default>0</default> - </attribute> - <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id> - <default>96</default> - </attribute> - <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR</id> - <default>512</default> - </attribute> - <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id> - <default>32</default> - </attribute> - <attribute><id>MRW_THERMAL_MEMORY_POWER_LIMIT</id> - <default>5000</default> - </attribute> - - <!-- End pm_plat_attributes.xml --> </targetInstance> <!-- System node 0 --> @@ -304,26 +368,6 @@ <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_SPIVID_PORT_ENABLE</id> - <default>0x7</default><!-- REDUNDANT --> - </attribute> - <attribute><id>PM_SLEEP_ENTRY</id></attribute> - <attribute><id>PM_SLEEP_EXIT</id></attribute> - <attribute><id>PM_SLEEP_TYPE</id></attribute> - <attribute><id>PM_APSS_CHIP_SELECT</id> - <default>0x00</default><!-- CS0 --> - </attribute> - <attribute><id>PM_PBAX_NODEID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_CHIPID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> - <default>0</default> - </attribute> - <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -420,7 +464,60 @@ <id>PROC_PCIE_PHB_ACTIVE</id> <default>0xE0</default> </attribute> - + <!-- PM_ attributes --> + <attribute> + <id>PM_UNDERVOLTING_FRQ_MINIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SPIVID_PORT_ENABLE</id> + <default>4</default> + </attribute> + <attribute> + <id>PM_APSS_CHIP_SELECT</id> + <default>0x00</default> + </attribute> + <attribute> + <id>PM_PBAX_NODEID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_CHIPID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_BRDCST_ID_VECTOR</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_TYPE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_TYPE</id> + <default>0</default> + </attribute> + <!-- End PM_ attributes --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> @@ -1429,26 +1526,6 @@ <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_SPIVID_PORT_ENABLE</id> - <default>0x7</default><!-- REDUNDANT --> - </attribute> - <attribute><id>PM_SLEEP_ENTRY</id></attribute> - <attribute><id>PM_SLEEP_EXIT</id></attribute> - <attribute><id>PM_SLEEP_TYPE</id></attribute> - <attribute><id>PM_APSS_CHIP_SELECT</id> - <default>0x00</default><!-- CS0 --> - </attribute> - <attribute><id>PM_PBAX_NODEID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_CHIPID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> - <default>0</default> - </attribute> - <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -1545,7 +1622,60 @@ <id>PROC_PCIE_PHB_ACTIVE</id> <default>0xE0</default> </attribute> - + <!-- PM_ attributes --> + <attribute> + <id>PM_UNDERVOLTING_FRQ_MINIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SPIVID_PORT_ENABLE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_APSS_CHIP_SELECT</id> + <default>0xff</default> + </attribute> + <attribute> + <id>PM_PBAX_NODEID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_CHIPID</id> + <default>1</default> + </attribute> + <attribute> + <id>PM_PBAX_BRDCST_ID_VECTOR</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_TYPE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_TYPE</id> + <default>0</default> + </attribute> + <!-- End PM_ attributes --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> @@ -2555,26 +2685,6 @@ <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_SPIVID_PORT_ENABLE</id> - <default>0x7</default><!-- REDUNDANT --> - </attribute> - <attribute><id>PM_SLEEP_ENTRY</id></attribute> - <attribute><id>PM_SLEEP_EXIT</id></attribute> - <attribute><id>PM_SLEEP_TYPE</id></attribute> - <attribute><id>PM_APSS_CHIP_SELECT</id> - <default>0x00</default><!-- CS0 --> - </attribute> - <attribute><id>PM_PBAX_NODEID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_CHIPID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> - <default>0</default> - </attribute> - <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -2671,6 +2781,60 @@ <id>PROC_PCIE_PHB_ACTIVE</id> <default>0xE0</default> </attribute> + <!-- PM_ attributes --> + <attribute> + <id>PM_UNDERVOLTING_FRQ_MINIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SPIVID_PORT_ENABLE</id> + <default>4</default> + </attribute> + <attribute> + <id>PM_APSS_CHIP_SELECT</id> + <default>0x00</default> + </attribute> + <attribute> + <id>PM_PBAX_NODEID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_CHIPID</id> + <default>2</default> + </attribute> + <attribute> + <id>PM_PBAX_BRDCST_ID_VECTOR</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_TYPE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_TYPE</id> + <default>0</default> + </attribute> + <!-- End PM_ attributes --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> @@ -3679,26 +3843,6 @@ <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_SPIVID_PORT_ENABLE</id> - <default>0x7</default><!-- REDUNDANT --> - </attribute> - <attribute><id>PM_SLEEP_ENTRY</id></attribute> - <attribute><id>PM_SLEEP_EXIT</id></attribute> - <attribute><id>PM_SLEEP_TYPE</id></attribute> - <attribute><id>PM_APSS_CHIP_SELECT</id> - <default>0x00</default><!-- CS0 --> - </attribute> - <attribute><id>PM_PBAX_NODEID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_CHIPID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> - <default>0</default> - </attribute> - <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -3795,7 +3939,60 @@ <id>PROC_PCIE_PHB_ACTIVE</id> <default>0xE0</default> </attribute> - + <!-- PM_ attributes --> + <attribute> + <id>PM_UNDERVOLTING_FRQ_MINIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SPIVID_PORT_ENABLE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_APSS_CHIP_SELECT</id> + <default>0xff</default> + </attribute> + <attribute> + <id>PM_PBAX_NODEID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_CHIPID</id> + <default>3</default> + </attribute> + <attribute> + <id>PM_PBAX_BRDCST_ID_VECTOR</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_TYPE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_TYPE</id> + <default>0</default> + </attribute> + <!-- End PM_ attributes --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> @@ -4803,26 +5000,6 @@ <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_SPIVID_PORT_ENABLE</id> - <default>0x7</default><!-- REDUNDANT --> - </attribute> - <attribute><id>PM_SLEEP_ENTRY</id></attribute> - <attribute><id>PM_SLEEP_EXIT</id></attribute> - <attribute><id>PM_SLEEP_TYPE</id></attribute> - <attribute><id>PM_APSS_CHIP_SELECT</id> - <default>0x00</default><!-- CS0 --> - </attribute> - <attribute><id>PM_PBAX_NODEID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_CHIPID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> - <default>0</default> - </attribute> - <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -4919,7 +5096,60 @@ <id>PROC_PCIE_PHB_ACTIVE</id> <default>0xE0</default> </attribute> - + <!-- PM_ attributes --> + <attribute> + <id>PM_UNDERVOLTING_FRQ_MINIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SPIVID_PORT_ENABLE</id> + <default>4</default> + </attribute> + <attribute> + <id>PM_APSS_CHIP_SELECT</id> + <default>0x00</default> + </attribute> + <attribute> + <id>PM_PBAX_NODEID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_CHIPID</id> + <default>4</default> + </attribute> + <attribute> + <id>PM_PBAX_BRDCST_ID_VECTOR</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_TYPE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_TYPE</id> + <default>0</default> + </attribute> + <!-- End PM_ attributes --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> @@ -5896,26 +6126,6 @@ <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_SPIVID_PORT_ENABLE</id> - <default>0x7</default><!-- REDUNDANT --> - </attribute> - <attribute><id>PM_SLEEP_ENTRY</id></attribute> - <attribute><id>PM_SLEEP_EXIT</id></attribute> - <attribute><id>PM_SLEEP_TYPE</id></attribute> - <attribute><id>PM_APSS_CHIP_SELECT</id> - <default>0x00</default><!-- CS0 --> - </attribute> - <attribute><id>PM_PBAX_NODEID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_CHIPID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> - <default>0</default> - </attribute> - <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -6012,7 +6222,60 @@ <id>PROC_PCIE_PHB_ACTIVE</id> <default>0xE0</default> </attribute> - + <!-- PM_ attributes --> + <attribute> + <id>PM_UNDERVOLTING_FRQ_MINIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SPIVID_PORT_ENABLE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_APSS_CHIP_SELECT</id> + <default>0xff</default> + </attribute> + <attribute> + <id>PM_PBAX_NODEID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_CHIPID</id> + <default>5</default> + </attribute> + <attribute> + <id>PM_PBAX_BRDCST_ID_VECTOR</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_TYPE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_TYPE</id> + <default>0</default> + </attribute> + <!-- End PM_ attributes --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> @@ -6987,26 +7250,6 @@ <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_SPIVID_PORT_ENABLE</id> - <default>0x7</default><!-- REDUNDANT --> - </attribute> - <attribute><id>PM_SLEEP_ENTRY</id></attribute> - <attribute><id>PM_SLEEP_EXIT</id></attribute> - <attribute><id>PM_SLEEP_TYPE</id></attribute> - <attribute><id>PM_APSS_CHIP_SELECT</id> - <default>0x00</default><!-- CS0 --> - </attribute> - <attribute><id>PM_PBAX_NODEID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_CHIPID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> - <default>0</default> - </attribute> - <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -7103,7 +7346,60 @@ <id>PROC_PCIE_PHB_ACTIVE</id> <default>0xE0</default> </attribute> - + <!-- PM_ attributes --> + <attribute> + <id>PM_UNDERVOLTING_FRQ_MINIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SPIVID_PORT_ENABLE</id> + <default>4</default> + </attribute> + <attribute> + <id>PM_APSS_CHIP_SELECT</id> + <default>0x00</default> + </attribute> + <attribute> + <id>PM_PBAX_NODEID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_CHIPID</id> + <default>6</default> + </attribute> + <attribute> + <id>PM_PBAX_BRDCST_ID_VECTOR</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_TYPE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_TYPE</id> + <default>0</default> + </attribute> + <!-- End PM_ attributes --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> @@ -8078,26 +8374,6 @@ <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_SPIVID_PORT_ENABLE</id> - <default>0x7</default><!-- REDUNDANT --> - </attribute> - <attribute><id>PM_SLEEP_ENTRY</id></attribute> - <attribute><id>PM_SLEEP_EXIT</id></attribute> - <attribute><id>PM_SLEEP_TYPE</id></attribute> - <attribute><id>PM_APSS_CHIP_SELECT</id> - <default>0x00</default><!-- CS0 --> - </attribute> - <attribute><id>PM_PBAX_NODEID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_CHIPID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> - <default>0</default> - </attribute> - <!-- End pm_plat_attributes.xml --> <!-- PROC_PCIE_ attributes --> <attribute> @@ -8194,7 +8470,60 @@ <id>PROC_PCIE_PHB_ACTIVE</id> <default>0xE0</default> </attribute> - + <!-- PM_ attributes --> + <attribute> + <id>PM_UNDERVOLTING_FRQ_MINIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SPIVID_PORT_ENABLE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_APSS_CHIP_SELECT</id> + <default>0xff</default> + </attribute> + <attribute> + <id>PM_PBAX_NODEID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_CHIPID</id> + <default>7</default> + </attribute> + <attribute> + <id>PM_PBAX_BRDCST_ID_VECTOR</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_TYPE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_TYPE</id> + <default>0</default> + </attribute> + <!-- End PM_ attributes --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> @@ -16289,30 +16618,8 @@ <attribute><id>PROC_DCM_INSTALLED</id> <default>0</default> </attribute> - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_SPIVID_PORT_ENABLE</id> - <default>0x7</default><!-- REDUNDANT --> - </attribute> - <attribute><id>PM_SLEEP_ENTRY</id></attribute> - <attribute><id>PM_SLEEP_EXIT</id></attribute> - <attribute><id>PM_SLEEP_TYPE</id></attribute> - <attribute><id>PM_APSS_CHIP_SELECT</id> - <default>0x00</default><!-- CS0 --> - </attribute> - <attribute><id>PM_PBAX_NODEID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_CHIPID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> - <default>0</default> - </attribute> - <!-- End pm_plat_attributes.xml --> </targetInstance> - - <!-- DIMMS id/physical is sys-0/node-0/dimm-[d] where d=[0-512] diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 9120f4ae9..807a9d6d3 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -119,26 +119,24 @@ <attribute><id>MNFG_FLAGS</id></attribute> <attribute><id>FABRIC_TO_PHYSICAL_NODE_MAP</id></attribute> <!-- Start pm_plat_attributes.xml --> - <attribute><id>FREQ_CORE_MAX</id></attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id></attribute> <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id></attribute> + <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id></attribute> + <attribute><id>PM_SPIVID_FREQUENCY</id></attribute> + <attribute><id>PM_SAFE_FREQUENCY</id></attribute> <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id></attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id></attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id></attribute> <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id></attribute> <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id></attribute> - <attribute><id>PM_SAFE_FREQUENCY</id></attribute> + <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id></attribute> + <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id></attribute> <attribute><id>PM_SPIPSS_FREQUENCY</id></attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id></attribute> - - <attribute><id>CPM_TURBO_BOOST_PERCENT</id></attribute> <attribute><id>PROC_R_LOADLINE_VDD</id></attribute> - <attribute><id>PROC_R_LOADLINE_VCS</id></attribute> <attribute><id>PROC_R_DISTLOSS_VDD</id></attribute> - <attribute><id>PROC_R_DISTLOSS_VCS</id></attribute> <attribute><id>PROC_VRM_VOFFSET_VDD</id></attribute> + <attribute><id>PROC_R_LOADLINE_VCS</id></attribute> + <attribute><id>PROC_R_DISTLOSS_VCS</id></attribute> <attribute><id>PROC_VRM_VOFFSET_VCS</id></attribute> - + <attribute><id>FREQ_CORE_MAX</id></attribute> + <attribute><id>CPM_TURBO_BOOST_PERCENT</id></attribute> <!-- End pm_plat_attributes.xml --> <!-- sbe_config_update attributes --> <attribute><id>NEST_FREQ_MHZ</id></attribute> @@ -306,19 +304,27 @@ <attribute><id>PROC_L3_BAR1_REG</id></attribute> <attribute><id>PROC_L3_BAR2_REG</id></attribute> <attribute><id>PROC_L3_BAR_GROUP_MASK_REG</id></attribute> - <!-- proc_fab_smp_fabric_attributes.xml --> - <attribute><id>PROC_PCIE_NOT_F_LINK</id></attribute> - <attribute><id>MSS_INTERLEAVE_ENABLE</id></attribute> - <attribute><id>MSS_MCS_GROUP_32</id></attribute> - <attribute><id>MSS_MEM_IPL_COMPLETE</id></attribute> - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_APSS_CHIP_SELECT</id></attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id></attribute> - <attribute><id>PM_PBAX_CHIPID</id></attribute> - <attribute><id>PM_PBAX_NODEID</id></attribute> - <attribute><id>PM_SPIVID_PORT_ENABLE</id></attribute> - <!-- End pm_plat_attributes.xml --> - <!-- Start pm_hwp_attributes.xml --> + <!-- proc_fab_smp_fabric_attributes.xml --> + <attribute><id>PROC_PCIE_NOT_F_LINK</id></attribute> + <attribute><id>MSS_INTERLEAVE_ENABLE</id></attribute> + <attribute><id>MSS_MCS_GROUP_32</id></attribute> + <attribute><id>MSS_MEM_IPL_COMPLETE</id></attribute> + <!-- Start pm_plat_attributes.xml --> + <attribute><id>PM_UNDERVOLTING_FRQ_MINIMUM</id></attribute> + <attribute><id>PM_UNDERVOLTING_FREQ_MAXIMUM</id></attribute> + <attribute><id>PM_SPIVID_PORT_ENABLE</id></attribute> + <attribute><id>PM_APSS_CHIP_SELECT</id></attribute> + <attribute><id>PM_PBAX_NODEID</id></attribute> + <attribute><id>PM_PBAX_CHIPID</id></attribute> + <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id></attribute> + <attribute><id>PM_SLEEP_ENTRY</id></attribute> + <attribute><id>PM_SLEEP_EXIT</id></attribute> + <attribute><id>PM_SLEEP_TYPE</id></attribute> + <attribute><id>PM_WINKLE_ENTRY</id></attribute> + <attribute><id>PM_WINKLE_EXIT</id></attribute> + <attribute><id>PM_WINKLE_TYPE</id></attribute> + <!-- End pm_plat_attributes.xml --> + <!-- Start pm_hwp_attributes.xml --> <attribute><id>PM_AISS_TIMEOUT</id></attribute> <attribute><id>PM_EXTERNAL_VRM_STEPDELAY_RANGE</id></attribute> <attribute><id>PM_EXTERNAL_VRM_STEPDELAY_VALUE</id></attribute> @@ -362,9 +368,6 @@ <attribute><id>PM_RESONANT_CLOCK_LFRLOW_PSTATE</id></attribute> <attribute><id>PM_RESONANT_CLOCK_LFRUPPER_PSTATE</id></attribute> <attribute><id>PM_SAFE_PSTATE</id></attribute> - <attribute><id>PM_SLEEP_ENTRY</id></attribute> - <attribute><id>PM_SLEEP_EXIT</id></attribute> - <attribute><id>PM_SLEEP_TYPE</id></attribute> <attribute><id>PM_SLEEP_WINKLE_REQUEST_TIMEOUT</id></attribute> <attribute><id>PM_SPIPSS_CLOCK_DIVIDER</id></attribute> <attribute><id>PM_SPIPSS_CLOCK_PHASE</id></attribute> @@ -390,7 +393,6 @@ <attribute><id>PM_SPIVID_IN_DELAY_FRAME2</id></attribute> <attribute><id>PM_SPIVID_MAJORITY_VOTE_ENABLE</id></attribute> <attribute><id>PM_SPIVID_MAX_RETRIES</id></attribute> - <attribute><id>PM_WINKLE_TYPE</id></attribute> <attribute><id>PROC_DPLL_DIVIDER</id></attribute> <!-- End pm_hwp_attributes.xml --> <!-- Begin poreve_memory_attributes.xml --> @@ -407,23 +409,7 @@ <attribute><id>PROC_MIRROR_SIZES_ACK</id></attribute> <attribute><id>PROC_MEM_BASES_ACK</id></attribute> <attribute><id>PROC_MEM_SIZES_ACK</id></attribute> - - <attribute><id>FREQ_EXT_BIAS_UP</id></attribute> - <attribute><id>FREQ_EXT_BIAS_DOWN</id></attribute> - <attribute><id>VOLTAGE_EXT_VDD_BIAS_UP</id></attribute> - <attribute><id>VOLTAGE_EXT_VDD_BIAS_DOWN</id></attribute> - <attribute><id>VOLTAGE_EXT_VCS_BIAS_UP</id></attribute> - <attribute><id>VOLTAGE_EXT_VCS_BIAS_DOWN</id></attribute> - <attribute><id>VOLTAGE_INT_VDD_BIAS_UP</id></attribute> - <attribute><id>VOLTAGE_INT_VDD_BIAS_DOWN</id></attribute> - <attribute><id>VOLTAGE_INT_VCS_BIAS_UP</id></attribute> - <attribute><id>VOLTAGE_INT_VCS_BIAS_DOWN</id></attribute> - <attribute><id>PM_UNDERVOLTING_FRQ_MINIMUM</id></attribute> - <attribute><id>PM_UNDERVOLTING_FREQ_MAXIMUM</id></attribute> <attribute><id>CPM_INFLECTION_POINTS</id></attribute> - <attribute><id>PM_WINKLE_ENTRY</id></attribute> - <attribute><id>PM_WINKLE_EXIT</id></attribute> - </targetType> <targetType> diff --git a/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml b/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml index 175a0284c..462478a42 100644 --- a/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml +++ b/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml @@ -34,10 +34,6 @@ <id>sys0</id> <type>sys-sys-power8</type> <attribute> - <id>EXECUTION_PLATFORM</id> - <default>1</default> - </attribute> - <attribute> <id>PHYS_PATH</id> <default>physical:sys-0</default> </attribute> @@ -46,7 +42,64 @@ <default>affinity:sys-0</default> </attribute> <attribute> - <id>IS_SIMULATION</id> + <id>EXECUTION_PLATFORM</id> + <default>1</default> + </attribute> + <!-- System Attributes from MRW --> + <attribute> + <id>FREQ_PROC_REFCLOCK</id> + <default>200</default> + </attribute> + <attribute> + <id>FREQ_PROC_REFCLOCK_KHZ</id> + <default>200000</default> + </attribute> + <attribute> + <id>FREQ_MEM_REFCLOCK</id> + <default>266</default> + </attribute> + <attribute> + <id>ALL_MCS_IN_INTERLEAVING_GROUP</id> + <default>1</default> + </attribute> + <attribute> + <id>FREQ_A</id> + <default>0x1900</default> + </attribute> + <attribute> + <id>FREQ_CORE_FLOOR</id> + <default>0x2580</default> + </attribute> + <attribute> + <id>FREQ_PB</id> + <default>0x960</default> + </attribute> + <attribute> + <id>NEST_FREQ_MHZ</id> + <default>0x960</default> + </attribute> + <attribute> + <id>FREQ_PCIE</id> + <default>0x3E8</default> + </attribute> + <attribute> + <id>FREQ_X</id> + <default>0x12C0</default> + </attribute> + <attribute> + <id>MSS_CLEANER_ENABLE</id> + <default>1</default> + </attribute> + <attribute> + <id>MSS_MBA_ADDR_INTERLEAVE_BIT</id> + <default>24</default> + </attribute> + <attribute> + <id>MSS_MBA_CACHELINE_INTERLEAVE_MODE</id> + <default>1</default> + </attribute> + <attribute> + <id>MSS_PREFETCH_ENABLE</id> <default>1</default> </attribute> <attribute> @@ -62,49 +115,110 @@ <default>2</default> </attribute> <attribute> - <id>ALL_MCS_IN_INTERLEAVING_GROUP</id> + <id>X_EREPAIR_THRESHOLD_FIELD</id> <default>1</default> </attribute> <attribute> - <id>FREQ_PROC_REFCLOCK</id> - <default>200</default> + <id>A_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> </attribute> <attribute> - <id>FREQ_MEM_REFCLOCK</id> - <default>266</default> + <id>DMI_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> </attribute> <attribute> - <id>FREQ_CORE_FLOOR</id> - <default>0x2580</default> + <id>X_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> </attribute> <attribute> - <id>FREQ_PB</id> - <default>0x960</default> + <id>A_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> </attribute> <attribute> - <id>FREQ_X</id> - <default>0x12C0</default> + <id>DMI_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> </attribute> <attribute> - <id>FREQ_A</id> - <default>0x1900</default> + <id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id> + <default>96</default> </attribute> <attribute> - <id>FREQ_PCIE</id> - <default>0x3E8</default> + <id>MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR</id> + <default>512</default> + </attribute> + <attribute> + <id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id> + <default>32</default> + </attribute> + <attribute> + <id>MRW_THERMAL_MEMORY_POWER_LIMIT</id> + <default>5000</default> + </attribute> + <attribute> + <id>PM_EXTERNAL_VRM_STEPSIZE</id> + <default>0xc4</default> + </attribute> + <attribute> + <id>PM_EXTERNAL_VRM_STEPDELAY</id> + <default>0xa</default> + </attribute> + <attribute> + <id>PM_SPIVID_FREQUENCY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SAFE_FREQUENCY</id> + <default>0x7ec</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> + <default>0x7d0</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> + <default>0x8fc</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> + <default>0xbb8</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> + <default>0xbea</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> + <default>0x12c0</default> + </attribute> + <attribute> + <id>PM_SPIPSS_FREQUENCY</id> + <default>0xa</default> + </attribute> + <attribute> + <id>PROC_R_LOADLINE_VDD</id> + <default>0x23a</default> + </attribute> + <attribute> + <id>PROC_R_DISTLOSS_VDD</id> + <default>0x140</default> </attribute> <attribute> - <id>PROC_EPS_GB_DIRECTION</id> + <id>PROC_VRM_VOFFSET_VDD</id> <default>0</default> </attribute> <attribute> - <id>PROC_EPS_GB_PERCENTAGE</id> - <default>0x14</default> + <id>PROC_R_LOADLINE_VCS</id> + <default>0x23a</default> + </attribute> + <attribute> + <id>PROC_R_DISTLOSS_VCS</id> + <default>0xdac</default> </attribute> <attribute> - <id>PROC_FABRIC_ASYNC_SAFE_MODE</id> + <id>PROC_VRM_VOFFSET_VCS</id> <default>0</default> </attribute> + <!-- End System Attributes from MRW --> <attribute> <id>ISTEP_MODE</id> <default>0x1</default> @@ -144,92 +258,18 @@ <default>NONE</default> </attribute> <attribute> - <id>MSS_MBA_ADDR_INTERLEAVE_BIT</id> - <default>24</default> - </attribute> - <attribute> - <id>MSS_MBA_CACHELINE_INTERLEAVE_MODE</id> - <default>1</default> - </attribute> - <attribute> - <id>MSS_PREFETCH_ENABLE</id> - <default>1</default> - </attribute> - <attribute> - <id>MSS_CLEANER_ENABLE</id> + <id>IS_SIMULATION</id> <default>1</default> </attribute> - <!-- Start pm_plat_attributes.xml --> <attribute><id>FREQ_CORE_MAX</id> <default>4000</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>0b11</default> - </attribute> - <!-- End pm_plat_attributes.xml --> <attribute><id>MAX_EXS_PER_PROC_CHIP</id> <default>6</default> </attribute> <attribute><id>MAX_MCS_PER_SYSTEM</id> <default>4</default> </attribute> - <attribute><id>X_EREPAIR_THRESHOLD_FIELD</id> - <default>1</default> - </attribute> - <attribute><id>A_EREPAIR_THRESHOLD_FIELD</id> - <default>1</default> - </attribute> - <attribute><id>DMI_EREPAIR_THRESHOLD_FIELD</id> - <default>1</default> - </attribute> - <attribute><id>A_EREPAIR_THRESHOLD_MNFG</id> - <default>0</default> - </attribute> - <attribute> <id>DMI_EREPAIR_THRESHOLD_MNFG</id> - <default>0</default> - </attribute> - <attribute><id>X_EREPAIR_THRESHOLD_MNFG</id> - <default>0</default> - </attribute> - <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id> - <default>96</default> - </attribute> - <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR</id> - <default>512</default> - </attribute> - <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id> - <default>32</default> - </attribute> - <attribute><id>MRW_THERMAL_MEMORY_POWER_LIMIT</id> - <default>5000</default> - </attribute> </targetInstance> <!-- System node 0 --> diff --git a/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml b/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml index ccd9643cc..94bf86836 100644 --- a/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml +++ b/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml @@ -33,10 +33,6 @@ <id>sys0</id> <type>sys-sys-power8</type> <attribute> - <id>EXECUTION_PLATFORM</id> - <default>1</default> - </attribute> - <attribute> <id>PHYS_PATH</id> <default>physical:sys-0</default> </attribute> @@ -45,6 +41,67 @@ <default>affinity:sys-0</default> </attribute> <attribute> + <id>EXECUTION_PLATFORM</id> + <default>1</default> + </attribute> + <!-- System Attributes from MRW --> + <attribute> + <id>FREQ_PROC_REFCLOCK</id> + <default>200</default> + </attribute> + <attribute> + <id>FREQ_PROC_REFCLOCK_KHZ</id> + <default>200000</default> + </attribute> + <attribute> + <id>FREQ_MEM_REFCLOCK</id> + <default>266</default> + </attribute> + <attribute> + <id>ALL_MCS_IN_INTERLEAVING_GROUP</id> + <default>1</default> + </attribute> + <attribute> + <id>FREQ_A</id> + <default>0x1900</default> + </attribute> + <attribute> + <id>FREQ_CORE_FLOOR</id> + <default>0x12C0</default> + </attribute> + <attribute> + <id>FREQ_PB</id> + <default>0x960</default> + </attribute> + <attribute> + <id>NEST_FREQ_MHZ</id> + <default>0x960</default> + </attribute> + <attribute> + <id>FREQ_PCIE</id> + <default>0x3E8</default> + </attribute> + <attribute> + <id>FREQ_X</id> + <default>0x12C0</default> + </attribute> + <attribute> + <id>MSS_CLEANER_ENABLE</id> + <default>0</default> + </attribute> + <attribute> + <id>MSS_MBA_ADDR_INTERLEAVE_BIT</id> + <default>24</default> + </attribute> + <attribute> + <id>MSS_MBA_CACHELINE_INTERLEAVE_MODE</id> + <default>0</default> + </attribute> + <attribute> + <id>MSS_PREFETCH_ENABLE</id> + <default>1</default> + </attribute> + <attribute> <id>PROC_EPS_TABLE_TYPE</id> <default>2</default> </attribute> @@ -57,53 +114,114 @@ <default>2</default> </attribute> <attribute> - <id>ALL_MCS_IN_INTERLEAVING_GROUP</id> + <id>X_EREPAIR_THRESHOLD_FIELD</id> <default>1</default> </attribute> <attribute> - <id>FREQ_PROC_REFCLOCK</id> - <default>200</default> + <id>A_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> </attribute> <attribute> - <id>FREQ_MEM_REFCLOCK</id> - <default>266</default> + <id>DMI_EREPAIR_THRESHOLD_FIELD</id> + <default>1</default> </attribute> <attribute> - <id>FREQ_CORE_FLOOR</id> - <default>0x12C0</default> + <id>X_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> </attribute> <attribute> - <id>FREQ_PB</id> - <default>0x960</default> + <id>A_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> </attribute> <attribute> - <id>FREQ_X</id> - <default>0x12C0</default> + <id>DMI_EREPAIR_THRESHOLD_MNFG</id> + <default>0</default> </attribute> <attribute> - <id>FREQ_A</id> - <default>0x1900</default> + <id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id> + <default>96</default> </attribute> <attribute> - <id>FREQ_PCIE</id> - <default>0x3E8</default> + <id>MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR</id> + <default>512</default> </attribute> <attribute> - <id>BOOT_FREQ_MHZ</id> - <default>0x04B0</default> + <id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id> + <default>32</default> + </attribute> + <attribute> + <id>MRW_THERMAL_MEMORY_POWER_LIMIT</id> + <default>5000</default> + </attribute> + <attribute> + <id>PM_EXTERNAL_VRM_STEPSIZE</id> + <default>0xc4</default> + </attribute> + <attribute> + <id>PM_EXTERNAL_VRM_STEPDELAY</id> + <default>0xa</default> + </attribute> + <attribute> + <id>PM_SPIVID_FREQUENCY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SAFE_FREQUENCY</id> + <default>0x7ec</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> + <default>0x7d0</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> + <default>0x8fc</default> </attribute> <attribute> - <id>PROC_EPS_GB_DIRECTION</id> + <id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> + <default>0xbb8</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> + <default>0xbea</default> + </attribute> + <attribute> + <id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> + <default>0x12c0</default> + </attribute> + <attribute> + <id>PM_SPIPSS_FREQUENCY</id> + <default>0xa</default> + </attribute> + <attribute> + <id>PROC_R_LOADLINE_VDD</id> + <default>0x23a</default> + </attribute> + <attribute> + <id>PROC_R_DISTLOSS_VDD</id> + <default>0x140</default> + </attribute> + <attribute> + <id>PROC_VRM_VOFFSET_VDD</id> <default>0</default> </attribute> <attribute> - <id>PROC_EPS_GB_PERCENTAGE</id> - <default>0x14</default> + <id>PROC_R_LOADLINE_VCS</id> + <default>0x23a</default> + </attribute> + <attribute> + <id>PROC_R_DISTLOSS_VCS</id> + <default>0xdac</default> </attribute> <attribute> - <id>PROC_FABRIC_ASYNC_SAFE_MODE</id> + <id>PROC_VRM_VOFFSET_VCS</id> <default>0</default> </attribute> + <!-- End System Attributes from MRW --> + <attribute> + <id>BOOT_FREQ_MHZ</id> + <default>0x04B0</default> + </attribute> <attribute> <id>ISTEP_MODE</id> <default>0x1</default> @@ -141,96 +259,18 @@ <default>NONE</default> </attribute> <attribute> - <id>MSS_MBA_ADDR_INTERLEAVE_BIT</id> - <default>24</default> - </attribute> - <attribute> - <id>MSS_MBA_CACHELINE_INTERLEAVE_MODE</id> - <default>0</default> - </attribute> - <attribute> - <id>MSS_PREFETCH_ENABLE</id> + <id>IS_SIMULATION</id> <default>1</default> </attribute> - <attribute> - <id>MSS_CLEANER_ENABLE</id> - <default>0</default> - </attribute> - <!-- Start pm_plat_attributes.xml --> <attribute><id>FREQ_CORE_MAX</id> <default>4000</default> </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id> - <default>2500</default> - </attribute> - <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id> - <default>10</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id> - <default>2000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id> - <default>2300</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id> - <default>3000</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id> - <default>3050</default> - </attribute> - <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id> - <default>4800</default> - </attribute> - <attribute><id>PM_SAFE_FREQUENCY</id> - <default>3200</default> - </attribute> - <attribute><id>PM_SPIPSS_FREQUENCY</id> - <default>10</default> - </attribute> - <attribute><id>PM_SPIVID_FREQUENCY</id> - <default>10</default> - </attribute> - <!-- End pm_plat_attributes.xml --> - <attribute> - <id>IS_SIMULATION</id> - <default>1</default> - </attribute> <attribute><id>MAX_EXS_PER_PROC_CHIP</id> <default>12</default> </attribute> <attribute><id>MAX_MCS_PER_SYSTEM</id> <default>8</default> </attribute> - <attribute><id>X_EREPAIR_THRESHOLD_FIELD</id> - <default>1</default> - </attribute> - <attribute><id>A_EREPAIR_THRESHOLD_FIELD</id> - <default>1</default> - </attribute> - <attribute><id>DMI_EREPAIR_THRESHOLD_FIELD</id> - <default>1</default> - </attribute> - <attribute><id>X_EREPAIR_THRESHOLD_MNFG</id> - <default>0</default> - </attribute> - <attribute><id>A_EREPAIR_THRESHOLD_MNFG</id> - <default>0</default> - </attribute> - <attribute><id>DMI_EREPAIR_THRESHOLD_MNFG</id> - <default>0</default> - </attribute> - <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id> - <default>96</default> - </attribute> - <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR</id> - <default>512</default> - </attribute> - <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id> - <default>32</default> - </attribute> - <attribute><id>MRW_THERMAL_MEMORY_POWER_LIMIT</id> - <default>5000</default> - </attribute> </targetInstance> <!-- System node 0 --> @@ -324,33 +364,6 @@ <default>0</default> </attribute> - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_SPIVID_PORT_ENABLE</id> - <default>0b111</default><!-- REDUNDANT --> - </attribute> - <attribute><id>PM_SLEEP_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_APSS_CHIP_SELECT</id> - <default>0x00</default><!-- CS0 --> - </attribute> - <attribute><id>PM_PBAX_NODEID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_CHIPID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> - <default>0</default> - </attribute> - <!-- End pm_plat_attributes.xml --> - <!-- PROC_PCIE_ attributes --> <attribute> <id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id> @@ -446,6 +459,60 @@ <id>PROC_PCIE_PHB_ACTIVE</id> <default>0xE0</default> </attribute> + <!-- PM_ attributes --> + <attribute> + <id>PM_UNDERVOLTING_FRQ_MINIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SPIVID_PORT_ENABLE</id> + <default>4</default> + </attribute> + <attribute> + <id>PM_APSS_CHIP_SELECT</id> + <default>0x00</default> + </attribute> + <attribute> + <id>PM_PBAX_NODEID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_CHIPID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_BRDCST_ID_VECTOR</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_TYPE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_TYPE</id> + <default>0</default> + </attribute> + <!-- End PM_ attributes --> </targetInstance> <!-- Venice n0p0 EX units --> @@ -1389,33 +1456,6 @@ <default>0</default> </attribute> - <!-- Start pm_plat_attributes.xml --> - <attribute><id>PM_SPIVID_PORT_ENABLE</id> - <default>0b111</default><!-- REDUNDANT --> - </attribute> - <attribute><id>PM_SLEEP_ENTRY</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_EXIT</id> - <default>1</default><!-- ASSISTED --> - </attribute> - <attribute><id>PM_SLEEP_TYPE</id> - <default>1</default><!-- DEEP --> - </attribute> - <attribute><id>PM_APSS_CHIP_SELECT</id> - <default>0x00</default><!-- CS0 --> - </attribute> - <attribute><id>PM_PBAX_NODEID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_CHIPID</id> - <default>0</default> - </attribute> - <attribute><id>PM_PBAX_BRDCST_ID_VECTOR</id> - <default>0</default> - </attribute> - <!-- End pm_plat_attributes.xml --> - <!-- PROC_PCIE_ attributes --> <attribute> <id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id> @@ -1511,6 +1551,60 @@ <id>PROC_PCIE_PHB_ACTIVE</id> <default>0xE0</default> </attribute> + <!-- PM_ attributes --> + <attribute> + <id>PM_UNDERVOLTING_FRQ_MINIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SPIVID_PORT_ENABLE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_APSS_CHIP_SELECT</id> + <default>0xff</default> + </attribute> + <attribute> + <id>PM_PBAX_NODEID</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_PBAX_CHIPID</id> + <default>1</default> + </attribute> + <attribute> + <id>PM_PBAX_BRDCST_ID_VECTOR</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_SLEEP_TYPE</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_ENTRY</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_EXIT</id> + <default>0</default> + </attribute> + <attribute> + <id>PM_WINKLE_TYPE</id> + <default>0</default> + </attribute> + <!-- End PM_ attributes --> </targetInstance> <!-- Venice n0p1 EX units --> |