HWP: integrate opt_memmap into hostboot

Change-Id: I3c38143c5e4e8272dde94d7743f7e1f742178647
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2486
Tested-by: Jenkins Server
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

10 files changed, 395 insertions, 131 deletions

diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_memory_attributes.xml b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_memory_attributes.xml
index aa4cf90f9..cbfe25851 100644
--- a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_memory_attributes.xml
+++ b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_memory_attributes.xml
@@ -1,25 +1,25 @@
-<!--  IBM_PROLOG_BEGIN_TAG
-     This is an automatically generated prolog.
-
-     $Source: src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_memory_attributes.xml $
-
-     IBM CONFIDENTIAL
-
-     COPYRIGHT International Business Machines Corp. 2012
-
-     p1
-
-     Object Code Only (OCO) source materials
-     Licensed Internal Code Source Materials
-     IBM HostBoot Licensed Internal Code
-
-     The source code for this program is not published or other-
-     wise divested of its trade secrets, irrespective of what has
-     been deposited with the U.S. Copyright Office.
-
-     Origin: 30
-
-     IBM_PROLOG_END_TAG -->
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_memory_attributes.xml $ -->
+<!--                                                                        -->
+<!-- IBM CONFIDENTIAL                                                       -->
+<!--                                                                        -->
+<!-- COPYRIGHT International Business Machines Corp. 2012                   -->
+<!--                                                                        -->
+<!-- p1                                                                     -->
+<!--                                                                        -->
+<!-- Object Code Only (OCO) source materials                                -->
+<!-- Licensed Internal Code Source Materials                                -->
+<!-- IBM HostBoot Licensed Internal Code                                    -->
+<!--                                                                        -->
+<!-- The source code for this program is not published or otherwise         -->
+<!-- divested of its trade secrets, irrespective of what has been           -->
+<!-- deposited with the U.S. Copyright Office.                              -->
+<!--                                                                        -->
+<!-- Origin: 30                                                             -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
 <!-- proc_setup_bars_memory_attributes.xml -->
 <attributes>
   <!-- ********************************************************************* -->
@@ -33,7 +33,7 @@
         64-bit RA
     </description>
     <valueType>uint64</valueType>
-    <platInit/>
+    <writeable/>
     <persistRuntime/>
   </attribute>
   <!-- ********************************************************************* -->
@@ -82,7 +82,7 @@
         64-bit RA
     </description>
     <valueType>uint64</valueType>
-    <platInit/>
+    <writeable/>
     <persistRuntime/>
   </attribute>
   <!-- ********************************************************************* -->
@@ -152,6 +152,7 @@
     </description>
     <valueType>uint64</valueType>
     <array>2</array>
+    <platInit/>
     <persistRuntime/>
   </attribute>
   <!-- ********************************************************************* -->
diff --git a/src/usr/hwpf/hwp/mc_config/makefile b/src/usr/hwpf/hwp/mc_config/makefile
index 6a49bc6ff..cab13d0af 100644
--- a/src/usr/hwpf/hwp/mc_config/makefile
+++ b/src/usr/hwpf/hwp/mc_config/makefile
@@ -45,6 +45,7 @@ OBJS =  mc_config.o			\
         mss_freq.o 			\
         mss_eff_config.o                \
         mss_eff_grouping.o              \
+        opt_memmap.o                    \
         mss_eff_config_thermal.o        \
         mss_eff_config_termination.o    \
         mss_eff_config_rank_group.o
diff --git a/src/usr/hwpf/hwp/mc_config/mc_config.C b/src/usr/hwpf/hwp/mc_config/mc_config.C
index f3bd67b63..486987fe2 100644
--- a/src/usr/hwpf/hwp/mc_config/mc_config.C
+++ b/src/usr/hwpf/hwp/mc_config/mc_config.C
@@ -71,6 +71,7 @@
 #include    "mss_freq/mss_freq.H"
 #include    "mss_eff_config/mss_eff_config.H"
 #include    "mss_eff_config/mss_eff_grouping.H"
+#include    "mss_eff_config/opt_memmap.H"
 
 namespace   MC_CONFIG
 {
@@ -335,6 +336,45 @@ errlHndl_t call_mss_eff_grouping()
     return l_err;
 }
 
+errlHndl_t call_opt_memmap()
+{
+    errlHndl_t l_err = NULL;
+
+    TARGETING::TargetHandleList l_procs;
+    getAllChips(l_procs, TYPE_PROC);
+
+    std::vector<fapi::Target> l_fapi_procs;
+
+    for ( TARGETING::TargetHandleList::iterator l_iter = l_procs.begin();
+          l_iter != l_procs.end(); ++l_iter )
+    {
+        //  make a local copy of the target for ease of use
+        const TARGETING::Target*  l_target = *l_iter;
+
+        // cast OUR type of target to a FAPI type of target.
+        const fapi::Target l_fapi_target( TARGET_TYPE_PROC_CHIP,
+                    reinterpret_cast<void *>
+                    (const_cast<TARGETING::Target*>(l_target)) );
+
+        l_fapi_procs.push_back(l_fapi_target);
+    }
+
+    FAPI_INVOKE_HWP(l_err, opt_memmap, l_fapi_procs);
+
+    if ( l_err )
+    {
+        TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                   "ERROR 0x%.8X:  opt_memmap HWP", l_err->reasonCode());
+    }
+    else
+    {
+        TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                   "SUCCESS :  opt_memmap HWP");
+    }
+
+    return l_err;
+}
+
 //
 //  Wrapper function to call 12.3 : mss_eff_config
 //
@@ -393,21 +433,37 @@ void*    call_mss_eff_config( void *io_pArgs )
         }
     }   // endfor
 
-    if (!l_err)
+    TARGETING::TargetHandleList l_procs;
+    getAllChips(l_procs, TYPE_PROC);
+
+    for (TARGETING::TargetHandleList::iterator l_iter = l_procs.begin();
+         l_iter != l_procs.end() && !l_err; ++l_iter)
     {
-        l_err = call_mss_eff_grouping();
-    }
+        TARGETING::Target*  l_target = *l_iter;
 
-    // When opt_memmap HWP is available, it will be called
-    // here between the two call_mss_eff_grouping() 
-    //
+        uint64_t l_base = 0;
+        l_target->setAttr<ATTR_MEM_BASE>( l_base  );
 
-    if(!l_err)
+        l_base = 0x0002000000000000;	// 512TB
+        l_target->setAttr<ATTR_MIRROR_BASE>( l_base );
+    }
+    
+    if (!l_err)
     {
         l_err = call_mss_eff_grouping();
+
+        if (!l_err)
+        {
+            l_err = call_opt_memmap();
+
+            if (!l_err)
+            {
+                l_err = call_mss_eff_grouping();
+            }
+        }
     }
 
-    if(l_err)
+    if (l_err)
     {
         /*@
          * @errortype
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/opt_memmap.C b/src/usr/hwpf/hwp/mc_config/mss_eff_config/opt_memmap.C
new file mode 100644
index 000000000..96b14d9a2
--- /dev/null
+++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/opt_memmap.C
@@ -0,0 +1,242 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/mc_config/mss_eff_config/opt_memmap.C $      */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2012
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! TITLE       : opt_memmap.C
+// *! DESCRIPTION : see additional comments below
+//------------------------------------------------------------------------------
+// Don't forget to create CVS comments when you check in your changes!
+//------------------------------------------------------------------------------
+//Owner :- Girisankar paulraj
+//Back-up owner :- Mark bellows
+//
+// CHANGE HISTORY:
+//------------------------------------------------------------------------------
+// Version:|  Author: |  Date:  | Comment:
+//---------|----------|---------|-----------------------------------------------
+//  1.1    | vanlee   | 12/01/12| First drop
+//------------------------------------------------------------------------------
+// Design flow
+//
+// opt_memmap() is run in between two mss_eff_grouping() calls.
+//
+// 1) Before First mss_eff_grouping() call
+//    - Each proc's ATTR_PROC_MEM_BASE attribute is set to 0
+//    - Each proc's ATTR_PROC_MIRROR_BASE attribute is set to 512TB
+// 2) First mss_eff_grouping() call
+//    - The HWP updates each proc's ATTR_PROC_MEM_BASES and ATTR_PROC_MEM_SIZES
+//      attributes based on installed memory behind each proc
+// 3) Call opt_memmap()
+//    - Get "effective stackable" size (EffSize) of each proc. Due to (1), 
+//        (a) EffSize = highest ATTR_PROC_MEM_BASES +
+//                      its corresponding ATTR_PROC_MEM_SIZES
+//        (b) Round up EffSize to a power of 2
+//        (c) Save (proc,EffSize) pair to a vector
+//        Repeat (a) - (c) for all procs
+//    - Sort all (proc,EffSize) pairs of the above vector based on EffSize from
+//      smallest to largest
+//    - Set the ATTR_PROC_MEM_BASE and ATTR_PROC_MIRROR_BASE attributes for
+//      each proc:
+//        cur_mem_base = 0
+//        cur_mirror_base = 512TB
+//        Starting from the last (proc,EffSize) pair of the vector
+//        while this (proc,EffSize) pair is not yet processed
+//        Begin
+//          set this proc ATTR_PROC_MEM_BASE = cur_mem_base
+//          set this proc ATTR_PROC_MIRROR_BASE = cur_mirrow_base
+//          cur_mem_base += "This proc EffSize"
+//          cur_mirrow_base += "This proc EffSize" / 2
+//          move backward to preceeding (proc,EffSize) pair
+//        End
+// 4) Second mss_eff_grouping() call
+//    - The HWP adjusts each proc's ATTR_PROC_MEM_BASES using the updated
+//      ATTR_PROC_MEM_BASE value from (3).
+//------------------------------------------------------------------------------
+//  Includes
+//------------------------------------------------------------------------------
+
+#include <opt_memmap.H>
+
+extern "C" {
+
+    using namespace fapi;
+
+    class MemRegion
+    {
+    public:
+        uint64_t iv_base;
+        uint64_t iv_size;
+        bool operator<(MemRegion rhs)
+        { 
+            bool l_lt = true;
+            if (iv_base > rhs.iv_base || 
+                (iv_base == rhs.iv_base && iv_size != 0))
+            {
+                l_lt = false;
+            }
+            return l_lt;
+        }
+        MemRegion(uint64_t b, uint64_t s) : iv_base(b), iv_size(s) {}
+    };
+
+    class ProcBase
+    {
+    public:
+        fapi::Target *iv_tgt;
+        uint64_t iv_size;
+        bool operator<(ProcBase rhs) { return iv_size < rhs.iv_size; }
+        ProcBase(fapi::Target* t, uint64_t s) : iv_tgt(t), iv_size(s) {}
+    };
+
+    inline uint64_t PowerOf2Roundedup( uint64_t i_number )
+    {
+        if (i_number)
+        {
+            uint64_t leading0s = 0;
+            asm volatile("cntlzd %0, %1" : "=r"(leading0s) : "r"(i_number));
+            uint64_t mask = ( 1ULL << (63 - leading0s) );
+            i_number = mask << ((mask ^ i_number) ? 1 : 0);
+        }
+        return i_number;
+    }
+        
+    ReturnCode opt_memmap(std::vector<fapi::Target> & i_procs)
+    {
+        ReturnCode rc;
+        std::vector<ProcBase> l_procBases;
+        const size_t l_MCS_per_proc = 8;
+        uint64_t l_bases[l_MCS_per_proc];
+        uint64_t l_sizes[l_MCS_per_proc];
+        uint32_t l_pos = 0;
+
+        for (std::vector<fapi::Target>::iterator l_iter = i_procs.begin();
+             l_iter != i_procs.end(); ++l_iter)
+        {
+            rc = FAPI_ATTR_GET(ATTR_POS, &(*l_iter), l_pos);
+            if (rc)
+            {
+                FAPI_ERR("Error reading ATTR_POS");
+                break;
+            }
+            else
+            {
+                FAPI_INF("Proc %d :", l_pos);
+            }
+
+            // retrieve bases and sizes
+            rc = FAPI_ATTR_GET(ATTR_PROC_MEM_BASES, &(*l_iter), l_bases);
+            if (rc)
+            {
+                FAPI_ERR("Error reading ATTR_PROC_MEM_BASES");
+                break;
+            }
+            else
+            {
+                for(size_t i = 0; i < l_MCS_per_proc; i++)
+                {
+                    FAPI_INF("  l_bases[%d] = %016X", i, l_bases[i]);
+                }
+            }
+
+            rc = FAPI_ATTR_GET(ATTR_PROC_MEM_SIZES, &(*l_iter), l_sizes);
+            if (rc)
+            {
+                FAPI_ERR("Error reading ATTR_PROC_MEM_SIZES");
+                break;
+            }
+            else
+            {
+                for(size_t i = 0; i < l_MCS_per_proc; i++)
+                {
+                    FAPI_INF("  l_sizes[%d] = %016X", i, l_sizes[i]);
+                }
+            }
+
+            // create the l_regions vector and sort it
+            std::vector<MemRegion> l_regions;
+            for (size_t i = 0; i < l_MCS_per_proc; i++)
+            {
+                MemRegion l_region(l_bases[i], l_sizes[i]);
+                l_regions.push_back(l_region);
+            }
+
+            // compute effective size and round up to power of 2
+            std::sort( l_regions.begin(), l_regions.end() );
+            uint64_t round_size = l_regions[l_regions.size()-1].iv_base;
+            round_size += l_regions[l_regions.size()-1].iv_size;
+            round_size = PowerOf2Roundedup( round_size );
+
+            FAPI_INF("  round_size = %016X", round_size);
+
+            // save the proc's target and effective size
+            ProcBase l_procBase(&(*l_iter), round_size);
+            l_procBases.push_back(l_procBase);
+        }
+
+        while (rc.ok())
+        {
+            std::sort(l_procBases.begin(), l_procBases.end());
+            uint64_t cur_mem_base = 0;
+            uint64_t cur_mir_base = 0x0002000000000000;  // 512TB
+
+            for (size_t i = l_procBases.size(); i != 0; --i)
+            {
+                fapi::Target * l_tgt = l_procBases[i-1].iv_tgt;
+                uint64_t size = l_procBases[i-1].iv_size;
+
+                uint32_t l_pos = 0;
+                rc = FAPI_ATTR_GET(ATTR_POS, l_tgt, l_pos);
+                if (rc.ok())
+                {
+                    FAPI_INF("proc%d MEM_BASE = %016X", l_pos, cur_mem_base);
+                    FAPI_INF("proc%d MIRROR_BASE = %016X", l_pos, cur_mir_base);
+                }
+
+                rc = FAPI_ATTR_SET(ATTR_PROC_MEM_BASE, l_tgt, cur_mem_base);
+                if (rc)
+                {
+                    FAPI_ERR("Error reading ATTR_PROC_MEM_BASE");
+                    break;
+                }
+
+                rc = FAPI_ATTR_SET(ATTR_PROC_MIRROR_BASE, l_tgt, cur_mir_base);
+                if (rc)
+                {
+                    FAPI_ERR("Error reading ATTR_PROC_MIRROR_BASE");
+                    break;
+                }
+                cur_mem_base += size;
+                cur_mir_base += size / 2;
+            }
+
+            break;
+
+        }
+
+        return rc;
+    }
+
+} //end extern C
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/opt_memmap.H b/src/usr/hwpf/hwp/mc_config/mss_eff_config/opt_memmap.H
new file mode 100644
index 000000000..1b0522e76
--- /dev/null
+++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/opt_memmap.H
@@ -0,0 +1,59 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/mc_config/mss_eff_config/opt_memmap.H $      */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2012                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2012
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! TITLE       : opt_memmap.H
+// *! DESCRIPTION : see additional comments below
+// *! OWNER NAME  : Girisankar Paulraj     Email: gpaulraj@in.ibm.com
+// *! BACKUP NAME : Mark Bellows      Email: bellows@us.ibm.com
+// *! ADDITIONAL COMMENTS :
+//
+// Header file for opt_memmap
+//
+//------------------------------------------------------------------------------
+// Don't forget to create CVS comments when you check in your changes!
+//------------------------------------------------------------------------------
+// CHANGE HISTORY:
+//------------------------------------------------------------------------------
+// Version:|  Author: |  Date:  | Comment:
+//---------|----------|---------|-----------------------------------------------
+//  1.1    | vanlee   | 12/01/12| Initial version
+
+#ifndef MSS_OPT_MEMMAP_H_
+#define MSS_OPT_MEMMAP_H_
+
+#include <fapi.H>
+
+typedef fapi::ReturnCode (*opt_memmap_FP_t)(std::vector<fapi::Target> & i_procs );
+
+extern "C"
+{
+
+fapi::ReturnCode opt_memmap(std::vector<fapi::Target> & i_procs);
+
+} // extern "C"
+
+#endif // MSS_OPT_MEMMAP_H_
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index 6b52c81cf..bded81ecf 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -4151,10 +4151,10 @@
     <description>Base Address for all mainstore behind this processor</description>
     <simpleType>
         <uint64_t>
-            <default>0xFFFFFFFFFFFFFFFF</default>
+            <default>0</default>
         </uint64_t>
     </simpleType>
-    <persistency>non-volatile</persistency>
+    <persistency>volatile-zeroed</persistency>
     <readable/>
     <writeable/>
     <hwpfToHbAttrMap>
@@ -4168,10 +4168,10 @@
     <description>Base Address for all mirrored mainstore behind this processor</description>
     <simpleType>
         <uint64_t>
-            <default>0xFFFFFFFFFFFFFFFF</default>
+            <default>0</default>
         </uint64_t>
     </simpleType>
-    <persistency>non-volatile</persistency>
+    <persistency>volatile-zeroed</persistency>
     <readable/>
     <writeable/>
     <hwpfToHbAttrMap>
diff --git a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml
index 2695b6ddc..d0c97d9ea 100644
--- a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml
+++ b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml
@@ -244,12 +244,6 @@
             0x0003D02000000000,0x0003D03000000000
         </default>
     </attribute>
-    <attribute><id>MEM_BASE</id>
-        <default>0x0000000000000000</default>
-    </attribute>
-    <attribute><id>MIRROR_BASE</id>
-        <default>0x0002000000000000</default>
-    </attribute>
     <attribute><id>RNG_BASE_ADDR</id>
         <default>0x0003FFFF40000000</default>
     </attribute>
@@ -957,12 +951,6 @@
             0x0003D06000000000,0x0003D07000000000
         </default>
     </attribute>
-    <attribute><id>MEM_BASE</id>
-        <default>0x0000020000000000</default>
-    </attribute>
-    <attribute><id>MIRROR_BASE</id>
-        <default>0x0002020000000000</default>
-    </attribute>
     <attribute><id>RNG_BASE_ADDR</id>
         <default>0x0003FFFF40001000</default>
     </attribute>
@@ -1671,12 +1659,6 @@
             0x0003D0A000000000,0x0003D0B000000000
         </default>
     </attribute>
-    <attribute><id>MEM_BASE</id>
-        <default>0x0000040000000000</default>
-    </attribute>
-    <attribute><id>MIRROR_BASE</id>
-        <default>0x0002040000000000</default>
-    </attribute>
     <attribute><id>RNG_BASE_ADDR</id>
         <default>0x0003FFFF40002000</default>
     </attribute>
@@ -2386,12 +2368,6 @@
             0x0003D0E000000000,0x0003D0F000000000
         </default>
     </attribute>
-    <attribute><id>MEM_BASE</id>
-        <default>0x0000060000000000</default>
-    </attribute>
-    <attribute><id>MIRROR_BASE</id>
-        <default>0x0002060000000000</default>
-    </attribute>
     <attribute><id>RNG_BASE_ADDR</id>
         <default>0x0003FFFF40003000</default>
     </attribute>
diff --git a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml
index 284c2c1f2..f387a3d5f 100644
--- a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml
+++ b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml
@@ -220,12 +220,6 @@
             0x0003D02000000000,0x0003D03000000000
         </default>
     </attribute>
-    <attribute><id>MEM_BASE</id>
-        <default>0x0000000000000000</default>
-    </attribute>
-    <attribute><id>MIRROR_BASE</id>
-        <default>0x0002000000000000</default>
-    </attribute>
     <attribute><id>RNG_BASE_ADDR</id>
         <default>0x0003FFFF40000000</default>
     </attribute>
@@ -1284,12 +1278,6 @@
             0x0003D06000000000,0x0003D07000000000
         </default>
     </attribute>
-    <attribute><id>MEM_BASE</id>
-        <default>0x0000020000000000</default>
-    </attribute>
-    <attribute><id>MIRROR_BASE</id>
-        <default>0x0002020000000000</default>
-    </attribute>
     <attribute><id>RNG_BASE_ADDR</id>
         <default>0x0003FFFF40001000</default>
     </attribute>
@@ -2348,12 +2336,6 @@
             0x0003D0A000000000,0x0003D0B000000000
         </default>
     </attribute>
-    <attribute><id>MEM_BASE</id>
-        <default>0x0000040000000000</default>
-    </attribute>
-    <attribute><id>MIRROR_BASE</id>
-        <default>0x0002040000000000</default>
-    </attribute>
     <attribute><id>RNG_BASE_ADDR</id>
         <default>0x0003FFFF40002000</default>
     </attribute>
@@ -3412,12 +3394,6 @@
             0x0003D0E000000000,0x0003D0F000000000
         </default>
     </attribute>
-    <attribute><id>MEM_BASE</id>
-        <default>0x0000060000000000</default>
-    </attribute>
-    <attribute><id>MIRROR_BASE</id>
-        <default>0x0002060000000000</default>
-    </attribute>
     <attribute><id>RNG_BASE_ADDR</id>
         <default>0x0003FFFF40003000</default>
     </attribute>
@@ -4474,12 +4450,6 @@
             0x0003D12000000000,0x0003D13000000000
         </default>
     </attribute>
-    <attribute><id>MEM_BASE</id>
-        <default>0x0000080000000000</default>
-    </attribute>
-    <attribute><id>MIRROR_BASE</id>
-        <default>0x0002080000000000</default>
-    </attribute>
     <attribute><id>RNG_BASE_ADDR</id>
         <default>0x0003FFFF40004000</default>
     </attribute>
@@ -5538,12 +5508,6 @@
             0x0003D16000000000,0x0003D17000000000
         </default>
     </attribute>
-    <attribute><id>MEM_BASE</id>
-        <default>0x00000A0000000000</default>
-    </attribute>
-    <attribute><id>MIRROR_BASE</id>
-        <default>0x00020A0000000000</default>
-    </attribute>
     <attribute><id>RNG_BASE_ADDR</id>
         <default>0x0003FFFF40005000</default>
     </attribute>
@@ -6600,12 +6564,6 @@
             0x0003D1A000000000,0x0003D1B000000000
         </default>
     </attribute>
-    <attribute><id>MEM_BASE</id>
-        <default>0x00000C0000000000</default>
-    </attribute>
-    <attribute><id>MIRROR_BASE</id>
-        <default>0x00020C0000000000</default>
-    </attribute>
     <attribute><id>RNG_BASE_ADDR</id>
         <default>0x0003FFFF40006000</default>
     </attribute>
@@ -7663,12 +7621,6 @@
             0x0003D1E000000000,0x0003D1F000000000
         </default>
     </attribute>
-    <attribute><id>MEM_BASE</id>
-        <default>0x00000E0000000000</default>
-    </attribute>
-    <attribute><id>MIRROR_BASE</id>
-        <default>0x00020E0000000000</default>
-    </attribute>
     <attribute><id>RNG_BASE_ADDR</id>
         <default>0x0003FFFF40007000</default>
     </attribute>
@@ -14939,12 +14891,6 @@
             0x0003D02000000000,0x0003D03000000000
         </default>
     </attribute>
-    <attribute><id>MEM_BASE</id>
-        <default>0x0000000000000000</default>
-    </attribute>
-    <attribute><id>MIRROR_BASE</id>
-        <default>0x0002000000000000</default>
-    </attribute>
     <attribute><id>RNG_BASE_ADDR</id>
         <default>0x0003FFFF40000000</default>
     </attribute>
diff --git a/src/usr/targeting/common/xmltohb/vbu.system.xml b/src/usr/targeting/common/xmltohb/vbu.system.xml
index 6c5623166..31635a758 100644
--- a/src/usr/targeting/common/xmltohb/vbu.system.xml
+++ b/src/usr/targeting/common/xmltohb/vbu.system.xml
@@ -221,12 +221,6 @@
        0x0003D02000000000,0x0003D03000000000
     </default>
     </attribute>
-    <attribute><id>MEM_BASE</id>
-        <default>0x0000000000000000</default>
-    </attribute>
-    <attribute><id>MIRROR_BASE</id>
-        <default>0x0002000000000000</default>
-    </attribute>
     <attribute><id>RNG_BASE_ADDR</id>
         <default>0x0003FFFF40000000</default>
     </attribute>
diff --git a/src/usr/targeting/xmltohb/genHwsvMrwXml.pl b/src/usr/targeting/xmltohb/genHwsvMrwXml.pl
index 0f93ae081..3307ef442 100755
--- a/src/usr/targeting/xmltohb/genHwsvMrwXml.pl
+++ b/src/usr/targeting/xmltohb/genHwsvMrwXml.pl
@@ -1718,17 +1718,6 @@ sub generate_proc
     printf( "        </default>\n" );
     printf( "    </attribute>\n" );
 
-    # Starts at 0, 2TB per proc
-    printf( "    <attribute><id>MEM_BASE</id>\n" );
-    printf( "        <default>0x%016X</default>\n", 0x20000000000*$proc );
-    printf( "    </attribute>\n" );
-
-    # Starts at 512TB, 2TB per proc
-    printf( "    <attribute><id>MIRROR_BASE</id>\n" );
-    printf( "        <default>0x%016X</default>\n",
-       0x0002000000000000 + 0x20000000000*$proc );
-    printf( "    </attribute>\n" );
-
     # Starts at 1024TB - 3GB
     printf( "    <attribute><id>RNG_BASE_ADDR</id>\n" );
     printf( "        <default>0x%016X</default>\n",