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| author | Thi Tran <thi@us.ibm.com> | 2012-12-19 05:40:56 -0600 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2012-12-19 10:07:58 -0600 |
| commit | 91b297346d4a27091fbcea295bae1defb0618b20 (patch) | |
| tree | 3f09b76274e27f91bea555c3d1245c6e435b8476 /src/usr | |
| parent | 048e9892a4df22d2e60d1d4612a7a2490f1d9614 (diff) | |
| download | blackbird-hostboot-91b297346d4a27091fbcea295bae1defb0618b20.tar.gz blackbird-hostboot-91b297346d4a27091fbcea295bae1defb0618b20.zip | |
PON - HW procedures update - Set #3
RTC: 59154
Change-Id: I93c99ce08f823c3c2be32c50ec524a68c23cc8dd
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2750
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr')
| -rw-r--r-- | src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config.C | 32 |
1 files changed, 23 insertions, 9 deletions
diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config.C b/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config.C index be10fc7f1..f913aac70 100644 --- a/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config.C +++ b/src/usr/hwpf/hwp/dram_initialization/proc_pcie_config/proc_pcie_config.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: proc_pcie_config.C,v 1.1 2012/11/05 21:52:34 jmcgill Exp $ +// $Id: proc_pcie_config.C,v 1.3 2012/12/11 23:59:02 jmcgill Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_pcie_config.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2012 @@ -104,7 +104,6 @@ fapi::ReturnCode proc_pcie_config_pbcq_fir( fapi::ReturnCode rc; ecmdDataBufferBase zero_data(64); - ecmdDataBufferBase ones_data(64); // mark function entry FAPI_INF("proc_pcie_config_pbcq_fir: Start"); @@ -157,6 +156,7 @@ fapi::ReturnCode proc_pcie_config( const fapi::Target & i_target) { fapi::ReturnCode rc; + uint8_t pcie_enabled; // mark HWP entry FAPI_INF("proc_pcie_config: Start"); @@ -171,19 +171,33 @@ fapi::ReturnCode proc_pcie_config( break; } - // initialize PBCQ/AIB, configure PBCQ FIRs - rc = proc_pcie_config_pbcq(i_target); + // query PCIE partial good attribute + rc = FAPI_ATTR_GET(ATTR_PROC_PCIE_ENABLE, + &i_target, + pcie_enabled); if (!rc.ok()) { - FAPI_ERR("proc_pcie_config: Error from proc_pcie_config_pbcq"); + FAPI_ERR("proc_pcie_config: Error querying ATTR_PROC_PCIE_ENABLE"); break; } - rc = proc_pcie_config_pbcq_fir(i_target); - if (!rc.ok()) + // initialize PBCQ/AIB, configure PBCQ FIRs (only if partial good + // atttribute is set) + if (pcie_enabled == fapi::ENUM_ATTR_PROC_PCIE_ENABLE_ENABLE) { - FAPI_ERR("proc_pcie_config: Error from proc_pcie_config_pbcq_fir"); - break; + rc = proc_pcie_config_pbcq(i_target); + if (!rc.ok()) + { + FAPI_ERR("proc_pcie_config: Error from proc_pcie_config_pbcq"); + break; + } + + rc = proc_pcie_config_pbcq_fir(i_target); + if (!rc.ok()) + { + FAPI_ERR("proc_pcie_config: Error from proc_pcie_config_pbcq_fir"); + break; + } } } while(0); |
