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author | Luis Fernandez <Luis.Fernandez@ibm.com> | 2020-01-09 13:32:43 -0600 |
---|---|---|
committer | William G Hoffa <wghoffa@us.ibm.com> | 2020-01-22 09:46:55 -0600 |
commit | 1f76bfa23026029f80774b2e138e60b9f8cb448e (patch) | |
tree | 3f57dce46f441a78e279716eb56a994bbe421f55 /src/usr | |
parent | f32aff51f83dcbcaa3857100c6e4e36ee7a8b84a (diff) | |
download | blackbird-hostboot-1f76bfa23026029f80774b2e138e60b9f8cb448e.tar.gz blackbird-hostboot-1f76bfa23026029f80774b2e138e60b9f8cb448e.zip |
Add call to p9_throttle_sync inside cumulus_call_mss_scominit
p9_throttle_sync was not being called directly after cumulus_call_mss_scominit,
which it should have to sync any updated N/M throttle values.
A similar throttle sync function was being used for axone_call_mss_scominit so
it was reused for cumulus_call_mss_scominit.
Change-Id: I762ea245b566982a821e4346b33c066f0585a2a9
CQ:SW482366
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89467
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/usr')
-rw-r--r-- | src/usr/isteps/istep13/call_mss_scominit.C | 60 |
1 files changed, 42 insertions, 18 deletions
diff --git a/src/usr/isteps/istep13/call_mss_scominit.C b/src/usr/isteps/istep13/call_mss_scominit.C index 3cb4b1223..6c623f1d2 100644 --- a/src/usr/isteps/istep13/call_mss_scominit.C +++ b/src/usr/isteps/istep13/call_mss_scominit.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2019 */ +/* Contributors Listed Below - COPYRIGHT 2015,2020 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -48,6 +48,7 @@ #include <p9a_throttle_sync.H> #else #include <p9c_mss_scominit.H> + #include <p9_throttle_sync.H> #endif using namespace ERRORLOG; @@ -60,6 +61,7 @@ namespace ISTEP_13 void nimbus_call_mss_scominit(IStepError & io_istepError); void cumulus_call_mss_scominit(IStepError & io_istepError); void axone_call_mss_scominit(IStepError & io_istepError); +void run_proc_throttle_sync(IStepError & io_istepError); void* call_mss_scominit (void *io_pArgs) { @@ -143,6 +145,7 @@ void nimbus_call_mss_scominit(IStepError & io_istepError) void cumulus_call_mss_scominit(IStepError & io_istepError) { + errlHndl_t l_err = nullptr; // Get all MBA targets @@ -187,6 +190,10 @@ void cumulus_call_mss_scominit(IStepError & io_istepError) TARGETING::get_huid(l_membuf_target)); } } + + // Setup the memory throttles for worstcase mode + run_proc_throttle_sync(io_istepError); + } #else void nimbus_call_mss_scominit(IStepError & io_istepError) @@ -208,6 +215,7 @@ void cumulus_call_mss_scominit(IStepError & io_istepError) #ifdef CONFIG_AXONE void axone_call_mss_scominit(IStepError & io_istepError) { + errlHndl_t l_err = nullptr; // Get all OCMB targets @@ -266,8 +274,24 @@ void axone_call_mss_scominit(IStepError & io_istepError) } // Need to setup the memory throttles for worstcase mode until - // we get the thermals really setup later + // we get the thermals really setup later + run_proc_throttle_sync(io_istepError); + +} +#else +void axone_call_mss_scominit(IStepError & io_istepError) +{ + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Error: Trying to call 'exp_scominit' but Axone code is not compiled in"); + assert(0, "Calling wrong Model's HWPs"); +} +#endif +void run_proc_throttle_sync(IStepError & io_istepError) +{ + errlHndl_t l_errl = nullptr; + + // Run proc throttle sync // Get all functional proc chip targets // Use targeting code to get a list of all processors TARGETING::TargetHandleList l_procChips; @@ -278,28 +302,36 @@ void axone_call_mss_scominit(IStepError & io_istepError) //Convert the TARGETING::Target into a fapi2::Target by passing //l_procChip into the fapi2::Target constructor fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> - l_fapi2CpuTarget((l_procChip)); + l_fapi2CpuTarget((l_procChip)); + // Call p9_throttle_sync +#ifndef CONFIG_AXONE + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Running p9_throttle_sync HWP on target HUID %.8X", + TARGETING::get_huid(l_procChip) ); + FAPI_INVOKE_HWP( l_errl, p9_throttle_sync, l_fapi2CpuTarget ); +#else TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "Running p9a_throttle_sync HWP on target HUID %.8X", TARGETING::get_huid(l_procChip) ); - FAPI_INVOKE_HWP( l_err, p9a_throttle_sync, l_fapi2CpuTarget ); + FAPI_INVOKE_HWP( l_errl, p9a_throttle_sync, l_fapi2CpuTarget ); +#endif - if (l_err) + if (l_errl) { TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "ERROR 0x%.8X: p9_throttle_sync HWP returns error", - l_err->reasonCode()); + l_errl->reasonCode()); // Capture the target data in the elog - ErrlUserDetailsTarget(l_procChip).addToLog(l_err); + ErrlUserDetailsTarget(l_procChip).addToLog(l_errl); // Create IStep error log and cross reference // to error that occurred - io_istepError.addErrorDetails( l_err ); + io_istepError.addErrorDetails( l_errl ); // Commit Error - errlCommit( l_err, HWPF_COMP_ID ); + errlCommit( l_errl, HWPF_COMP_ID ); break; } @@ -310,14 +342,6 @@ void axone_call_mss_scominit(IStepError & io_istepError) TARGETING::get_huid(l_procChip) ); } } - } -#else -void axone_call_mss_scominit(IStepError & io_istepError) -{ - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "Error: Trying to call 'exp_scominit' but Axone code is not compiled in"); - assert(0, "Calling wrong Model's HWPs"); -} -#endif + }; |