diff options
author | Corey Swenson <cswenson@us.ibm.com> | 2015-01-27 09:05:37 -0600 |
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committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2015-02-18 15:12:13 -0600 |
commit | 417c6e0a4bb7c8f9d9721b73ddcae696007be15e (patch) | |
tree | 42778d629a19bf85f740cbd649ca2d27d8a20aa9 /src/usr/vpd/spd.C | |
parent | 79ea7abf6d31c146c680d39b9f3ae007e434a573 (diff) | |
download | blackbird-hostboot-417c6e0a4bb7c8f9d9721b73ddcae696007be15e.tar.gz blackbird-hostboot-417c6e0a4bb7c8f9d9721b73ddcae696007be15e.zip |
HBRT Runtime VPD Updates
Enables writes to VPD and handles disabling
PNOR cache in manufacturing mode
Change-Id: I03d4246ceb91520939f8b04f3b3d2fc31c116079
RTC: 114911
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15462
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/vpd/spd.C')
-rw-r--r-- | src/usr/vpd/spd.C | 178 |
1 files changed, 109 insertions, 69 deletions
diff --git a/src/usr/vpd/spd.C b/src/usr/vpd/spd.C index b4b6a18a9..54837a581 100644 --- a/src/usr/vpd/spd.C +++ b/src/usr/vpd/spd.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2013,2014 */ +/* Contributors Listed Below - COPYRIGHT 2013,2015 */ /* [+] Google Inc. */ /* [+] International Business Machines Corp. */ /* */ @@ -87,6 +87,28 @@ uint64_t g_spdPnorAddr = 0x0; // substitute a binary file (dimmspd.dat) into PNOR. const bool g_usePNOR = true; +// Define where to read/write SPD data +#ifdef CONFIG_DJVPD_READ_FROM_PNOR + static bool g_spdReadPNOR = true; +#else + static bool g_spdReadPNOR = false; +#endif +#ifdef CONFIG_DJVPD_READ_FROM_HW + static bool g_spdReadHW = true; +#else + static bool g_spdReadHW = false; +#endif +#ifdef CONFIG_DJVPD_WRITE_TO_PNOR + static bool g_spdWritePNOR = true; +#else + static bool g_spdWritePNOR = false; +#endif +#ifdef CONFIG_DJVPD_WRITE_TO_HW + static bool g_spdWriteHW = true; +#else + static bool g_spdWriteHW = false; +#endif + /** * @brief Compare two values and return whether e2 is greater than @@ -418,21 +440,12 @@ errlHndl_t spdFetchData ( uint64_t i_byteAddr, break; } - bool readFromPnorEnabled = false; -#ifdef CONFIG_DJVPD_READ_FROM_PNOR - readFromPnorEnabled = true; -#endif - bool readFromHwEnabled = false; -#ifdef CONFIG_DJVPD_READ_FROM_HW - readFromHwEnabled = true; -#endif - // Determine the SPD source (PNOR/SEEPROM) VPD::vpdCmdTarget vpdSource = VPD::AUTOSELECT; bool configError = false; configError = VPD::resolveVpdSource( i_target, - readFromPnorEnabled, - readFromHwEnabled, + g_spdReadPNOR, + g_spdReadHW, i_location, vpdSource ); @@ -488,8 +501,8 @@ errlHndl_t spdFetchData ( uint64_t i_byteAddr, * @moduleid VPD::VPD_SPD_FETCH_DATA * @userdata1[0:31] Target HUID * @userdata1[32:63] Requested VPD Source Location - * @userdata2[0:31] CONFIG_DJVPD_READ_FROM_PNOR - * @userdata2[32:63] CONFIG_DJVPD_READ_FROM_HW + * @userdata2[0:31] SPD read PNOR flag + * @userdata2[32:63] SPD read HW flag * @devdesc Unable to resolve the VPD * source (PNOR or SEEPROM) */ @@ -499,8 +512,8 @@ errlHndl_t spdFetchData ( uint64_t i_byteAddr, VPD::VPD_READ_SOURCE_UNRESOLVED, TWO_UINT32_TO_UINT64( TARGETING::get_huid(i_target), i_location ), - TWO_UINT32_TO_UINT64( readFromHwEnabled, - readFromHwEnabled ), + TWO_UINT32_TO_UINT64( g_spdReadPNOR, + g_spdReadHW ), true /*Add HB SW Callout*/ ); err->collectTrace( "VPD", 256 ); break; @@ -531,44 +544,46 @@ errlHndl_t spdWriteData ( uint64_t i_offset, do { -#ifdef CONFIG_DJVPD_WRITE_TO_HW - if( i_location != VPD::PNOR ) + if( g_spdWriteHW ) { - // Write directly to target's EEPROM. - err = DeviceFW::deviceOp( DeviceFW::WRITE, - i_target, - i_data, - i_numBytes, - DEVICE_EEPROM_ADDRESS( - EEPROM::VPD_PRIMARY, - i_offset ) ); - if( err ) + if( i_location != VPD::PNOR ) { - break; + // Write directly to target's EEPROM. + err = DeviceFW::deviceOp( DeviceFW::WRITE, + i_target, + i_data, + i_numBytes, + DEVICE_EEPROM_ADDRESS( + EEPROM::VPD_PRIMARY, + i_offset ) ); + if( err ) + { + break; + } } } -#endif -#ifdef CONFIG_DJVPD_WRITE_TO_PNOR - if( i_location != VPD::SEEPROM ) + if( g_spdWritePNOR ) { - // Setup info needed to write from PNOR - VPD::pnorInformation info; - info.segmentSize = DIMM_SPD_SECTION_SIZE; - info.maxSegments = DIMM_SPD_MAX_SECTIONS; - info.pnorSection = PNOR::DIMM_JEDEC_VPD; - err = VPD::writePNOR( i_offset, - i_numBytes, - i_data, - i_target, - info, - g_spdPnorAddr, - &g_spdMutex ); - if( err ) + if( i_location != VPD::SEEPROM ) { - break; + // Setup info needed to write to PNOR + VPD::pnorInformation info; + info.segmentSize = DIMM_SPD_SECTION_SIZE; + info.maxSegments = DIMM_SPD_MAX_SECTIONS; + info.pnorSection = PNOR::DIMM_JEDEC_VPD; + err = VPD::writePNOR( i_offset, + i_numBytes, + i_data, + i_target, + info, + g_spdPnorAddr, + &g_spdMutex ); + if( err ) + { + break; + } } } -#endif } while( 0 ); TRACSSCOMP( g_trac_spd, @@ -885,23 +900,24 @@ errlHndl_t spdWriteValue ( VPD::vpdKeyword i_keyword, break; } -#ifndef CONFIG_DJVPD_WRITE_TO_HW - // Send mbox message with new data to Fsp - VPD::VpdWriteMsg_t msgdata; - msgdata.rec_num = i_target->getAttr<TARGETING::ATTR_VPD_REC_NUM>(); - //XXXX=offset relative to whole section - memcpy( msgdata.record, "XXXX", sizeof(msgdata.record) ); - msgdata.offset = entry->offset; - err = VPD::sendMboxWriteMsg( io_buflen, - io_buffer, - i_target, - VPD::VPD_WRITE_DIMM, - msgdata ); - if( err ) + if( !g_spdWriteHW ) { - break; + // Send mbox message with new data to Fsp + VPD::VpdWriteMsg_t msgdata; + msgdata.rec_num = i_target->getAttr<TARGETING::ATTR_VPD_REC_NUM>(); + //XXXX=offset relative to whole section + memcpy( msgdata.record, "XXXX", sizeof(msgdata.record) ); + msgdata.offset = entry->offset; + err = VPD::sendMboxWriteMsg( io_buflen, + io_buffer, + i_target, + VPD::VPD_WRITE_DIMM, + msgdata ); + if( err ) + { + break; + } } -#endif } while( 0 ); TRACSSCOMP( g_trac_spd, @@ -917,11 +933,14 @@ bool spdPresent ( TARGETING::Target * i_target ) { TRACSSCOMP( g_trac_spd, ENTER_MRK"spdPresent()" ); -#if(defined( CONFIG_DJVPD_READ_FROM_HW ) && !defined (__HOSTBOOT_RUNTIME ) ) - return EEPROM::eepromPresence( i_target ); +#ifndef __HOSTBOOT_RUNTIME + if( g_spdReadHW ) + { + return EEPROM::eepromPresence( i_target ); + } +#endif -#else errlHndl_t err = NULL; bool pres = false; @@ -953,7 +972,6 @@ bool spdPresent ( TARGETING::Target * i_target ) } while( 0 ); return pres; -#endif } @@ -2138,13 +2156,13 @@ errlHndl_t loadPnor ( TARGETING::Target * i_target ) // ------------------------------------------------------------------ -// /*invalidatePnorCache*/ +// invalidatePnor // ------------------------------------------------------------------ errlHndl_t invalidatePnor ( TARGETING::Target * i_target ) { errlHndl_t err = NULL; - TRACSSCOMP( g_trac_spd, ENTER_MRK"invalidatePnorCache()" ); + TRACSSCOMP( g_trac_spd, ENTER_MRK"invalidatePnor()" ); // Write SPD section to all Fs uint8_t writeData[DIMM_SPD_SECTION_SIZE]; @@ -2156,14 +2174,36 @@ errlHndl_t invalidatePnor ( TARGETING::Target * i_target ) VPD::PNOR ); if( err ) { - TRACFCOMP( g_trac_spd, ERR_MRK"invalidatePnorCache: " + TRACFCOMP( g_trac_spd, ERR_MRK"invalidatePnor: " "Error invalidating the SPD in PNOR" ); } - TRACSSCOMP( g_trac_spd, EXIT_MRK"invalidatePnorCache()" ); + TRACSSCOMP( g_trac_spd, EXIT_MRK"invalidatePnor()" ); return err; } +// ------------------------------------------------------------------ +// setConfigFlagsHW +// ------------------------------------------------------------------ +void setConfigFlagsHW ( ) +{ + // Only change configs if in PNOR caching mode + // In PNOR only mode we would lose all VPD data + if( g_spdReadPNOR && + g_spdReadHW ) + { + g_spdReadPNOR = false; + g_spdReadHW = true; + } + if( g_spdWritePNOR && + g_spdWriteHW ) + { + g_spdWritePNOR = false; + g_spdWriteHW = true; + } +} + + }; // end namespace SPD |