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| author | Matt Derksen <mderkse1@us.ibm.com> | 2019-05-01 12:30:54 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-06-24 10:29:27 -0500 |
| commit | 2c86bbc37ee8d0a2c0da169ace605dde319c898a (patch) | |
| tree | 10bb64bd91068566c077436a2785ed83f84c5288 /src/usr/mmio/test | |
| parent | 1ac1e9584462a41e204ffaae13f086b0a22c6cf8 (diff) | |
| download | blackbird-hostboot-2c86bbc37ee8d0a2c0da169ace605dde319c898a.tar.gz blackbird-hostboot-2c86bbc37ee8d0a2c0da169ace605dde319c898a.zip | |
Run exp tests in Axone and make generic Load utility
Removed CONFIG_AXONE_BRING_UP from expscomtest.H
Added common load utility for loading/unloading needed
modules for testcases. Added a mutex to avoid inband
command/response contention between testcases.
Change-Id: Ia96991983be18fab840b59b8dc7dd1383ecc4abc
RTC:201738
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76818
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Glenn Miles <milesg@ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/mmio/test')
| -rw-r--r-- | src/usr/mmio/test/makefile | 1 | ||||
| -rw-r--r-- | src/usr/mmio/test/mmiotest.H | 310 |
2 files changed, 166 insertions, 145 deletions
diff --git a/src/usr/mmio/test/makefile b/src/usr/mmio/test/makefile index 68c11b604..3a9af5d71 100644 --- a/src/usr/mmio/test/makefile +++ b/src/usr/mmio/test/makefile @@ -28,6 +28,7 @@ MODULE = testmmio EXTRAINCDIR += ${ROOTPATH}/src/import/chips/ocmb/explorer/common/include/ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/common/ +EXTRAINCDIR += ${ROOTPATH}/src/usr/expaccess/ TESTS = *.H diff --git a/src/usr/mmio/test/mmiotest.H b/src/usr/mmio/test/mmiotest.H index 30199e1a1..9987b50ee 100644 --- a/src/usr/mmio/test/mmiotest.H +++ b/src/usr/mmio/test/mmiotest.H @@ -33,6 +33,7 @@ #include <exp_oc_regs.H> #include <sys/mmio.h> #include <utils/chipids.H> +#include <test/exptest_utils.H> #define SCOM2MMIO_ADDR(_ADDR) (EXPLR_IB_MMIO_OFFSET | (_ADDR << 3)) #define CNFG2MMIO_ADDR(_ADDR) (EXPLR_IB_CONFIG_OFFSET | _ADDR) @@ -56,166 +57,185 @@ class MmioTest : public CxxTest::TestSuite */ void testExplrMMIO(void) { - TS_INFO("testExplrMMIO> Start" ); + TS_INFO("testExplrMMIO> Start" ); errlHndl_t l_err = nullptr; uint32_t regdata4 = 0; size_t op_size = 0; uint64_t l_buffer64; - // Get OCMB target, return if there is no OCMB - TARGETING::TargetHandle_t explr_target = nullptr; - TARGETING::TargetHandleList ocmb_target_list; - TARGETING::getAllChips(ocmb_target_list, TARGETING::TYPE_OCMB_CHIP); - if (ocmb_target_list.size() == 0) + // Needed since the device operations could be using inband communication in error path + TARGETING::HB_MUTEX_SERIALIZE_TEST_LOCK_ATTR l_mutex = exptest::getTestMutex(); + if (l_mutex == nullptr) { - TS_INFO("testExplrMMIO> No OCMB targets found. Exiting."); + TS_FAIL("testExplrMMIO: unable to get test mutex"); return; } - explr_target = ocmb_target_list[0]; - if(explr_target->getAttr<TARGETING::ATTR_CHIP_ID>() != - POWER_CHIPID::EXPLORER_16) - { - TS_INFO("testExplrMMIO> No explorer targets found. Exiting."); - return; - } - - // valid read from config space register - op_size = sizeof(regdata4); - l_err = DeviceFW::deviceRead( - explr_target, - ®data4, - op_size, - DEVICE_MMIO_ADDRESS( - CNFG2MMIO_ADDR(EXPLR_OC_O0MBIT_O0DID_LSB), - op_size)); - if(l_err != nullptr) - { - errlCommit(l_err, CXXTEST_COMP_ID); - TS_FAIL("testExplrMMIO> Error for config read, RC=0x%04X", - ERRL_GETRC_SAFE(l_err)); - } - - // valid write to config space register - op_size = sizeof(regdata4); - l_err = DeviceFW::deviceWrite( - explr_target, - ®data4, - op_size, - DEVICE_MMIO_ADDRESS( - CNFG2MMIO_ADDR(EXPLR_OC_O0CCD_LSB), - op_size)); - if(l_err != nullptr) - { - errlCommit(l_err, CXXTEST_COMP_ID); - TS_FAIL("testExplrMMIO> Error for config write, RC=0x%04X", - ERRL_GETRC_SAFE(l_err)); - } - - // 1st valid write to SCOM register (also sets up - // tests for forcing HW read/write failures) - // Set the PCB error bits (8:10) to binary 100, which means - // 'invalid address' - // NOTE: must byteswap to little endian before writing - uint64_t GIF2PCB_INVALID_SCOM_ADDR_ERROR = 0x0080000000000000ull; - l_buffer64 = BYTESWAP64(GIF2PCB_INVALID_SCOM_ADDR_ERROR); - op_size = sizeof(l_buffer64); - l_err = DeviceFW::deviceWrite( - explr_target, - &l_buffer64, - op_size, - DEVICE_MMIO_ADDRESS( - SCOM2MMIO_ADDR( - EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG), - op_size)); - if(l_err != nullptr) - { - errlCommit(l_err, CXXTEST_COMP_ID); - TS_FAIL("testExplrMMIO> Error for gif2pcb write, RC=0x%04X", - ERRL_GETRC_SAFE(l_err)); - return; - } - - // 2nd valid write to SCOM register (also sets up - // tests for forcing HW read/write failures) - // This register should contain a copy of the GIF2PCB error register - // starting at bit 32 - // NOTE: must byteswap to little endian before writing data - uint64_t PIB2GIF_INVALID_SCOM_ADDR_ERROR = - 0x0000000000000000ull | - ((GIF2PCB_INVALID_SCOM_ADDR_ERROR & - 0xffffc00000000000ull) >> 32); - l_buffer64 = BYTESWAP64(PIB2GIF_INVALID_SCOM_ADDR_ERROR); - op_size = sizeof(l_buffer64); - l_err = DeviceFW::deviceWrite( - explr_target, - &l_buffer64, - op_size, - DEVICE_MMIO_ADDRESS( - SCOM2MMIO_ADDR( - EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG), - op_size)); - if(l_err != nullptr) - { - errlCommit(l_err, CXXTEST_COMP_ID); - TS_FAIL("testExplrMMIO> Error for pib2gif write, RC=0x%04X", - ERRL_GETRC_SAFE(l_err)); - return; - } + // >> atomic section + mutex_lock(l_mutex); + + do { + + // Get OCMB target, return if there is no OCMB + TARGETING::TargetHandle_t explr_target = nullptr; + TARGETING::TargetHandleList ocmb_target_list; + TARGETING::getAllChips(ocmb_target_list, TARGETING::TYPE_OCMB_CHIP); + if (ocmb_target_list.size() == 0) + { + TS_INFO("testExplrMMIO> No OCMB targets found. Exiting."); + break; + } + explr_target = ocmb_target_list[0]; + if(explr_target->getAttr<TARGETING::ATTR_CHIP_ID>() != + POWER_CHIPID::EXPLORER_16) + { + TS_INFO("testExplrMMIO> No explorer targets found. Exiting."); + break; + } + + // valid read from config space register + op_size = sizeof(regdata4); + l_err = DeviceFW::deviceRead( + explr_target, + ®data4, + op_size, + DEVICE_MMIO_ADDRESS( + CNFG2MMIO_ADDR(EXPLR_OC_O0MBIT_O0DID_LSB), + op_size)); + + if(l_err != nullptr) + { + errlCommit(l_err, CXXTEST_COMP_ID); + TS_FAIL("testExplrMMIO> Error for config read, RC=0x%04X", + ERRL_GETRC_SAFE(l_err)); + } + + // valid write to config space register + op_size = sizeof(regdata4); + l_err = DeviceFW::deviceWrite( + explr_target, + ®data4, + op_size, + DEVICE_MMIO_ADDRESS( + CNFG2MMIO_ADDR(EXPLR_OC_O0CCD_LSB), + op_size)); + if(l_err != nullptr) + { + errlCommit(l_err, CXXTEST_COMP_ID); + TS_FAIL("testExplrMMIO> Error for config write, RC=0x%04X", + ERRL_GETRC_SAFE(l_err)); + } + + // 1st valid write to SCOM register (also sets up + // tests for forcing HW read/write failures) + // Set the PCB error bits (8:10) to binary 100, which means + // 'invalid address' + // NOTE: must byteswap to little endian before writing + uint64_t GIF2PCB_INVALID_SCOM_ADDR_ERROR = 0x0080000000000000ull; + l_buffer64 = BYTESWAP64(GIF2PCB_INVALID_SCOM_ADDR_ERROR); + op_size = sizeof(l_buffer64); + l_err = DeviceFW::deviceWrite( + explr_target, + &l_buffer64, + op_size, + DEVICE_MMIO_ADDRESS( + SCOM2MMIO_ADDR( + EXPLR_TP_MB_UNIT_TOP_GIF2PCB_ERROR_REG), + op_size)); + + if(l_err != nullptr) + { + errlCommit(l_err, CXXTEST_COMP_ID); + TS_FAIL("testExplrMMIO> Error for gif2pcb write, RC=0x%04X", + ERRL_GETRC_SAFE(l_err)); + break; + } + + // 2nd valid write to SCOM register (also sets up + // tests for forcing HW read/write failures) + // This register should contain a copy of the GIF2PCB error register + // starting at bit 32 + // NOTE: must byteswap to little endian before writing data + uint64_t PIB2GIF_INVALID_SCOM_ADDR_ERROR = + 0x0000000000000000ull | + ((GIF2PCB_INVALID_SCOM_ADDR_ERROR & + 0xffffc00000000000ull) >> 32); + l_buffer64 = BYTESWAP64(PIB2GIF_INVALID_SCOM_ADDR_ERROR); + op_size = sizeof(l_buffer64); + l_err = DeviceFW::deviceWrite( + explr_target, + &l_buffer64, + op_size, + DEVICE_MMIO_ADDRESS( + SCOM2MMIO_ADDR( + EXPLR_TP_MB_UNIT_TOP_PIB2GIF_ERROR_REG), + op_size)); + + if(l_err != nullptr) + { + errlCommit(l_err, CXXTEST_COMP_ID); + TS_FAIL("testExplrMMIO> Error for pib2gif write, RC=0x%04X", + ERRL_GETRC_SAFE(l_err)); + break; + } #if 0 //@fixme - RTC:211487 - // Write to an "invalid" scom address. Should - // return with failure (now that we've set up the error regs). - // NOTE: Also, writing MMIO_OCMB_UE_DETECTED to this register - // sets up the following read to the same register - // to fail. - l_buffer64 = MMIO_OCMB_UE_DETECTED; - op_size = sizeof(l_buffer64); - l_err = DeviceFW::deviceWrite( - explr_target, - &l_buffer64, - op_size, - DEVICE_MMIO_ADDRESS( - SCOM2MMIO_ADDR(EXPLR_INVALID_SCOM_ADDR), - op_size)); - - if(l_err == nullptr) - { - TS_FAIL("testExplrMMIO> " - "did not recieve expected failure on mmio write"); - return; - } - else - { - TS_INFO("testExplrMMIO> recieved expected failure on mmio write"); - errlCommit(l_err, CXXTEST_COMP_ID); - } + // Write to an "invalid" scom address. Should + // return with failure (now that we've set up the error regs). + // NOTE: Also, writing MMIO_OCMB_UE_DETECTED to this register + // sets up the following read to the same register + // to fail. + l_buffer64 = MMIO_OCMB_UE_DETECTED; + op_size = sizeof(l_buffer64); + l_err = DeviceFW::deviceWrite( + explr_target, + &l_buffer64, + op_size, + DEVICE_MMIO_ADDRESS( + SCOM2MMIO_ADDR(EXPLR_INVALID_SCOM_ADDR), + op_size)); + if(l_err == nullptr) + { + TS_FAIL("testExplrMMIO> " + "did not recieve expected failure on mmio write"); + break; + } + else + { + TS_INFO("testExplrMMIO> received expected failure on mmio write"); + errlCommit(l_err, CXXTEST_COMP_ID); + } + + // Read from an "invalid" scom address. Should + // return with failure (now that we've se up the error regs). + op_size = sizeof(l_buffer64); + l_err = DeviceFW::deviceRead( + explr_target, + &l_buffer64, + op_size, + DEVICE_MMIO_ADDRESS( + SCOM2MMIO_ADDR(EXPLR_INVALID_SCOM_ADDR), + op_size)); - // Read from an "invalid" scom address. Should - // return with failure (now that we've se up the error regs). - op_size = sizeof(l_buffer64); - l_err = DeviceFW::deviceRead( - explr_target, - &l_buffer64, - op_size, - DEVICE_MMIO_ADDRESS( - SCOM2MMIO_ADDR(EXPLR_INVALID_SCOM_ADDR), - op_size)); - if(l_err == nullptr) - { - TS_INFO("testExplrMMIO> data read from invalid address: 0x%016llx", - l_buffer64); - TS_FAIL("testExplrMMIO> " - "did not recieve expected failure on mmio read"); - } - else - { - TS_INFO("testExplrMMIO> recieved expected failure on mmio read"); - errlCommit(l_err, CXXTEST_COMP_ID); - } + if(l_err == nullptr) + { + TS_INFO("testExplrMMIO> data read from invalid address: 0x%016llx", + l_buffer64); + TS_FAIL("testExplrMMIO> " + "did not recieve expected failure on mmio read"); + } + else + { + TS_INFO("testExplrMMIO> received expected failure on mmio read"); + errlCommit(l_err, CXXTEST_COMP_ID); + } #endif //@fixme - RTC:211487 + } while (0); + + // << atomic section + mutex_unlock(l_mutex); TS_INFO("testExplrMMIO> Done"); }; }; |

