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authorPrachi Gupta <pragupta@us.ibm.com>2015-10-14 13:23:26 -0500
committerPatrick Williams <iawillia@us.ibm.com>2015-12-11 15:30:26 -0600
commita4ccd3d722669446c136632b6b501c0748ca3be3 (patch)
tree8721885a550276781b44cf52f896d468995293bd /src/usr/isteps
parent3187da27c464de6422ecb1bc12a085fc5b31f610 (diff)
downloadblackbird-hostboot-a4ccd3d722669446c136632b6b501c0748ca3be3.tar.gz
blackbird-hostboot-a4ccd3d722669446c136632b6b501c0748ca3be3.zip
P9 Isteps: Created directory structure for istep 6/7 wrappers
Change-Id: I8ac216444270b1ea5a2fd550f4e1ea8861de7c4d RTC:137652 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21458 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/isteps')
-rw-r--r--src/usr/isteps/hwpisteperror.C108
-rw-r--r--src/usr/isteps/hwpistepud.C59
-rw-r--r--src/usr/isteps/istep06/istep06.C449
-rw-r--r--src/usr/isteps/istep06/makefile32
-rw-r--r--src/usr/isteps/istep07/call_mss_attr_update.C83
-rw-r--r--src/usr/isteps/istep07/call_mss_eff_config.C363
-rw-r--r--src/usr/isteps/istep07/call_mss_freq.C125
-rw-r--r--src/usr/isteps/istep07/call_mss_volt.C265
-rw-r--r--src/usr/isteps/istep07/host_collect_dimm_spd.C155
-rw-r--r--src/usr/isteps/istep07/makefile34
-rw-r--r--src/usr/isteps/istepHelperFuncs.C267
-rw-r--r--src/usr/isteps/istepHelperFuncs.H323
-rw-r--r--src/usr/isteps/makefile37
13 files changed, 2300 insertions, 0 deletions
diff --git a/src/usr/isteps/hwpisteperror.C b/src/usr/isteps/hwpisteperror.C
new file mode 100644
index 000000000..afa9e9294
--- /dev/null
+++ b/src/usr/isteps/hwpisteperror.C
@@ -0,0 +1,108 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/hwpisteperror.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2012,2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+#include <isteps/hwpisteperror.H>
+#include <isteps/hwpistepud.H>
+#include <istepdispatcher.H>
+
+using namespace ISTEP;
+using namespace ISTEP_ERROR;
+
+// setup the internal elog pointer and capture error data for the first or
+// add error data to top level elog
+void ISTEP_ERROR::IStepError::addErrorDetails( const errlHndl_t i_err )
+{
+ mutex_lock( &iv_mutex );
+
+ iv_errorCount++;
+
+ // if internal elog is null, create a new one and grab some data from the
+ // first error that is passed in.
+ if( iv_eHandle == NULL )
+ {
+ uint8_t l_iStep = 0;
+ uint8_t l_subStep = 0;
+
+ // Set the eid and reason code of the first error to user data word 1
+ uint64_t data1=TWO_UINT32_TO_UINT64(i_err->eid(),i_err->reasonCode());
+
+ // Set the error count and iStep/subStep to user data word 2
+ INITSERVICE::IStepDispatcher::
+ getTheInstance().getIstepInfo(l_iStep,l_subStep);
+ uint64_t data2 = TWO_UINT32_TO_UINT64(iv_errorCount, //first error
+ TWO_UINT8_TO_UINT16(l_iStep,l_subStep));
+
+ /*@
+ * @errortype
+ * @reasoncode ISTEP_FAILURE
+ * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE
+ * @moduleid ISTEP_REPORTING_ERROR
+ * @userdata1[0:31] eid of first error
+ * @userdata1[32:63] Reason code of first error
+ * @userdata2[0:31] Total number of elogs included
+ * @userdata2[32:64] iStep and SubStep that failed
+ * @devdesc IStep failed, see other log(s) with the same PLID
+ * for reason.
+ *
+ */
+ iv_eHandle = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE,
+ ISTEP_REPORTING_ERROR,
+ ISTEP_FAILURE,
+ data1, data2);
+
+ // Set the PLID of this istep elog to match the first error
+ iv_eHandle->plid(i_err->plid());
+ }
+ else
+ {
+ // retrieve iStep and subStep
+ uint32_t l_iStepSubStep = (iv_eHandle->getUserData2() & 0xFFFFFFFF);
+ // update the error count and keep iStep/subStep in user data word 1
+ uint64_t l_data2 = TWO_UINT32_TO_UINT64 (iv_errorCount,l_iStepSubStep);
+ iv_eHandle->addUserData2(l_data2);
+
+ // set the plid of the input elog to match the first and istep elog
+ i_err->plid( iv_eHandle->plid() );
+ }
+
+ // grab the istep's trace and add to the input elog
+ i_err->collectTrace("ISTEPS_TRACE", 1024);
+
+ // the istep error is causing the IPL to fail (UNRECOVERABLE), so
+ // if this error was less severe than UNRECOVERABLE (ie, INFORMATIONAL,
+ // RECOVERED, PREDICTIVE) change to UNRECOVERABLE so that it is
+ // visible as well as the istep error log.
+ if (i_err->sev() < ERRORLOG::ERRL_SEV_UNRECOVERABLE)
+ {
+ i_err->setSev(ERRORLOG::ERRL_SEV_UNRECOVERABLE);
+ }
+
+ // add some details from the input elog to the istep error object
+ ISTEP_ERROR::HwpUserDetailsIstep errorDetails( i_err );
+
+ // cross reference input error log to istep error object
+ errorDetails.addToLog( iv_eHandle );
+
+ mutex_unlock( &iv_mutex );
+}
diff --git a/src/usr/isteps/hwpistepud.C b/src/usr/isteps/hwpistepud.C
new file mode 100644
index 000000000..8bed5a84f
--- /dev/null
+++ b/src/usr/isteps/hwpistepud.C
@@ -0,0 +1,59 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/hwpistepud.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+/**
+ * @file hwpudistep.C
+ *
+ * @brief Implementation of HwpSvcUserDetailsIstep
+ */
+#include <hbotcompid.H>
+#include <isteps/hwpistepud.H>
+#include <hwpf/hwpf_reasoncodes.H>
+
+using namespace ISTEP_ERROR;
+
+//------------------------------------------------------------------------------
+HwpUserDetailsIstep::HwpUserDetailsIstep( errlHndl_t i_err )
+{
+ HwpUserDetailsIstepErrorData * l_pBuf =
+ reinterpret_cast<HwpUserDetailsIstepErrorData *>(
+ reallocUsrBuf(sizeof(HwpUserDetailsIstepErrorData)));
+
+ l_pBuf->eid = i_err->eid();
+
+ l_pBuf->reasoncode = i_err->reasonCode();
+
+ // Set up ErrlUserDetails instance variables
+ iv_CompId = HWPF_COMP_ID;
+ iv_Version = 1;
+ iv_SubSection = fapi::HWPF_UDT_STEP_ERROR_DETAILS;
+}
+
+//------------------------------------------------------------------------------
+HwpUserDetailsIstep::~HwpUserDetailsIstep()
+{
+
+}
+
+
diff --git a/src/usr/isteps/istep06/istep06.C b/src/usr/isteps/istep06/istep06.C
new file mode 100644
index 000000000..8ce7a491d
--- /dev/null
+++ b/src/usr/isteps/istep06/istep06.C
@@ -0,0 +1,449 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/istep06/istep06.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+#include <hwas/common/hwas.H>
+#include <hwas/common/hwasCommon.H>
+#include <hwas/common/hwas_reasoncodes.H>
+#include <hwas/hwasPlat.H>
+
+#include <hwas/common/deconfigGard.H>
+
+#include <fsi/fsiif.H>
+#include <initservice/taskargs.H>
+#include <initservice/isteps_trace.H>
+#include <initservice/initserviceif.H>
+#include <isteps/hwpisteperror.H>
+
+#include <targeting/attrsync.H>
+#include <targeting/namedtarget.H>
+#include <diag/prdf/prdfMain.H>
+#include <intr/interrupt.H>
+#include <ibscom/ibscomif.H>
+
+#include <i2c/i2cif.H>
+
+#include <sbe/sbeif.H>
+#include <sbe_update.H>
+
+// targeting support.
+#include <targeting/common/utilFilter.H>
+#include <targeting/common/commontargeting.H>
+#include <targeting/common/entitypath.H>
+
+#include <errl/errludtarget.H>
+
+#include <console/consoleif.H>
+
+#include <ipmi/ipmisensor.H>
+#include <ipmi/ipmifruinv.H>
+
+// Custom compile configs
+#include <config.h>
+
+#ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
+ #include <hwpf/hwp/occ/occ.H>
+ #include <hwpf/hwp/occ/occ_common.H>
+
+ #include <diag/attn/attn.H>
+#endif
+
+#ifdef CONFIG_TPMDD
+ #include <secureboot/trustedbootif.H>
+#endif
+
+using namespace HWAS;
+using namespace TARGETING;
+using namespace ISTEP;
+using namespace ISTEP_ERROR;
+
+namespace ISTEP_06
+{
+//******************************************************************************
+// host_init_fsi function -- istep 06.4
+//******************************************************************************
+void* host_init_fsi( void *io_pArgs )
+{
+ errlHndl_t l_errl = NULL;
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_init_fsi entry" );
+ do
+ {
+ l_errl = FSI::initializeHardware( );
+ if (l_errl)
+ {
+ // This error should get returned
+ break;
+ }
+
+ // Only reset the I2C Masters if FSP is not running
+ if ( !INITSERVICE::spBaseServicesEnabled() )
+ {
+ l_errl = I2C::i2cResetActiveMasters(I2C::I2C_ALL, false);
+ if (l_errl)
+ {
+ // Commit this error
+ errlCommit( l_errl, HWPF_COMP_ID );
+ }
+ }
+
+ } while (0);
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_init_fsi exit" );
+ return l_errl;
+}
+
+//******************************************************************************
+// host_set_ipl_parms function -- istep 6.5
+//******************************************************************************
+void* host_set_ipl_parms( void *io_pArgs )
+{
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_set_ipl_parms entry" );
+ errlHndl_t errl = NULL;
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_set_ipl_parms exit" );
+
+ return errl;
+}
+
+//******************************************************************************
+// host_discover_targets function -- istep 6.6
+//******************************************************************************
+void* host_discover_targets( void *io_pArgs )
+{
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "host_discover_targets entry" );
+
+ errlHndl_t errl = NULL;
+
+ // Check whether we're in MPIPL mode
+ TARGETING::Target* l_pTopLevel = NULL;
+ targetService().getTopLevelTarget( l_pTopLevel );
+ HWAS_ASSERT(l_pTopLevel, "HWAS host_discover_targets: no TopLevelTarget");
+
+ if (l_pTopLevel->getAttr<ATTR_IS_MPIPL_HB>())
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "MPIPL mode");
+
+ // Sync attributes from Fsp
+ errl = syncAllAttributesFromFsp();
+ }
+ else
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "Normal IPL mode");
+
+ errl = discoverTargets();
+ }
+
+ // Put out some helpful messages that show which targets we actually found
+ std::map<TARGETING::TYPE,uint64_t> l_presData;
+ for (TargetIterator target = targetService().begin();
+ target != targetService().end();
+ ++target)
+ {
+ if (!(target->getAttr<ATTR_HWAS_STATE>().present))
+ {
+ continue;
+ }
+ TARGETING::TYPE l_type = target->getAttr<TARGETING::ATTR_TYPE>();
+ TARGETING::ATTR_POSITION_type l_pos = 0;
+ if( target->tryGetAttr<TARGETING::ATTR_POSITION>(l_pos) )
+ {
+ l_presData[l_type] |= (0x8000000000000000 >> l_pos);
+ }
+ }
+ TARGETING::EntityPath l_epath; //use EntityPath's translation functions
+ for( std::map<TARGETING::TYPE,uint64_t>::iterator itr = l_presData.begin();
+ itr != l_presData.end();
+ ++itr )
+ {
+ uint8_t l_type = itr->first;
+ uint64_t l_val = itr->second;
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,"PRESENT> %s[%.2X]=%.8X%.8X",
+ l_epath.pathElementTypeAsString(itr->first), l_type, l_val>>32, l_val&0xFFFFFFFF);
+#if (!defined(CONFIG_CONSOLE_OUTPUT_TRACE) && defined(CONFIG_CONSOLE))
+ CONSOLE::displayf("HWAS", "PRESENT> %s[%.2X]=%.8X%.8X",
+ l_epath.pathElementTypeAsString(itr->first), l_type, l_val>>32, l_val&0xFFFFFFFF );
+#endif
+ }
+
+#ifdef CONFIG_BMC_IPMI
+ // Gather + Send the base IPMI Fru Inventory data to the BMC
+ IPMIFRUINV::setData();
+
+ // send DIMM/CORE/PROC sensor status to the BMC
+ SENSOR::updateBMCSensorStatus();
+#endif
+
+#ifdef CONFIG_TPMDD
+ if (NULL == errl)
+ {
+ // Initialize the master TPM
+ errl = (errlHndl_t)TRUSTEDBOOT::host_update_master_tpm(io_pArgs);
+ }
+#endif
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "host_discover_targets exit" );
+
+ return errl;
+}
+
+//******************************************************************************
+// host_update_master_tpm -- istep 6.7
+//******************************************************************************
+void* host_update_master_tpm( void *io_pArgs )
+{
+ errlHndl_t l_err = NULL;
+
+ return l_err;
+}
+
+//******************************************************************************
+// host_gard function --istep 6.8
+//******************************************************************************
+void* host_gard( void *io_pArgs )
+{
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_gard entry" );
+ errlHndl_t errl;
+
+ do {
+ TARGETING::Target* l_pTopLevel = NULL;
+ targetService().getTopLevelTarget( l_pTopLevel );
+ HWAS_ASSERT(l_pTopLevel, "HWAS host_gard: no TopLevelTarget");
+
+ #ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ INFO_MRK"host_gard: invoke PRD to check for previous CS" );
+
+ errl = ATTN::checkForCSAttentions();
+ if ( NULL != errl )
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ ERR_MRK"host_gard: error from checkForCSAttentions" );
+ errlCommit(errl, HWPF_COMP_ID);
+ }
+
+ #endif
+
+ // Check whether we're in MPIPL mode
+ if (l_pTopLevel->getAttr<ATTR_IS_MPIPL_HB>())
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "MPIPL mode");
+
+ // we only want EX units to be processed
+ TARGETING::PredicateCTM l_exFilter(TARGETING::CLASS_UNIT,
+ TARGETING::TYPE_EX);
+ errl = collectGard(&l_exFilter);
+ if (errl)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "collectGard returned error; breaking out");
+ break;
+ }
+ }
+ else
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "Normal IPL mode");
+
+ errl = collectGard();
+ if(errl)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "collectGard returned error; breaking out");
+ break;
+ }
+
+ if (errl == NULL)
+ {
+ // check and see if we still have enough hardware to continue
+ errl = checkMinimumHardware();
+ if(errl)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "check minimum hardware returned error; breaking out");
+ break;
+ }
+ }
+ // If targets are deconfigured as a result of host_gard, they are
+ // done so using the PLID as the reason for deconfiguration. This
+ // triggers the reconfigure loop attribute to be set, which causes
+ // undesirable behavior, so we need to reset it here:
+
+ // Read current value
+ TARGETING::ATTR_RECONFIGURE_LOOP_type l_reconfigAttr =
+ l_pTopLevel->getAttr<TARGETING::ATTR_RECONFIGURE_LOOP>();
+ // Turn off deconfigure bit
+ l_reconfigAttr &= ~TARGETING::RECONFIGURE_LOOP_DECONFIGURE;
+ // Write back to attribute
+ l_pTopLevel->setAttr<TARGETING::ATTR_RECONFIGURE_LOOP>
+ (l_reconfigAttr);
+ }
+
+ // Send message to FSP sending HUID of EX chip associated with
+ // master core
+ msg_t * core_msg = msg_allocate();
+ core_msg->type = SBE::MSG_IPL_MASTER_CORE;
+ const TARGETING::Target* l_masterCore = TARGETING::getMasterCore( );
+
+ /*@ errorlog tag
+ * @errortype ERRL_SEV_CRITICAL_SYS_TERM
+ * @moduleid HWAS::MOD_HOST_GARD
+ * @reasoncode HWAS::RC_MASTER_CORE_NULL
+ * @userdata1 0
+ * @userdata2 0
+ * @devdesc HWAS host_gard: no masterCore found
+ */
+ if (l_masterCore == NULL)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "No masterCore Found" );
+ const bool hbSwError = true;
+ errl = new ERRORLOG::ErrlEntry
+ (ERRORLOG::ERRL_SEV_CRITICAL_SYS_TERM,
+ HWAS::MOD_HOST_GARD,
+ HWAS::RC_MASTER_CORE_NULL,
+ 0, 0, hbSwError);
+ break;
+ }
+ // Get the EX chip associated with the master core as that is the
+ // chip that
+ // has the IS_MASTER_EX attribute associated with it
+ TARGETING::TargetHandleList targetList;
+ getParentAffinityTargets(targetList,
+ l_masterCore,
+ TARGETING::CLASS_UNIT,
+ TARGETING::TYPE_EX);
+ HWAS_ASSERT(targetList.size() == 1,
+ "HWAS host_gard: Incorrect EX chip(s) associated with masterCore");
+ core_msg->data[0] = 0;
+ core_msg->data[1] = TARGETING::get_huid( targetList[0] );
+ core_msg->extra_data = NULL;
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Sending MSG_MASTER_CORE message with HUID %08x",
+ core_msg->data[1]);
+ errl = MBOX::send(MBOX::IPL_SERVICE_QUEUE,core_msg);
+ if (errl)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ ERR_MRK"MBOX::send failed sending Master Core message");
+ msg_free(core_msg);
+ break;
+ }
+ } while (0);
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_gard exit" );
+ return errl;
+}
+
+//******************************************************************************
+// host_revert_sbe_mcs_setup --istep 6.9
+//******************************************************************************
+void* host_revert_sbe_mcs_setup ( void *io_pArgs )
+{
+ errlHndl_t l_err = NULL;
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call p9_revert_sbe_mcs_setup entry" );
+
+ //@TODO: RTC:133836 call p9_revert_sbe_mcs_setup HWP
+
+ return l_err;
+}
+
+//******************************************************************************
+// host_start_occ_xstop_handler
+//******************************************************************************
+void* host_start_occ_xstop_handler ( void *io_pArgs )
+{
+ errlHndl_t l_err = NULL;
+
+#if 0
+/// This is a bunch of stuff that was put into P8 and git didn't handle
+/// merging correctly. Some of this may be a useful starting point for
+/// enabling OCC checkstop handling. -- Patrick
+
+ "host_cancontinue_clear entry" );
+ errlHndl_t errl = NULL;
+
+#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
+ // TODO RTC 115587: current place; could change
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "host_cancontinue_clear: calling activateOCCs" );
+ errl = HBOCC::activateOCCs(true);
+ if (errl)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "activateOCCs failed");
+ }
+#endif
+
+ //Create IStep error log and cross reference error that occurred
+ l_stepError.addErrorDetails(errl);
+
+ // Commit Error
+ errlCommit(errl, HWPF_COMP_ID);
+
+ // Don't keep calling proc_enable_reconfig. Treat as a fatal
+ // unexpected unrecoverable error and terminate the IPL.
+ break ; // break with error
+ }
+ // Success
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Successfully ran proc_enable_reconfig HWP on "
+ "MCS target HUID %.8X", l_currMcsHuid);
+ } // for
+
+#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
+ // update firdata inputs for OCC
+ TARGETING::Target* masterproc = NULL;
+ TARGETING::targetService().masterProcChipTargetHandle(masterproc);
+ errl = HBOCC::loadHostDataToSRAM(masterproc,
+ PRDF::MASTER_PROC_CORE);
+ if (errl)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Error returned from call to HBOCC::loadHostDataToSRAM");
+
+ //Create IStep error log and cross reference error that occurred
+ l_stepError.addErrorDetails(errl);
+
+ // Commit Error
+ errlCommit(errl, HWPF_COMP_ID);
+ break;
+ }
+#endif
+
+ }
+ while(0);
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "host_prd_hwreconfig exit" );
+ // end task, returning any errorlogs to IStepDisp
+ return l_stepError.getErrorHandle();
+#endif
+ return l_err;
+}
+
+};
diff --git a/src/usr/isteps/istep06/makefile b/src/usr/isteps/istep06/makefile
new file mode 100644
index 000000000..914c14c46
--- /dev/null
+++ b/src/usr/isteps/istep06/makefile
@@ -0,0 +1,32 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/usr/isteps/istep06/makefile $
+#
+# OpenPOWER HostBoot Project
+#
+# Contributors Listed Below - COPYRIGHT 2015
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+ROOTPATH = ../../../..
+MODULE = istep06
+
+OBJS += istep06.o
+
+EXTRAINCDIR += ${ROOTPATH}/src/usr/sbe
+
+include ${ROOTPATH}/config.mk
diff --git a/src/usr/isteps/istep07/call_mss_attr_update.C b/src/usr/isteps/istep07/call_mss_attr_update.C
new file mode 100644
index 000000000..501e1a633
--- /dev/null
+++ b/src/usr/isteps/istep07/call_mss_attr_update.C
@@ -0,0 +1,83 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/istep07/call_mss_attr_update.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+/**
+ * @file call_mss_attr_update.C
+ * Contains the wrapper for istep 7.5
+ */
+
+/******************************************************************************/
+// Includes
+/******************************************************************************/
+#include <stdint.h>
+
+#include <trace/interface.H>
+#include <initservice/taskargs.H>
+#include <errl/errlentry.H>
+
+#include <isteps/hwpisteperror.H>
+
+#include <errl/errludtarget.H>
+#include <initservice/isteps_trace.H>
+
+// targeting support
+#include <targeting/common/commontargeting.H>
+#include <targeting/common/utilFilter.H>
+
+
+#include <config.h>
+
+namespace ISTEP_07
+{
+
+using namespace ISTEP;
+using namespace ISTEP_ERROR;
+using namespace ERRORLOG;
+using namespace TARGETING;
+
+//
+// Wrapper function to call mss_attr_update
+//
+void* call_mss_attr_update( void *io_pArgs )
+{
+
+ IStepError l_StepError;
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_attr_update entry");
+ errlHndl_t l_err = NULL;
+
+ //@TODO RTC:133830 add the procedure back in when ready
+ //FAPI_INVOKE_HWP(l_err, p9_mss_attr_update);
+ if(l_err)
+ {
+ l_StepError.addErrorDetails(l_err);
+ errlCommit( l_err, HWPF_COMP_ID );
+ }
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_attr_update exit" );
+
+ return l_StepError.getErrorHandle();
+}
+
+}; // end namespace
diff --git a/src/usr/isteps/istep07/call_mss_eff_config.C b/src/usr/isteps/istep07/call_mss_eff_config.C
new file mode 100644
index 000000000..07d49ad1f
--- /dev/null
+++ b/src/usr/isteps/istep07/call_mss_eff_config.C
@@ -0,0 +1,363 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/istep07/call_mss_eff_config.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+/**
+ * @file call_mss_eff_config.C
+ * Contains all the wrappers for istep07
+ */
+
+/******************************************************************************/
+// Includes
+/******************************************************************************/
+#include <stdint.h>
+
+#include <trace/interface.H>
+#include <initservice/taskargs.H>
+#include <errl/errlentry.H>
+
+#include <isteps/hwpisteperror.H>
+#include <errl/errludtarget.H>
+
+#include <initservice/isteps_trace.H>
+
+// targeting support
+#include <targeting/common/commontargeting.H>
+#include <targeting/common/utilFilter.H>
+
+#include <config.h>
+
+namespace ISTEP_07
+{
+
+using namespace ISTEP;
+using namespace ISTEP_ERROR;
+using namespace ERRORLOG;
+using namespace TARGETING;
+
+errlHndl_t call_mss_eff_grouping()
+{
+ errlHndl_t l_err = NULL;
+/* @TODO RTC:133830 Add the wrapper when ready
+ TARGETING::TargetHandleList l_procsList;
+ getAllChips(l_procsList, TYPE_PROC);
+
+ for (TargetHandleList::const_iterator
+ l_proc_iter = l_procsList.begin();
+ l_proc_iter != l_procsList.end();
+ ++l_proc_iter)
+ {
+ // make a local copy of the target for ease of use
+ const TARGETING::Target* l_cpu_target = *l_proc_iter;
+
+ // print call to hwp and write HUID of the target(s)
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "===== mss_eff_grouping HWP cpu "
+ "target HUID %.8X",
+ TARGETING::get_huid(l_cpu_target));
+
+ // cast OUR type of target to a FAPI type of target.
+ const fapi::Target l_fapi_cpu_target(fapi::TARGET_TYPE_PROC_CHIP,
+ (const_cast<TARGETING::Target*>(l_cpu_target)) );
+
+ TARGETING::TargetHandleList l_membufsList;
+ getChildAffinityTargets(l_membufsList, l_cpu_target,
+ CLASS_CHIP, TYPE_MEMBUF);
+ std::vector<fapi::Target> l_associated_centaurs;
+
+ for (TargetHandleList::const_iterator
+ l_membuf_iter = l_membufsList.begin();
+ l_membuf_iter != l_membufsList.end();
+ ++l_membuf_iter)
+ {
+ // make a local copy of the target for ease of use
+ const TARGETING::Target* l_pTarget = *l_membuf_iter;
+
+ // cast OUR type of target to a FAPI type of target.
+ const fapi::Target l_fapi_centaur_target(fapi::TARGET_TYPE_MEMBUF_CHIP,
+ (const_cast<TARGETING::Target*>(l_pTarget)) );
+
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "target HUID %.8X", TARGETING::get_huid(l_pTarget));
+
+ l_associated_centaurs.push_back(l_fapi_centaur_target);
+ }
+
+ //FAPI_INVOKE_HWP(l_err, p9_mss_eff_grouping,
+ //l_fapi_cpu_target, l_associated_centaurs);
+ //Remove when above HWP is working
+ FAPI_INVOKE_HWP(l_err,mss_eff_grouping,
+ l_fapi_cpu_target, l_associated_centaurs);
+
+ // process return code.
+ if ( l_err )
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: mss_eff_grouping HWP",
+ l_err->reasonCode());
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_cpu_target).addToLog(l_err);
+
+ break; // break out mba loop
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : mss_eff_grouping HWP");
+ }
+ } // endfor
+*/
+ return l_err;
+}
+
+errlHndl_t call_opt_memmap( bool i_initBase )
+{
+ errlHndl_t l_err = NULL;
+/* @TODO RTC:133830 Add the wrapper when ready
+ TARGETING::TargetHandleList l_procs;
+ getAllChips(l_procs, TYPE_PROC);
+
+ std::vector<fapi::Target> l_fapi_procs;
+
+ for ( TARGETING::TargetHandleList::const_iterator
+ l_iter = l_procs.begin();
+ l_iter != l_procs.end();
+ ++l_iter )
+ {
+ // make a local copy of the target for ease of use
+ const TARGETING::Target* l_target = *l_iter;
+
+ // cast OUR type of target to a FAPI type of target.
+ const fapi::Target l_fapi_target(fapi::TARGET_TYPE_PROC_CHIP,
+ (const_cast<TARGETING::Target*>(l_target)) );
+
+ l_fapi_procs.push_back(l_fapi_target);
+ }
+
+ //FAPI_INVOKE_HWP(l_err, p9_opt_memmap, l_fapi_procs, i_initBase);
+ //Remove when above HWP is working
+ FAPI_INVOKE_HWP(l_err,opt_memmap, l_fapi_procs,i_initBase);
+
+ if ( l_err )
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: opt_memmap HWP", l_err->reasonCode());
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : opt_memmap HWP");
+ }
+*/
+ return l_err;
+}
+
+errlHndl_t call_mss_eff_mb_interleave()
+{
+ errlHndl_t l_err = NULL;
+/* @TODO RTC:133830 Add the wrapper when ready
+ TARGETING::TargetHandleList l_membufTargetList;
+ getAllChips(l_membufTargetList, TYPE_MEMBUF);
+ for (TargetHandleList::const_iterator
+ l_membuf_iter = l_membufTargetList.begin();
+ l_membuf_iter != l_membufTargetList.end();
+ ++l_membuf_iter)
+ {
+ const TARGETING::Target* l_membuf_target = *l_membuf_iter;
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "===== Running mss_eff_mb_interleave HWP on HUID %.8X",
+ TARGETING::get_huid(l_membuf_target));
+ fapi::Target l_membuf_fapi_target(fapi::TARGET_TYPE_MEMBUF_CHIP,
+ (const_cast<TARGETING::Target*>(l_membuf_target)) );
+ FAPI_INVOKE_HWP(l_err, mss_eff_mb_interleave, l_membuf_fapi_target);
+ if (l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: mss_eff_mb_interleave HWP returns error",
+ l_err->reasonCode());
+ }
+ else
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Successfully ran mss_eff_mb_interleave HWP on HUID %.8X",
+ TARGETING::get_huid(l_membuf_target));
+ }
+ }
+*/
+ return l_err;
+}
+
+
+//
+// Wrapper function to call mss_eff_config
+//
+void* call_mss_eff_config( void *io_pArgs )
+{
+ IStepError l_StepError;
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_eff_config entry" );
+
+ //@TODO RTC:133830 Add the wrapper back in when ready
+/*
+ errlHndl_t l_err = NULL;
+ TARGETING::Target* l_sys = NULL;
+ targetService().getTopLevelTarget(l_sys);
+ assert( l_sys != NULL );
+
+ // The attribute ATTR_MEM_MIRROR_PLACEMENT_POLICY should already be
+ // correctly set by default for all platforms except for sapphire.
+ // Don't allow mirroring on sapphire yet @todo-RTC:108314
+ //
+ //ATTR_PAYLOAD_IN_MIRROR_MEM_type l_mirrored =
+ // l_sys->getAttr<ATTR_PAYLOAD_IN_MIRROR_MEM>();
+ //
+ //if(l_mirrored && is_sapphire_load())
+ //{
+ // TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "Mirroring is enabled");
+
+ // uint8_t l_mmPolicy =
+ // fapi::ENUM_ATTR_MEM_MIRROR_PLACEMENT_POLICY_FLIPPED;
+ // l_sys->
+ // setAttr<TARGETING::ATTR_MEM_MIRROR_PLACEMENT_POLICY>(l_mmPolicy);
+ //}
+
+ // Get all functional MBA chiplets
+ TARGETING::TargetHandleList l_mbaTargetList;
+ getAllChiplets(l_mbaTargetList, TYPE_MBA);
+
+ // Iterate over all MBAs, calling mss_eff_config and mss_eff_config_thermal
+ for (TargetHandleList::const_iterator l_mba_iter = l_mbaTargetList.begin();
+ l_mba_iter != l_mbaTargetList.end(); ++l_mba_iter)
+ {
+ // Get the TARGETING::Target pointer and its HUID
+ const TARGETING::Target* l_mba_target = *l_mba_iter;
+ uint32_t l_huid = TARGETING::get_huid(l_mba_target);
+
+ // Create a FAPI target representing the MBA
+ const fapi::Target l_fapi_mba_target(fapi::TARGET_TYPE_MBA_CHIPLET,
+ (const_cast<TARGETING::Target*>(l_mba_target)));
+
+ // Call the mss_eff_config_vpd_decode HWP
+ //FAPI_INVOKE_HWP(l_err,p9_mss_eff_config_vpd_decode,
+ //l_fapi_mba_target);
+
+ // Call the mss_eff_config HWP
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "===== mss_eff_config HWP. MBA HUID %.8X", l_huid);
+ //FAPI_INVOKE_HWP(l_err, p9_mss_eff_config, l_fapi_mba_target);
+ //Remove when above HWP is working:
+ FAPI_INVOKE_HWP(l_err, mss_eff_config, l_fapi_mba_target);
+
+ if (l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: mss_eff_config HWP ", l_err->reasonCode());
+
+ // Ensure istep error created and has same plid as this error
+ ErrlUserDetailsTarget(l_mba_target).addToLog(l_err);
+ l_StepError.addErrorDetails(l_err);
+ errlCommit(l_err, HWPF_COMP_ID);
+ }
+ else
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : mss_eff_config HWP");
+
+ // Call the mss_eff_config_thermal HWP
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "===== mss_eff_config_thermal HWP. MBA HUID %.8X", l_huid);
+ //FAPI_INVOKE_HWP(l_err, p9_mss_eff_config_thermal,
+ //l_fapi_mba_target);
+
+ if (l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: mss_eff_config_thermal HWP ", l_err->reasonCode());
+
+ // Ensure istep error created and has same plid as this error
+ ErrlUserDetailsTarget(l_mba_target).addToLog(l_err);
+ l_StepError.addErrorDetails(l_err);
+ errlCommit(l_err, HWPF_COMP_ID);
+ }
+ else
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : mss_eff_config_thermal HWP");
+ }
+ }
+ }
+
+ if (l_StepError.isNull())
+ {
+ // Flush out BASE attributes to starting values
+ l_err = call_opt_memmap(true);
+
+ if (!l_err)
+ {
+ // Stack the memory on each chip
+ l_err = call_mss_eff_grouping();
+
+ if (!l_err)
+ {
+ // Move the BASES around to the real final values
+ l_err = call_opt_memmap(false);
+
+ if (!l_err)
+ {
+ // Stack the memory again based on system-wide positions
+ l_err = call_mss_eff_grouping();
+
+ //if(!l_err) //Cumulus only
+ //{
+ // l_err = call_mss_eff_mb_interleave();
+ //}
+
+ }
+ }
+ }
+
+ if (l_err)
+ {
+ // Ensure istep error created and has same plid as this error
+ l_StepError.addErrorDetails( l_err );
+ errlCommit( l_err, HWPF_COMP_ID );
+ }
+ }
+
+ // Calling mss_eff_mb_interleave
+ if (l_StepError.isNull())
+ {
+ l_err = call_mss_eff_mb_interleave();
+ if(l_err)
+ {
+ l_StepError.addErrorDetails(l_err);
+ errlCommit( l_err, HWPF_COMP_ID );
+ }
+ }
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_eff_config exit" );
+*/
+ return l_StepError.getErrorHandle();
+}
+}; // end namespace
diff --git a/src/usr/isteps/istep07/call_mss_freq.C b/src/usr/isteps/istep07/call_mss_freq.C
new file mode 100644
index 000000000..2ba73a9f7
--- /dev/null
+++ b/src/usr/isteps/istep07/call_mss_freq.C
@@ -0,0 +1,125 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/istep07/call_mss_freq.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+/**
+ * @file call_mss_freq.C
+ * Contain the wrapper for istep 7.3
+ */
+
+/******************************************************************************/
+// Includes
+/******************************************************************************/
+#include <stdint.h>
+
+#include <trace/interface.H>
+#include <initservice/taskargs.H>
+#include <errl/errlentry.H>
+
+#include <isteps/hwpisteperror.H>
+#include <errl/errludtarget.H>
+
+#include <initservice/isteps_trace.H>
+
+// targeting support
+#include <targeting/common/commontargeting.H>
+#include <targeting/common/utilFilter.H>
+
+#include <config.h>
+
+namespace ISTEP_07
+{
+
+using namespace ISTEP;
+using namespace ISTEP_ERROR;
+using namespace ERRORLOG;
+using namespace TARGETING;
+using namespace fapi;
+
+//
+// Wrapper function to call mss_freq
+//
+void* call_mss_freq( void *io_pArgs )
+{
+
+ IStepError l_StepError;
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_freq entry" );
+/*
+ //@TODO RTC: 133830 Add the wrapper back in when ready
+ errlHndl_t l_err = NULL;
+ TARGETING::TargetHandleList l_membufTargetList;
+ getAllChips(l_membufTargetList, TYPE_MEMBUF);
+
+ for (TargetHandleList::const_iterator
+ l_membuf_iter = l_membufTargetList.begin();
+ l_membuf_iter != l_membufTargetList.end();
+ ++l_membuf_iter)
+ {
+ // make a local copy of the target for ease of use
+ const TARGETING::Target* l_membuf_target = *l_membuf_iter;
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "===== mss_freq HWP "
+ "target HUID %.8X",
+ TARGETING::get_huid(l_membuf_target));
+
+ // call the HWP with each target ( if parallel, spin off a task )
+ // $$const fapi::Target l_fapi_membuf_target(
+ fapi::Target l_fapi_membuf_target(fapi::TARGET_TYPE_MEMBUF_CHIP,
+ (const_cast<TARGETING::Target*>(l_membuf_target)) );
+
+ //@TODO RTC:133830 FAPI_INVOKE_HWP(l_err, p9_mss_freq, l_fapi_membuf_target);
+ //Remove when above HWP is working:
+ FAPI_INVOKE_HWP(l_err, mss_freq, l_fapi_membuf_target);
+
+ // process return code.
+ if ( l_err )
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: mss_freq HWP ",
+ l_err->reasonCode());
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_membuf_target).addToLog( l_err );
+
+ // Create IStep error log and cross reference to error that occurred
+ l_StepError.addErrorDetails( l_err );
+
+ // Commit Error
+ errlCommit( l_err, HWPF_COMP_ID );
+
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : mss_freq HWP");
+ }
+ } // End memBuf loop
+*/
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_freq exit" );
+
+ return l_StepError.getErrorHandle();
+}
+
+}; // end namespace
diff --git a/src/usr/isteps/istep07/call_mss_volt.C b/src/usr/isteps/istep07/call_mss_volt.C
new file mode 100644
index 000000000..c6ef47aa8
--- /dev/null
+++ b/src/usr/isteps/istep07/call_mss_volt.C
@@ -0,0 +1,265 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/istep07/call_mss_volt.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+/**
+ * @file call_mss_volt.C
+ * Contains the wrapper for istep 7.2
+ */
+
+/******************************************************************************/
+// Includes
+/******************************************************************************/
+#include <stdint.h>
+
+#include <trace/interface.H>
+#include <initservice/taskargs.H>
+#include <initservice/initserviceif.H>
+#include <errl/errlentry.H>
+
+#include <isteps/hwpisteperror.H>
+#include <errl/errludtarget.H>
+
+#include <initservice/isteps_trace.H>
+#include <sbe/sbeif.H>
+// targeting support
+#include <targeting/common/commontargeting.H>
+#include <targeting/common/utilFilter.H>
+#include <attributetraits.H>
+
+#include <config.h>
+#include <util/align.H>
+#include <util/algorithm.H>
+
+namespace ISTEP_07
+{
+
+using namespace ISTEP;
+using namespace ISTEP_ERROR;
+using namespace ERRORLOG;
+using namespace TARGETING;
+
+// helper function to call multiple mss_volt_hwps
+void call_mss_volt_hwp (std::vector<TARGETING::ATTR_VMEM_ID_type>& i_VmemList,
+ TARGETING::TargetHandleList& i_membufTargetList,
+ IStepError& io_StepError,
+ fapi::ReturnCode(*mss_volt_hwp)(std::vector<fapi::Target>&))
+{
+ /* @TODO: RTC:133830 Add wrapper back when ready
+ errlHndl_t l_err;
+ //for each unique VmemId filter it out of the list of membuf targets
+ //to create a subsetlist of membufs with just that vmemid
+ std::vector<TARGETING::ATTR_VMEM_ID_type>::iterator l_vmem_iter;
+ for (l_vmem_iter = i_VmemList.begin();
+ l_vmem_iter != i_VmemList.end();
+ ++l_vmem_iter)
+ {
+ // declare a vector of fapi targets to pass to mss_volt procedures
+ std::vector<fapi::Target> l_membufFapiTargets;
+
+ for (TargetHandleList::const_iterator
+ l_membuf_iter = i_membufTargetList.begin();
+ l_membuf_iter != i_membufTargetList.end();
+ ++l_membuf_iter)
+ {
+ // make a local copy of the target for ease of use
+ const TARGETING::Target* l_membuf_target = *l_membuf_iter;
+ if (l_membuf_target->getAttr<ATTR_VMEM_ID>()==*l_vmem_iter)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "===== add to fapi::Target vector vmem_id=0x%08X "
+ "target HUID %.8X",
+ l_membuf_target->getAttr<ATTR_VMEM_ID>(),
+ TARGETING::get_huid(l_membuf_target));
+
+ fapi::Target l_membuf_fapi_target(fapi::TARGET_TYPE_MEMBUF_CHIP,
+ (const_cast<TARGETING::Target*>(l_membuf_target)) );
+
+ l_membufFapiTargets.push_back( l_membuf_fapi_target );
+ }
+ }
+
+ //now have the a list of fapi membufs with just the one VmemId
+ //call the HWP on the list of fapi targets
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "===== mss_volt HWP( vector )" );
+
+ FAPI_INVOKE_HWP(l_err, mss_volt_hwp, l_membufFapiTargets);
+
+ // process return code.
+ if ( l_err )
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: mss_volt HWP( ) ",
+ l_err->reasonCode());
+
+ // Create IStep error log and cross reference to error that occurred
+ io_StepError.addErrorDetails( l_err );
+
+ // Commit Error
+ errlCommit( l_err, HWPF_COMP_ID );
+
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : mss_volt_dimm_count HWP( )" );
+ }
+ }
+ */
+}
+
+//
+// Wrapper function to call mss_volt
+//
+void* call_mss_volt( void *io_pArgs )
+{
+
+ IStepError l_StepError;
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_volt entry" );
+
+ //@TODO RTC:133830 Add the wrapper back in when ready
+/* // Check that VPP, DDR3 VDDR, and DDR4 VDDR _EFF_CONFIG attributes are set
+ errlHndl_t l_err = NULL;
+ bool unused = false;
+ set_eff_config_attrs_helper(DEFAULT, unused);
+
+ TARGETING::TargetHandleList l_membufTargetList;
+ getAllChips(l_membufTargetList, TYPE_MEMBUF);
+
+ //get a list of unique VmemIds
+ std::vector<TARGETING::ATTR_VMEM_ID_type> l_VmemList;
+
+ //fapi Return Code
+ fapi::ReturnCode l_fapirc;
+
+ for (TargetHandleList::const_iterator
+ l_membuf_iter = l_membufTargetList.begin();
+ l_membuf_iter != l_membufTargetList.end();
+ ++l_membuf_iter)
+ {
+ TARGETING::ATTR_VMEM_ID_type l_VmemID =
+ (*l_membuf_iter)->getAttr<ATTR_VMEM_ID>();
+ l_VmemList.push_back(l_VmemID);
+
+ }
+
+#ifdef CONFIG_ALLOW_NON_COMPLIANT_DIMM
+ // Set ATTR_MSS_VOLT_COMPLIANT_DIMMS to ALL
+ // Value of ALL value in attribute enum
+ uint8_t l_allowNonCompliantDimms =
+ ENUM_ATTR_MSS_VOLT_COMPLIANT_DIMMS_ALL_VOLTAGES;
+
+ TARGETING::Target* l_sys = NULL;
+ targetService().getTopLevelTarget(l_sys);
+ l_sys->setAttr<TARGETING::ATTR_MSS_VOLT_COMPLIANT_DIMMS>
+ (l_allowNonCompliantDimms);
+
+#endif
+
+
+
+ std::sort(l_VmemList.begin(), l_VmemList.end());
+
+ std::vector<TARGETING::ATTR_VMEM_ID_type>::iterator objItr;
+ objItr=std::unique(l_VmemList.begin(), l_VmemList.end());
+ l_VmemList.erase(objItr,l_VmemList.end());
+
+ //call mss_volt hwps
+ call_mss_volt_hwp (l_VmemList, l_membufTargetList,l_StepError, mss_volt);
+ call_mss_volt_hwp (l_VmemList, l_membufTargetList,l_StepError,
+ mss_volt_dimm_count);
+
+ l_err = setMemoryVoltageDomainOffsetVoltage<
+ TARGETING::ATTR_MSS_CENT_VDD_OFFSET_DISABLE,
+ TARGETING::ATTR_MEM_VDD_OFFSET_MILLIVOLTS,
+ TARGETING::ATTR_VDD_ID>();
+ if(l_err)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%08X: setMemoryVoltageDomainOffsetVoltage for VDD domain",
+ l_err->reasonCode());
+ l_StepError.addErrorDetails(l_err);
+ errlCommit(l_err,HWPF_COMP_ID);
+ }
+
+ l_err = setMemoryVoltageDomainOffsetVoltage<
+ TARGETING::ATTR_MSS_CENT_AVDD_OFFSET_DISABLE,
+ TARGETING::ATTR_MEM_AVDD_OFFSET_MILLIVOLTS,
+ TARGETING::ATTR_AVDD_ID>();
+ if(l_err)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%08X: setMemoryVoltageDomainOffsetVoltage for AVDD domain",
+ l_err->reasonCode());
+ l_StepError.addErrorDetails(l_err);
+ errlCommit(l_err,HWPF_COMP_ID);
+ }
+
+ l_err = setMemoryVoltageDomainOffsetVoltage<
+ TARGETING::ATTR_MSS_CENT_VCS_OFFSET_DISABLE,
+ TARGETING::ATTR_MEM_VCS_OFFSET_MILLIVOLTS,
+ TARGETING::ATTR_VCS_ID>();
+ if(l_err)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%08X: setMemoryVoltageDomainOffsetVoltage for VCS domain",
+ l_err->reasonCode());
+ l_StepError.addErrorDetails(l_err);
+ errlCommit(l_err,HWPF_COMP_ID);
+ }
+
+ l_err = setMemoryVoltageDomainOffsetVoltage<
+ TARGETING::ATTR_MSS_VOLT_VPP_OFFSET_DISABLE,
+ TARGETING::ATTR_MEM_VPP_OFFSET_MILLIVOLTS,
+ TARGETING::ATTR_VPP_ID>();
+ if(l_err)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%08X: setMemoryVoltageDomainOffsetVoltage for VPP domain",
+ l_err->reasonCode());
+ l_StepError.addErrorDetails(l_err);
+ errlCommit(l_err,HWPF_COMP_ID);
+ }
+
+ l_err = setMemoryVoltageDomainOffsetVoltage<
+ TARGETING::ATTR_MSS_VOLT_VDDR_OFFSET_DISABLE,
+ TARGETING::ATTR_MEM_VDDR_OFFSET_MILLIVOLTS,
+ TARGETING::ATTR_VMEM_ID>();
+ if(l_err)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%08X: setMemoryVoltageDomainOffsetVoltage for VDDR domain",
+ l_err->reasonCode());
+ l_StepError.addErrorDetails(l_err);
+ errlCommit(l_err,HWPF_COMP_ID);
+ }
+*/
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_volt exit" );
+
+ return l_StepError.getErrorHandle();
+}
+
+
+};
diff --git a/src/usr/isteps/istep07/host_collect_dimm_spd.C b/src/usr/isteps/istep07/host_collect_dimm_spd.C
new file mode 100644
index 000000000..ae15e8a54
--- /dev/null
+++ b/src/usr/isteps/istep07/host_collect_dimm_spd.C
@@ -0,0 +1,155 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/istep07/host_collect_dimm_spd.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+/**
+ * @file host_collect_dimm_spd.C
+ * Contains the wrapper for istep 7.1
+ */
+
+/******************************************************************************/
+// Includes
+/******************************************************************************/
+#include <stdint.h>
+
+#include <isteps/hwpisteperror.H>
+#include <trace/interface.H>
+#include <initservice/taskargs.H>
+#include <initservice/isteps_trace.H>
+
+#include <errl/errlentry.H>
+#include <errl/errludtarget.H>
+
+// targeting support
+#include <targeting/common/commontargeting.H>
+#include <targeting/common/utilFilter.H>
+#include <config.h>
+
+namespace ISTEP_07
+{
+
+using namespace ISTEP;
+using namespace ISTEP_ERROR;
+using namespace ERRORLOG;
+using namespace TARGETING;
+
+//
+// Wrapper function to call host_collect_dimm_spd
+//
+void* call_host_collect_dimm_spd( void *io_pArgs )
+{
+ errlHndl_t l_err = NULL;
+ IStepError l_stepError;
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_collect_dimm_spd entry" );
+
+ // Get a list of all present Centaurs
+ TargetHandleList l_presCentaurs;
+ getChipResources(l_presCentaurs, TYPE_MEMBUF, UTIL_FILTER_PRESENT);
+ // Associated MBA targets
+ TARGETING::TargetHandleList l_mbaList;
+
+ // Define predicate for associated MBAs
+ PredicateCTM predMba(CLASS_UNIT, TYPE_MBA);
+ PredicatePostfixExpr presMba;
+ PredicateHwas predPres;
+ predPres.present(true);
+ presMba.push(&predMba).push(&predPres).And();
+
+ for (TargetHandleList::const_iterator
+ l_cenIter = l_presCentaurs.begin();
+ l_cenIter != l_presCentaurs.end();
+ ++l_cenIter)
+ {
+ // make a local copy of the target for ease of use
+ TARGETING::Target * l_pCentaur = *l_cenIter;
+ // Retrieve HUID of current Centaur
+ TARGETING::ATTR_HUID_type l_currCentaurHuid =
+ TARGETING::get_huid(l_pCentaur);
+
+ // Dump current run on target
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running mss_attr_cleanup HWP on "
+ "target HUID %.8X", l_currCentaurHuid);
+
+ // find all present MBAs associated with this Centaur
+ TARGETING::TargetHandleList l_presMbas;
+ targetService().getAssociated(l_presMbas,
+ l_pCentaur,
+ TargetService::CHILD,
+ TargetService::IMMEDIATE,
+ &presMba);
+
+ // If not at least two MBAs found
+ if (l_presMbas.size() < 2)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Not enough MBAs found for Centaur target HUID %.8X, "
+ "skipping this Centaur.",
+ l_currCentaurHuid);
+ continue;
+ }
+
+ // Create FAPI Targets.
+ /* @TODO: RTC:133830 use fapi2 targets
+ const fapi::Target l_fapiCentaurTarget(TARGET_TYPE_MEMBUF_CHIP,
+ (const_cast<TARGETING::Target*>(l_pCentaur)));
+ const fapi::Target l_fapiMba0Target(TARGET_TYPE_MBA_CHIPLET,
+ (const_cast<TARGETING::Target*>(l_presMbas[0])));
+ const fapi::Target l_fapiMba1Target(TARGET_TYPE_MBA_CHIPLET,
+ (const_cast<TARGETING::Target*>(l_presMbas[1])));
+ */
+ //@TODO RTC:133830 call the HWP with each fapi::Target
+ //FAPI_INVOKE_HWP(l_err, p9_mss_attr_cleanup, l_fapiCentaurTarget,
+ // l_fapiMba0Target, l_fapiMba1Target);
+ if (l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: mss_attr_cleanup HWP returns error",
+ l_err->reasonCode());
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_pCentaur).addToLog(l_err);
+ // Create IStep error log and cross reference error that occurred
+ l_stepError.addErrorDetails(l_err);
+ // Commit Error
+ errlCommit(l_err, HWPF_COMP_ID);
+ }
+ else
+ {
+ // Success
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Successfully ran mss_attr_cleanup HWP on "
+ "CENTAUR target HUID %.8X "
+ "and associated MBAs",
+ l_currCentaurHuid);
+ }
+ }
+
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_collect_dimm_spd exit" );
+
+ // end task, returning any errorlogs to IStepDisp
+ return l_stepError.getErrorHandle();
+}
+};
diff --git a/src/usr/isteps/istep07/makefile b/src/usr/isteps/istep07/makefile
new file mode 100644
index 000000000..857381d3f
--- /dev/null
+++ b/src/usr/isteps/istep07/makefile
@@ -0,0 +1,34 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/usr/isteps/istep07/makefile $
+#
+# OpenPOWER HostBoot Project
+#
+# Contributors Listed Below - COPYRIGHT 2015
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+ROOTPATH = ../../../..
+MODULE = istep07
+
+OBJS += host_collect_dimm_spd.o
+OBJS += call_mss_volt.o
+OBJS += call_mss_freq.o
+OBJS += call_mss_eff_config.o
+OBJS += call_mss_attr_update.o
+
+include ${ROOTPATH}/config.mk
diff --git a/src/usr/isteps/istepHelperFuncs.C b/src/usr/isteps/istepHelperFuncs.C
new file mode 100644
index 000000000..e883420f5
--- /dev/null
+++ b/src/usr/isteps/istepHelperFuncs.C
@@ -0,0 +1,267 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/istepHelperFuncs.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+#include "istepHelperFuncs.H"
+#include <stdint.h>
+
+#include <trace/interface.H>
+#include <errl/errlentry.H>
+
+#include <isteps/hwpisteperror.H>
+#include <errl/errludtarget.H>
+
+#include <initservice/isteps_trace.H>
+
+// targeting support
+#include <targeting/common/commontargeting.H>
+#include <targeting/common/utilFilter.H>
+#include <attributetraits.H>
+#include <config.h>
+#include <util/align.H>
+#include <util/algorithm.H>
+
+//
+// Helper function to set _EFF_CONFIG attributes for HWPs
+//
+void set_eff_config_attrs_helper( const EFF_CONFIG_ATTRIBUTES_BASE i_base,
+ bool & o_post_dram_inits_found)
+{
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "set_eff_config_attrs_helper: setting _EFF_CONFIG attributes "
+ "enter: i_base=%d", i_base);
+/* @TODO: RTC:133830 Uncomment this once the attribute support is in place
+ o_post_dram_inits_found = false;
+
+ // Local Variables ('pdi_' means 'post dram init')
+ uint32_t pdi_ddr3_vddr_slope=0;
+ uint32_t pdi_ddr3_vddr_intercept=0;
+ uint32_t pdi_ddr3_vddr_max_limit=0;
+ uint32_t pdi_ddr4_vddr_slope=0;
+ uint32_t pdi_ddr4_vddr_intercept=0;
+ uint32_t pdi_ddr4_vddr_max_limit=0;
+ uint32_t pdi_vpp_slope=0;
+ uint32_t pdi_vpp_intercept=0;
+
+ uint32_t eff_conf_ddr3_vddr_slope=0;
+ uint32_t eff_conf_ddr3_vddr_intercept=0;
+ uint32_t eff_conf_ddr3_vddr_max_limit=0;
+ uint32_t eff_conf_ddr4_vddr_slope=0;
+ uint32_t eff_conf_ddr4_vddr_intercept=0;
+ uint32_t eff_conf_ddr4_vddr_max_limit=0;
+ uint32_t eff_conf_vpp_slope=0;
+ uint32_t eff_conf_vpp_intercept=0;
+
+ // Check input base
+ assert( ( i_base == DEFAULT ) || (i_base == POST_DRAM_INIT ),
+ "set_eff_config_attrs_helper: Invalid i_base passed in: %d",
+ i_base);
+
+ // Get Node Target
+ TARGETING::Target* sysTgt = NULL;
+ TARGETING::targetService().getTopLevelTarget(sysTgt);
+ assert(sysTgt != NULL,"set_eff_config_attrs_helper: "
+ "System target was NULL.");
+
+ TARGETING::TargetHandleList l_nodeList;
+
+ TARGETING::PredicateCTM isaNode(TARGETING::CLASS_ENC,
+ TARGETING::TYPE_NODE);
+
+ TARGETING::targetService().getAssociated(
+ l_nodeList,
+ sysTgt,
+ TARGETING::TargetService::CHILD,
+ TARGETING::TargetService::IMMEDIATE,
+ &isaNode);
+
+ // Node list should only have 1 tgt
+ assert ( l_nodeList.size() == 1,
+ "System target returned multiple or zero nodes ");
+ TARGETING::Target* nodeTgt=l_nodeList[0];
+
+
+
+ // Look for POST_DRAM_INIT Attributes if requested
+ if ( i_base == POST_DRAM_INIT )
+ {
+ // POST_DRAM_INIT DDR3 VDDR
+ pdi_ddr3_vddr_slope =
+ nodeTgt->getAttr<
+ TARGETING::ATTR_MSS_VOLT_DDR3_VDDR_SLOPE_POST_DRAM_INIT>();
+
+ pdi_ddr3_vddr_intercept =
+ nodeTgt->getAttr<
+ TARGETING::ATTR_MSS_VOLT_DDR3_VDDR_INTERCEPT_POST_DRAM_INIT>();
+
+ pdi_ddr3_vddr_max_limit =
+ nodeTgt->getAttr<
+ TARGETING::ATTR_MRW_DDR3_VDDR_MAX_LIMIT_POST_DRAM_INIT>();
+
+ // POST_DRAM_INIT DDR4 VDDR
+ pdi_ddr4_vddr_slope =
+ nodeTgt->getAttr<
+ TARGETING::ATTR_MSS_VOLT_DDR4_VDDR_SLOPE_POST_DRAM_INIT>();
+
+ pdi_ddr4_vddr_intercept =
+ nodeTgt->getAttr<
+ TARGETING::ATTR_MSS_VOLT_DDR4_VDDR_INTERCEPT_POST_DRAM_INIT>();
+
+ pdi_ddr4_vddr_max_limit =
+ nodeTgt->getAttr<
+ TARGETING::ATTR_MRW_DDR4_VDDR_MAX_LIMIT_POST_DRAM_INIT>();
+
+
+ // POST_DRAM_INIT VPP
+ pdi_vpp_slope =
+ nodeTgt->getAttr<
+ TARGETING::ATTR_MSS_VOLT_VPP_SLOPE_POST_DRAM_INIT>();
+
+ pdi_vpp_intercept =
+ nodeTgt->getAttr<
+ TARGETING::ATTR_MSS_VOLT_VPP_INTERCEPT_POST_DRAM_INIT>();
+ }
+ o_post_dram_inits_found = ( pdi_ddr3_vddr_slope || pdi_ddr3_vddr_intercept ||
+ pdi_ddr3_vddr_max_limit ||
+ pdi_ddr4_vddr_slope || pdi_ddr4_vddr_intercept ||
+ pdi_ddr4_vddr_max_limit ||
+ pdi_vpp_slope || pdi_vpp_intercept )
+ ? true : false;
+
+ // -----------------------------------
+ // EFF CONFIG: DDR3 VDDR
+ if ( o_post_dram_inits_found == false )
+ {
+ // Use default system values
+ eff_conf_ddr3_vddr_slope =
+ sysTgt->getAttr<TARGETING::ATTR_MSS_VOLT_DDR3_VDDR_SLOPE>();
+
+ eff_conf_ddr3_vddr_intercept =
+ sysTgt->getAttr<
+ TARGETING::ATTR_MSS_VOLT_DDR3_VDDR_INTERCEPT>();
+
+ eff_conf_ddr3_vddr_max_limit =
+ sysTgt->getAttr<
+ TARGETING::ATTR_MRW_DDR3_VDDR_MAX_LIMIT>();
+ }
+ else
+ {
+ // Use POST_DRAM INIT values
+ eff_conf_ddr3_vddr_slope = pdi_ddr3_vddr_slope;
+ eff_conf_ddr3_vddr_intercept = pdi_ddr3_vddr_intercept;
+ eff_conf_ddr3_vddr_max_limit = pdi_ddr3_vddr_max_limit;
+ }
+
+ nodeTgt->setAttr<TARGETING::ATTR_MSS_VOLT_DDR3_VDDR_SLOPE_EFF_CONFIG>\
+ (eff_conf_ddr3_vddr_slope);
+
+ nodeTgt->setAttr<TARGETING::ATTR_MSS_VOLT_DDR3_VDDR_INTERCEPT_EFF_CONFIG>\
+ (eff_conf_ddr3_vddr_intercept);
+
+ nodeTgt->setAttr<TARGETING::ATTR_MRW_DDR3_VDDR_MAX_LIMIT_EFF_CONFIG>\
+ (eff_conf_ddr3_vddr_max_limit);
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,"set_eff_config_attrs_helper: "
+ "DDR3 _EFF_CONFIG(%d, %d): slope=%d, intercept=%d, max_limit=%d",
+ i_base, o_post_dram_inits_found,
+ eff_conf_ddr3_vddr_slope,
+ eff_conf_ddr3_vddr_intercept,
+ eff_conf_ddr3_vddr_max_limit);
+
+
+ // -----------------------------------
+ // EFF CONFIG: DDR4 VDDR
+ if ( o_post_dram_inits_found == false )
+ {
+ // Use default system value
+ eff_conf_ddr4_vddr_slope =
+ sysTgt->getAttr<TARGETING::ATTR_MSS_VOLT_DDR4_VDDR_SLOPE>();
+
+ eff_conf_ddr4_vddr_intercept =
+ sysTgt->getAttr<
+ TARGETING::ATTR_MSS_VOLT_DDR4_VDDR_INTERCEPT>();
+
+ eff_conf_ddr4_vddr_max_limit =
+ sysTgt->getAttr<
+ TARGETING::ATTR_MRW_DDR4_VDDR_MAX_LIMIT>();
+ }
+ else
+ {
+ // Use POST_DRAM INIT value
+ eff_conf_ddr4_vddr_slope = pdi_ddr4_vddr_slope;
+ eff_conf_ddr4_vddr_intercept = pdi_ddr4_vddr_intercept;
+ eff_conf_ddr4_vddr_max_limit = pdi_ddr4_vddr_max_limit;
+ }
+ nodeTgt->setAttr<TARGETING::ATTR_MSS_VOLT_DDR4_VDDR_SLOPE_EFF_CONFIG>\
+ (eff_conf_ddr4_vddr_slope);
+
+ nodeTgt->setAttr<TARGETING::ATTR_MSS_VOLT_DDR4_VDDR_INTERCEPT_EFF_CONFIG>\
+ (eff_conf_ddr4_vddr_intercept);
+
+ nodeTgt->setAttr<TARGETING::ATTR_MRW_DDR4_VDDR_MAX_LIMIT_EFF_CONFIG>\
+ (eff_conf_ddr4_vddr_max_limit);
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,"set_eff_config_attrs_helper: "
+ "DDR4 _EFF_CONFIG(%d, %d): slope=%d, intercept=%d, max_limit=%d",
+ i_base, o_post_dram_inits_found,
+ eff_conf_ddr4_vddr_slope,
+ eff_conf_ddr4_vddr_intercept,
+ eff_conf_ddr4_vddr_max_limit);
+
+ // -----------------------------------
+ // EFF CONFIG: VPP
+ if ( o_post_dram_inits_found == false )
+ {
+ // Use default system value
+ eff_conf_vpp_slope =
+ sysTgt->getAttr<TARGETING::ATTR_MSS_VOLT_VPP_SLOPE>();
+
+ eff_conf_vpp_intercept =
+ sysTgt->getAttr<
+ TARGETING::ATTR_MSS_VOLT_VPP_INTERCEPT>();
+ }
+ else
+ {
+ // Use POST_DRAM INIT value
+ eff_conf_vpp_slope = pdi_vpp_slope;
+ eff_conf_vpp_intercept = pdi_vpp_intercept;
+ }
+ nodeTgt->setAttr<TARGETING::ATTR_MSS_VOLT_VPP_SLOPE_EFF_CONFIG>\
+ (eff_conf_vpp_slope);
+
+ nodeTgt->setAttr<TARGETING::ATTR_MSS_VOLT_VPP_INTERCEPT_EFF_CONFIG>\
+ (eff_conf_vpp_intercept);
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,"set_eff_config_attrs_helper: "
+ "VPP _EFF_CONFIG(%d, %d): slope=%d, intercept=%d",
+ i_base, o_post_dram_inits_found,
+ eff_conf_vpp_slope,
+ eff_conf_vpp_intercept);
+
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "set_eff_config_attrs_helper: setting _EFF_CONFIG "
+ "attributes exit");
+*/
+}
+
diff --git a/src/usr/isteps/istepHelperFuncs.H b/src/usr/isteps/istepHelperFuncs.H
new file mode 100644
index 000000000..6b877fe19
--- /dev/null
+++ b/src/usr/isteps/istepHelperFuncs.H
@@ -0,0 +1,323 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/istepHelperFuncs.H $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+
+#ifndef _ISTEP_HELPER_FUNCS_H
+#define _ISTEP_HELPER_FUNCS_H
+
+// targeting support
+#include <targeting/common/commontargeting.H>
+#include <targeting/common/utilFilter.H>
+#include <attributetraits.H>
+#include <attributeenums.H>
+/**
+ * @brief Enum specifying what attributes should be used to set the
+ * memory _EFF_CONFIG attributes
+ *
+ */
+enum EFF_CONFIG_ATTRIBUTES_BASE
+{
+ DEFAULT = 0x00, ///< Use System Defaults
+ POST_DRAM_INIT = 0x01, ///< Use POST_DRAM_INIT attributes if non-zero
+};
+
+
+//
+// Helper function to set _EFF_CONFIG attributes for HWPs
+//
+void set_eff_config_attrs_helper( const EFF_CONFIG_ATTRIBUTES_BASE i_base,
+ bool & o_post_dram_inits_found);
+
+
+/**
+ * @brief Compares two memory buffer targets based on the voltage domain ID for
+ * the voltage domain given by the template parameter. Used for sorting
+ * memory buffer targets within containers. API should be called in well
+ * controlled conditions where the input restrictions can be guaranteed.
+ *
+ * @param[in] i_pMembufLhs
+ * Left hand side memory buffer target. Must be a memory buffer target,
+ * and must not be NULL. These conditions are not enforced internally.
+ *
+ * @param[in] i_pMembufRhs
+ * Right hand side memory buffer target. Must be a memory buffer target,
+ * and must not be NULL. These conditions are not enforced internally.
+ *
+ * @tparam VOLTAGE_DOMAIN_ID_ATTR
+ * Attribute corresponding to voltage domain to compare
+ *
+ * @return Bool indicating whether LHS memory buffer target's voltage domain ID
+ * for the specified domain logically precedes the RHS memory buffer
+ * target's voltage domain ID for the same domain
+ */
+template < const TARGETING::ATTRIBUTE_ID VOLTAGE_DOMAIN_ID_ATTR>
+bool _compareMembufWrtVoltageDomain(
+ TARGETING::Target* i_pMembufLhs,
+ TARGETING::Target* i_pMembufRhs)
+{
+ typename TARGETING::AttributeTraits< VOLTAGE_DOMAIN_ID_ATTR >::Type
+ lhsDomain = i_pMembufLhs->getAttr<VOLTAGE_DOMAIN_ID_ATTR>();
+ typename TARGETING::AttributeTraits< VOLTAGE_DOMAIN_ID_ATTR >::Type
+ rhsDomain = i_pMembufRhs->getAttr<VOLTAGE_DOMAIN_ID_ATTR>();
+
+ return lhsDomain < rhsDomain;
+}
+//******************************************************************************
+// setMemoryVoltageDomainOffsetVoltage
+//******************************************************************************
+
+// TODO via RTC: 110777
+// Optimize setMemoryVoltageDomainOffsetVoltage into templated and non-templated
+// pieces to reduce code size
+/*
+ * TODO: RTC:133830 Re-enable this function, the following ATTRs don't seem to
+ * exist currently.
+template< const ATTRIBUTE_ID OFFSET_DISABLEMENT_ATTR,
+ const ATTRIBUTE_ID OFFSET_VOLTAGE_ATTR,
+ const ATTRIBUTE_ID VOLTAGE_DOMAIN_ID_ATTR >
+errlHndl_t setMemoryVoltageDomainOffsetVoltage()
+{
+ TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "setMemoryVoltageDomainOffsetVoltage enter");
+
+ errlHndl_t pError = NULL;
+
+ do {
+
+ TARGETING::Target* pSysTarget = NULL;
+ TARGETING::targetService().getTopLevelTarget(pSysTarget);
+ assert(pSysTarget != NULL,"setMemoryVoltageDomainOffsetVoltage: "
+ "System target was NULL.");
+
+ typename AttributeTraits< OFFSET_DISABLEMENT_ATTR >::Type
+ disableOffsetVoltage =
+ pSysTarget->getAttr< OFFSET_DISABLEMENT_ATTR >();
+
+ if(disableOffsetVoltage)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "INFO: Offset voltage processing disabled for domain type 0x%08X.",
+ OFFSET_DISABLEMENT_ATTR);
+ break;
+ }
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "INFO: Offset voltage processing enabled for domain type 0x%08X.",
+ OFFSET_DISABLEMENT_ATTR);
+
+ typedef fapi::ReturnCode (*pOffsetFn_t)(std::vector<fapi::Target>&);
+
+ struct {
+
+ TARGETING::ATTRIBUTE_ID domain;
+ pOffsetFn_t fn;
+ const char* fnName;
+ bool callIfAllNonFunc;
+
+ } fnMap[] = {
+
+ {TARGETING::ATTR_AVDD_ID,
+ mss_volt_avdd_offset,"mss_volt_avdd_offset", true},
+ {TARGETING::ATTR_VDD_ID ,
+ mss_volt_vdd_offset ,"mss_volt_vdd_offset", true},
+ {TARGETING::ATTR_VCS_ID ,
+ mss_volt_vcs_offset ,"mss_volt_vcs_offset", true},
+ {TARGETING::ATTR_VMEM_ID,
+ mss_volt_vddr_offset,"mss_volt_vddr_offset", false},
+ {TARGETING::ATTR_VPP_ID ,
+ mss_volt_vpp_offset ,"mss_volt_vpp_offset", false}
+ };
+
+ size_t recordIndex = 0;
+ const size_t records = sizeof(fnMap)/sizeof(fnMap[0]);
+ for(; recordIndex<records; ++recordIndex)
+ {
+ if(VOLTAGE_DOMAIN_ID_ATTR == fnMap[recordIndex].domain)
+ {
+ break;
+ }
+ }
+
+ if(recordIndex >= records)
+ {
+ assert(recordIndex < records,
+ "Code bug! Called setMemoryVoltageDomainOffsetVoltage "
+ "using unsupported voltage offset attribute type of 0x%08X.",
+ VOLTAGE_DOMAIN_ID_ATTR);
+ break;
+ }
+
+ TARGETING::TargetHandleList membufTargetList;
+
+ // Must pull ALL present memory buffers (not just functional) for these
+ // computations
+ getChipResources(membufTargetList, TYPE_MEMBUF,
+ TARGETING::UTIL_FILTER_PRESENT);
+
+ std::sort(membufTargetList.begin(), membufTargetList.end(),
+ _compareMembufWrtVoltageDomain< VOLTAGE_DOMAIN_ID_ATTR >);
+
+ std::vector<fapi::Target> membufFapiTargetsList;
+ typename AttributeTraits< VOLTAGE_DOMAIN_ID_ATTR >::Type lastDomainId
+ = 0;
+
+ if(!membufTargetList.empty())
+ {
+ lastDomainId =
+ (*membufTargetList.begin())->getAttr<VOLTAGE_DOMAIN_ID_ATTR>();
+ }
+
+ // O(n) algorithm to execute HWPs on groups of memory buffers. As the
+ // memory buffers are sorted in order of domain ID (several records in a row
+ // might have same domain ID), walk down the list accumulating targets for
+ // the HWP until the domain ID changes. The first record is not considered
+ // a change. At the time the change is detected, run the HWP on the set of
+ // accumulated targets, clear the list, and accumulate the target with a new
+ // domain ID as the start of the new list. When we hit end of list, we
+ // might add this last target to a new accumulation, so we have to go back
+ // through the loop one more time to process it (being careful not to do
+ // unholy things to the iterator, etc.)
+
+ // Prevent running the HWP on the first target. Var is used to push us
+ // through the loop after we exhausted all the targets
+ bool last = membufTargetList.empty();
+ for (TargetHandleList::const_iterator
+ ppPresentMembuf = membufTargetList.begin();
+ ((ppPresentMembuf != membufTargetList.end()) || (last == false));
+ ++ppPresentMembuf)
+ {
+ // If no valid target to process, this is our last time through the loop
+ last = (ppPresentMembuf == membufTargetList.end());
+
+ typename AttributeTraits< VOLTAGE_DOMAIN_ID_ATTR >::Type
+ currentDomainId = last ? lastDomainId :
+ (*ppPresentMembuf)->getAttr<VOLTAGE_DOMAIN_ID_ATTR>();
+
+ // Invoke the HWP if the domain ID in the sorted list change relative to
+ // prior entry or this is our final time through the loop (and there is
+ // a list entry to process)
+ if( ( (currentDomainId != lastDomainId)
+ || (last))
+ && (!membufFapiTargetsList.empty()) )
+ {
+ // Skip HWP if this domain has all deconfigured membufs and the
+ // domain rule specifies not running the HWP for that case
+ bool invokeHwp = true;
+ if(fnMap[recordIndex].callIfAllNonFunc == false)
+ {
+ invokeHwp = false;
+ TARGETING::PredicateIsFunctional funcPred;
+ std::vector<fapi::Target>::const_iterator pFapiTarget =
+ membufFapiTargetsList.begin();
+ for(;pFapiTarget != membufFapiTargetsList.end();++pFapiTarget)
+ {
+ if(funcPred(
+ reinterpret_cast<const TARGETING::Target*>(
+ pFapiTarget->get())))
+ {
+ invokeHwp = true;
+ break;
+ }
+ }
+ }
+
+ if(invokeHwp)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "INFO invoking %s on domain type 0x%08X, ID 0x%08X",
+ fnMap[recordIndex].fnName,
+ VOLTAGE_DOMAIN_ID_ATTR, lastDomainId);
+
+ FAPI_INVOKE_HWP(
+ pError,
+ fnMap[recordIndex].fn,
+ membufFapiTargetsList);
+
+ if (pError)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: %s",
+ pError->reasonCode(),fnMap[recordIndex].fnName);
+ break;
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : %s",fnMap[recordIndex].fnName );
+ }
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "INFO not invoking %s on domain type 0x%08X, ID 0x%08X "
+ "since domain has no functional memory buffers.",
+ fnMap[recordIndex].fnName,
+ VOLTAGE_DOMAIN_ID_ATTR, lastDomainId);
+ }
+
+ membufFapiTargetsList.clear();
+
+ lastDomainId = currentDomainId;
+ }
+
+ // If not the last time through loop, there is a new target to
+ // accumulate
+ if(!last)
+ {
+ const TARGETING::Target* pPresentMembuf = *ppPresentMembuf;
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "===== add to fapi::Target vector attr type=0x%08X, "
+ "id=0x%08X, target HUID=0x%08X",
+ VOLTAGE_DOMAIN_ID_ATTR,
+ pPresentMembuf->getAttr<VOLTAGE_DOMAIN_ID_ATTR>(),
+ TARGETING::get_huid(pPresentMembuf));
+
+ fapi::Target membufFapiTarget(fapi::TARGET_TYPE_MEMBUF_CHIP,
+ (const_cast<TARGETING::Target*>(pPresentMembuf)) );
+
+ membufFapiTargetsList.push_back(membufFapiTarget);
+ }
+ // Otherwise need to bail, lest we increment the iterator again, which
+ // is undefined
+ else
+ {
+ break;
+ }
+ }
+
+ if(pError)
+ {
+ break;
+ }
+
+ } while(0);
+
+ TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "setMemoryVoltageDomainOffsetVoltage exit");
+
+ return pError;
+}
+*/
+#endif
diff --git a/src/usr/isteps/makefile b/src/usr/isteps/makefile
new file mode 100644
index 000000000..296b4ff56
--- /dev/null
+++ b/src/usr/isteps/makefile
@@ -0,0 +1,37 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/usr/isteps/makefile $
+#
+# OpenPOWER HostBoot Project
+#
+# Contributors Listed Below - COPYRIGHT 2011,2015
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+ROOTPATH=../../..
+MODULE = isteps
+
+SUBDIRS+=istep06.d
+SUBDIRS+=istep07.d
+
+OBJS += hwpisteperror.o
+OBJS += hwpistepud.o
+OBJS += istepHelperFuncs.o
+
+EXTRAINCDIR += ${ROOTPATH}/src/usr/initservice/istepdispatcher
+
+include ${ROOTPATH}/config.mk
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