Add multi-chip support for MPIPL path of host_discover_targets

We were having some issues where the MPIPL path of host_discover_targets
was ignoring 2nd proc cases.

Change-Id: I55543644387e35166f6c1d80324c318c2ceba9ff
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38904
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

1 files changed, 23 insertions, 16 deletions

diff --git a/src/usr/isteps/istep06/host_discover_targets.C b/src/usr/isteps/istep06/host_discover_targets.C
index f551b3659..a2e4b0cba 100644
--- a/src/usr/isteps/istep06/host_discover_targets.C
+++ b/src/usr/isteps/istep06/host_discover_targets.C
@@ -198,18 +198,18 @@ bool deassertSpecialWakeupOnCores(ISTEP_ERROR::IStepError & io_istepError)
             FAPI_INVOKE_HWP(l_err, p9_cpu_special_wakeup_core, l_core,
                             p9specialWakeup::SPCWKUP_DISABLE,
                             p9specialWakeup::PROC_SPCWKUP_ENTITY(l_src));
-                            if ( l_err )
-                            {
-                                TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
-                                          "ERROR : returned from p9_cpu_special_wakeup_core for core 0x%x for src 0x%x", TARGETING::get_huid(l_core), l_src  );
-                                          l_success = false;
-                                          break;
-                            }
-                            else
-                            {
-                                TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
-                                          "disabled special wakeup for core 0x%x for src 0x%x", TARGETING::get_huid(l_core), l_src  );
-                            }
+            if ( l_err )
+            {
+                TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                            "ERROR : returned from p9_cpu_special_wakeup_core for core 0x%x for src 0x%x", TARGETING::get_huid(l_core), l_src  );
+                            l_success = false;
+                            break;
+            }
+            else
+            {
+                TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                            "disabled special wakeup for core 0x%x for src 0x%x", TARGETING::get_huid(l_core), l_src  );
+            }
         }
         if(l_err)
         {
@@ -264,18 +264,25 @@ errlHndl_t powerDownSlaveQuads()
         fapi2::Target <fapi2::TARGET_TYPE_EQ> l_fapi_eq_target (l_eq_target);
         fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_chip =
             l_fapi_eq_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>();
+
+        TARGETING::ATTR_PROC_SBE_MASTER_CHIP_type l_is_master_chip;
+        FAPI_ATTR_GET(fapi2::ATTR_PROC_SBE_MASTER_CHIP, l_chip, l_is_master_chip);
+
         TARGETING::TargetHandleList l_coreTargetList;
         TARGETING::getChildChiplets( l_coreTargetList,
                                      l_eq_target,
                                      TARGETING::TYPE_CORE,
                                      true);
         //Check if either of the cores is master (probably could just check the first)
-        for(const auto & l_core_target : l_coreTargetList)
+        if (l_is_master_chip == 1)
         {
-            if(l_core_target->getAttr<TARGETING::ATTR_CHIP_UNIT>() == l_masterCoreId)
+            for(const auto & l_core_target : l_coreTargetList)
             {
-                l_isMasterEq = true;
-                break;
+                if(l_core_target->getAttr<TARGETING::ATTR_CHIP_UNIT>() == l_masterCoreId)
+                {
+                    l_isMasterEq = true;
+                    break;
+                }
             }
         }